.. | .. |
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203 | 203 | return -EBADMSG; |
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204 | 204 | } |
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205 | 205 | |
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| 206 | +static int xt26g11c_ecc_get_status(struct spinand_device *spinand, |
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| 207 | + u8 status) |
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| 208 | +{ |
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| 209 | + struct nand_device *nand = spinand_to_nand(spinand); |
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| 210 | + |
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| 211 | + switch (status & STATUS_ECC_MASK) { |
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| 212 | + case STATUS_ECC_NO_BITFLIPS: |
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| 213 | + return 0; |
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| 214 | + |
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| 215 | + case STATUS_ECC_UNCOR_ERROR: |
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| 216 | + return -EBADMSG; |
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| 217 | + |
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| 218 | + case STATUS_ECC_HAS_BITFLIPS: |
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| 219 | + return 1; |
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| 220 | + |
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| 221 | + default: |
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| 222 | + return nanddev_get_ecc_requirements(nand)->strength; |
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| 223 | + } |
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| 224 | + |
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| 225 | + return -EINVAL; |
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| 226 | +} |
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| 227 | + |
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206 | 228 | static const struct spinand_info xtx_spinand_table[] = { |
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207 | 229 | SPINAND_INFO("XT26G01A", |
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208 | 230 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE1), |
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.. | .. |
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293 | 315 | &update_cache_variants), |
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294 | 316 | SPINAND_HAS_QE_BIT, |
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295 | 317 | SPINAND_ECCINFO(&xt26g01c_ooblayout, |
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296 | | - xt26g01c_ecc_get_status)), |
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| 318 | + xt26g11c_ecc_get_status)), |
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| 319 | + SPINAND_INFO("XT26Q02DWSIGA", |
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| 320 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52), |
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| 321 | + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), |
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| 322 | + NAND_ECCREQ(8, 512), |
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| 323 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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| 324 | + &write_cache_variants, |
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| 325 | + &update_cache_variants), |
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| 326 | + SPINAND_HAS_QE_BIT, |
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| 327 | + SPINAND_ECCINFO(&xt26g01c_ooblayout, xt26g11c_ecc_get_status)), |
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| 328 | + SPINAND_INFO("XT26Q01DWSIGA", |
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| 329 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51), |
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| 330 | + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
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| 331 | + NAND_ECCREQ(8, 512), |
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| 332 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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| 333 | + &write_cache_variants, |
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| 334 | + &update_cache_variants), |
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| 335 | + SPINAND_HAS_QE_BIT, |
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| 336 | + SPINAND_ECCINFO(&xt26g01c_ooblayout, xt26g11c_ecc_get_status)), |
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| 337 | + SPINAND_INFO("XT26Q04DWSIGA", |
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| 338 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x53), |
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| 339 | + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
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| 340 | + NAND_ECCREQ(8, 512), |
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| 341 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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| 342 | + &write_cache_variants, |
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| 343 | + &update_cache_variants), |
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| 344 | + SPINAND_HAS_QE_BIT, |
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| 345 | + SPINAND_ECCINFO(&xt26g01c_ooblayout, xt26g11c_ecc_get_status)), |
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297 | 346 | }; |
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298 | 347 | |
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299 | 348 | static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = { |
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