kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/mmc/host/tmio_mmc.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0
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 /*
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  * Driver for the MMC / SD / SDIO cell found in:
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  *
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@@ -7,12 +8,9 @@
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  * Copyright (C) 2017 Horms Solutions, Simon Horman
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  * Copyright (C) 2007 Ian Molton
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  * Copyright (C) 2004 Ian Molton
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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12
 
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+#include <linux/delay.h>
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 #include <linux/device.h>
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 #include <linux/mfd/core.h>
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 #include <linux/mfd/tmio.h>
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@@ -22,6 +20,68 @@
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 #include <linux/scatterlist.h>
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21
 
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 #include "tmio_mmc.h"
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+
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+/* Registers specific to this variant */
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+#define CTL_SDIO_REGS		0x100
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+#define CTL_CLK_AND_WAIT_CTL	0x138
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+#define CTL_RESET_SDIO		0x1e0
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+
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+static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
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+{
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+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
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+		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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+
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+	usleep_range(10000, 11000);
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+	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
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+	usleep_range(10000, 11000);
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+}
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+
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+static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
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+{
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+	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
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+	usleep_range(10000, 11000);
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+
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+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
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+		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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+
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+	usleep_range(10000, 11000);
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+}
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+
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+static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
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+			       unsigned int new_clock)
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+{
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+	unsigned int divisor;
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+	u32 clk = 0;
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+	int clk_sel;
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+
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+	if (new_clock == 0) {
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+		tmio_mmc_clk_stop(host);
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+		return;
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+	}
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+
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+	divisor = host->pdata->hclk / new_clock;
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+
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+	/* bit7 set: 1/512, ... bit0 set: 1/4, all bits clear: 1/2 */
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+	clk_sel = (divisor <= 1);
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+	clk = clk_sel ? 0 : (roundup_pow_of_two(divisor) >> 2);
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+
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+	host->pdata->set_clk_div(host->pdev, clk_sel);
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+
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+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
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+			sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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+	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
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+	usleep_range(10000, 11000);
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+
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+	tmio_mmc_clk_start(host);
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+}
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+
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+static void tmio_mmc_reset(struct tmio_mmc_host *host)
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+{
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+	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
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+	usleep_range(10000, 11000);
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+	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
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+	usleep_range(10000, 11000);
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+}
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85
 
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 #ifdef CONFIG_PM_SLEEP
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 static int tmio_mmc_suspend(struct device *dev)
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@@ -90,8 +150,6 @@
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 		goto cell_disable;
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 	}
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-	pdata->flags |= TMIO_MMC_HAVE_HIGH_REG;
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-
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 	host = tmio_mmc_host_alloc(pdev, pdata);
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 	if (IS_ERR(host)) {
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 		ret = PTR_ERR(host);
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@@ -100,6 +158,8 @@
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 	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
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 	host->bus_shift = resource_size(res) >> 10;
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+	host->set_clock = tmio_mmc_set_clock;
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+	host->reset = tmio_mmc_reset;
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 	host->mmc->f_max = pdata->hclk;
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 	host->mmc->f_min = pdata->hclk / 512;