kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/mmc/host/sdhci-iproc.c
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..
@@ -15,6 +15,7 @@
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  * iProc SDHCI platform driver
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  */
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17
 
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+#include <linux/acpi.h>
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 #include <linux/delay.h>
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 #include <linux/module.h>
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 #include <linux/mmc/host.h>
..
..
@@ -162,9 +163,36 @@
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 	sdhci_iproc_writel(host, newval, reg & ~3);
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 }
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165
 
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+static unsigned int sdhci_iproc_get_max_clock(struct sdhci_host *host)
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+{
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+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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+
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+	if (pltfm_host->clk)
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+		return sdhci_pltfm_clk_get_max_clock(host);
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+	else
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+		return pltfm_host->clock;
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+}
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+
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+/*
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+ * There is a known bug on BCM2711's SDHCI core integration where the
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+ * controller will hang when the difference between the core clock and the bus
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+ * clock is too great. Specifically this can be reproduced under the following
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+ * conditions:
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+ *
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+ *  - No SD card plugged in, polling thread is running, probing cards at
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+ *    100 kHz.
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+ *  - BCM2711's core clock configured at 500MHz or more
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+ *
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+ * So we set 200kHz as the minimum clock frequency available for that SoC.
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+ */
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+static unsigned int sdhci_iproc_bcm2711_get_min_clock(struct sdhci_host *host)
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+{
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+	return 200000;
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+}
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+
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 static const struct sdhci_ops sdhci_iproc_ops = {
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 	.set_clock = sdhci_set_clock,
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-	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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+	.get_max_clock = sdhci_iproc_get_max_clock,
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 	.set_bus_width = sdhci_set_bus_width,
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 	.reset = sdhci_reset,
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 	.set_uhs_signaling = sdhci_set_uhs_signaling,
..
..
@@ -178,7 +206,7 @@
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 	.write_w = sdhci_iproc_writew,
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 	.write_b = sdhci_iproc_writeb,
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 	.set_clock = sdhci_set_clock,
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-	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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+	.get_max_clock = sdhci_iproc_get_max_clock,
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 	.set_bus_width = sdhci_set_bus_width,
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 	.reset = sdhci_reset,
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 	.set_uhs_signaling = sdhci_set_uhs_signaling,
..
..
@@ -250,27 +278,80 @@
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 	.mmc_caps = 0x00000000,
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279
 };
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280
 
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+static const struct sdhci_ops sdhci_iproc_bcm2711_ops = {
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+	.read_l = sdhci_iproc_readl,
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+	.read_w = sdhci_iproc_readw,
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+	.read_b = sdhci_iproc_readb,
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+	.write_l = sdhci_iproc_writel,
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+	.write_w = sdhci_iproc_writew,
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+	.write_b = sdhci_iproc_writeb,
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+	.set_clock = sdhci_set_clock,
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+	.set_power = sdhci_set_power_and_bus_voltage,
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+	.get_max_clock = sdhci_iproc_get_max_clock,
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+	.get_min_clock = sdhci_iproc_bcm2711_get_min_clock,
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+	.set_bus_width = sdhci_set_bus_width,
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+	.reset = sdhci_reset,
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+	.set_uhs_signaling = sdhci_set_uhs_signaling,
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+};
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+
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+static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = {
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+	.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
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+	.ops = &sdhci_iproc_bcm2711_ops,
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+};
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+
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+static const struct sdhci_iproc_data bcm2711_data = {
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+	.pdata = &sdhci_bcm2711_pltfm_data,
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+	.mmc_caps = MMC_CAP_3_3V_DDR,
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+};
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+
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 static const struct of_device_id sdhci_iproc_of_match[] = {
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 	{ .compatible = "brcm,bcm2835-sdhci", .data = &bcm2835_data },
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+	{ .compatible = "brcm,bcm2711-emmc2", .data = &bcm2711_data },
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 	{ .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_cygnus_data},
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 	{ .compatible = "brcm,sdhci-iproc", .data = &iproc_data },
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 	{ }
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 };
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314
 MODULE_DEVICE_TABLE(of, sdhci_iproc_of_match);
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315
 
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+#ifdef CONFIG_ACPI
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+/*
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+ * This is a duplicate of bcm2835_(pltfrm_)data without caps quirks
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+ * which are provided by the ACPI table.
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+ */
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+static const struct sdhci_pltfm_data sdhci_bcm_arasan_data = {
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+	.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
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+		  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
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+		  SDHCI_QUIRK_NO_HISPD_BIT,
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+	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
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+	.ops = &sdhci_iproc_32only_ops,
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+};
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+
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+static const struct sdhci_iproc_data bcm_arasan_data = {
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+	.pdata = &sdhci_bcm_arasan_data,
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+};
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+
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+static const struct acpi_device_id sdhci_iproc_acpi_ids[] = {
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+	{ .id = "BRCM5871", .driver_data = (kernel_ulong_t)&iproc_cygnus_data },
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+	{ .id = "BRCM5872", .driver_data = (kernel_ulong_t)&iproc_data },
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+	{ .id = "BCM2847",  .driver_data = (kernel_ulong_t)&bcm_arasan_data },
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+	{ .id = "BRCME88C", .driver_data = (kernel_ulong_t)&bcm2711_data },
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+	{ /* sentinel */ }
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+};
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+MODULE_DEVICE_TABLE(acpi, sdhci_iproc_acpi_ids);
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+#endif
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+
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 static int sdhci_iproc_probe(struct platform_device *pdev)
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 {
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-	const struct of_device_id *match;
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-	const struct sdhci_iproc_data *iproc_data;
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+	struct device *dev = &pdev->dev;
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+	const struct sdhci_iproc_data *iproc_data = NULL;
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 	struct sdhci_host *host;
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 	struct sdhci_iproc_host *iproc_host;
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 	struct sdhci_pltfm_host *pltfm_host;
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 	int ret;
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351
 
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-	match = of_match_device(sdhci_iproc_of_match, &pdev->dev);
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-	if (!match)
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-		return -EINVAL;
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-	iproc_data = match->data;
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+	iproc_data = device_get_match_data(dev);
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+	if (!iproc_data)
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+		return -ENODEV;
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355
 
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 	host = sdhci_pltfm_init(pdev, iproc_data->pdata, sizeof(*iproc_host));
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 	if (IS_ERR(host))
..
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@@ -285,19 +366,21 @@
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 	if (ret)
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 		goto err;
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368
 
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-	sdhci_get_of_property(pdev);
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+	sdhci_get_property(pdev);
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370
 
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 	host->mmc->caps |= iproc_host->data->mmc_caps;
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372
 
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-	pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
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-	if (IS_ERR(pltfm_host->clk)) {
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-		ret = PTR_ERR(pltfm_host->clk);
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-		goto err;
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-	}
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-	ret = clk_prepare_enable(pltfm_host->clk);
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-	if (ret) {
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-		dev_err(&pdev->dev, "failed to enable host clk\n");
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-		goto err;
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+	if (dev->of_node) {
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+		pltfm_host->clk = devm_clk_get(dev, NULL);
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+		if (IS_ERR(pltfm_host->clk)) {
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+			ret = PTR_ERR(pltfm_host->clk);
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+			goto err;
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+		}
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+		ret = clk_prepare_enable(pltfm_host->clk);
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+		if (ret) {
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+			dev_err(dev, "failed to enable host clk\n");
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+			goto err;
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+		}
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 	}
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385
 
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 	if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) {
..
..
@@ -312,7 +395,8 @@
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 	return 0;
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396
 
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 err_clk:
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-	clk_disable_unprepare(pltfm_host->clk);
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+	if (dev->of_node)
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+		clk_disable_unprepare(pltfm_host->clk);
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400
 err:
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 	sdhci_pltfm_free(pdev);
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 	return ret;
..
..
@@ -323,6 +407,7 @@
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 		.name = "sdhci-iproc",
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 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
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 		.of_match_table = sdhci_iproc_of_match,
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+		.acpi_match_table = ACPI_PTR(sdhci_iproc_acpi_ids),
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 		.pm = &sdhci_pltfm_pmops,
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 	},
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 	.probe = sdhci_iproc_probe,