kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/mmc/host/renesas_sdhi.h
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@@ -1,12 +1,9 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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 /*
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  * Renesas Mobile SDHI
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  *
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  * Copyright (C) 2017 Horms Solutions Ltd., Simon Horman
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- * Copyright (C) 2017 Renesas Electronics Corporation
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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+ * Copyright (C) 2017-19 Renesas Electronics Corporation
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  */
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 #ifndef RENESAS_SDHI_H
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@@ -17,7 +14,8 @@
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 struct renesas_sdhi_scc {
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 	unsigned long clk_rate;	/* clock rate for SDR104 */
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-	u32 tap;		/* sampling clock position for SDR104 */
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+	u32 tap;		/* sampling clock position for SDR104/HS400 (8 TAP) */
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+	u32 tap_hs400_4tap;	/* sampling clock position for HS400 (4 TAP) */
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 };
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 struct renesas_sdhi_of_data {
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@@ -35,6 +33,15 @@
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 	unsigned short max_segs;
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 };
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+#define SDHI_CALIB_TABLE_MAX 32
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+
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+struct renesas_sdhi_quirks {
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+	bool hs400_disabled;
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+	bool hs400_4taps;
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+	u32 hs400_bad_taps;
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+	const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
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+};
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+
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 struct tmio_mmc_dma {
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 	enum dma_slave_buswidth dma_buswidth;
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 	bool (*filter)(struct dma_chan *chan, void *arg);
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@@ -48,10 +55,21 @@
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 	struct clk *clk_cd;
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 	struct tmio_mmc_data mmc_data;
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 	struct tmio_mmc_dma dma_priv;
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+	const struct renesas_sdhi_quirks *quirks;
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 	struct pinctrl *pinctrl;
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 	struct pinctrl_state *pins_default, *pins_uhs;
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 	void __iomem *scc_ctl;
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 	u32 scc_tappos;
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+	u32 scc_tappos_hs400;
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+	const u8 *adjust_hs400_calib_table;
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+	bool needs_adjust_hs400;
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+
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+	/* Tuning values: 1 for success, 0 for failure */
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+	DECLARE_BITMAP(taps, BITS_PER_LONG);
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+	/* Sampling data comparison: 1 for match, 0 for mismatch */
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+	DECLARE_BITMAP(smpcmp, BITS_PER_LONG);
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+	unsigned int tap_num;
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+	unsigned int tap_set;
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 };
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 #define host_to_priv(host) \