kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/media/platform/rockchip/cif/subdev-itf.c
..
..
@@ -342,7 +342,10 @@
342
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 		mode = (struct rkisp_vicap_mode *)arg;
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 		memcpy(&priv->mode, mode, sizeof(*mode));
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 		sditf_reinit_mode(priv, &priv->mode);
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-		mode->input.merge_num = cif_dev->sditf_cnt;
345
+		if (priv->is_combine_mode)
346
+			mode->input.merge_num = cif_dev->sditf_cnt;
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+		else
348
+			mode->input.merge_num = 1;
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 		mode->input.index = priv->combine_index;
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 		return 0;
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351
 	case RKISP_VICAP_CMD_INIT_BUF:
..
..
@@ -430,6 +433,7 @@
430
433
 static int sditf_channel_enable(struct sditf_priv *priv, int user)
431
434
 {
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 	struct rkcif_device *cif_dev = priv->cif_dev;
436
+	struct rkmodule_capture_info *capture_info = &cif_dev->channels[0].capture_info;
433
437
 	unsigned int ch0 = 0, ch1 = 0, ch2 = 0;
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438
 	unsigned int ctrl_val = 0;
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439
 	unsigned int int_en = 0;
..
..
@@ -437,11 +441,25 @@
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 	unsigned int offset_y = 0;
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 	unsigned int width = priv->cap_info.width;
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 	unsigned int height = priv->cap_info.height;
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+	int csi_idx = cif_dev->csi_host_idx;
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+
446
+	if (capture_info->mode == RKMODULE_MULTI_DEV_COMBINE_ONE &&
447
+	    priv->toisp_inf.link_mode == TOISP_UNITE) {
448
+		if (capture_info->multi_dev.dev_num != 2 ||
449
+		    capture_info->multi_dev.pixel_offset != RKMOUDLE_UNITE_EXTEND_PIXEL) {
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+			v4l2_err(&cif_dev->v4l2_dev,
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+				 "param error of online mode, combine dev num %d, offset %d\n",
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+				 capture_info->multi_dev.dev_num,
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+				 capture_info->multi_dev.pixel_offset);
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+			return -EINVAL;
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+		}
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+		csi_idx = capture_info->multi_dev.dev_idx[user];
457
+	}
440
458
 
441
459
 	if (priv->hdr_cfg.hdr_mode == NO_HDR ||
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460
 	    priv->hdr_cfg.hdr_mode == HDR_COMPR) {
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461
 		if (cif_dev->inf_id == RKCIF_MIPI_LVDS)
444
-			ch0 = cif_dev->csi_host_idx * 4;
462
+			ch0 = csi_idx * 4;
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463
 		else
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 			ch0 = 24;//dvp
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465
 		ctrl_val = (ch0 << 3) | 0x1;
..
..
@@ -496,7 +514,10 @@
496
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 		}
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 	} else {
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 		if (priv->toisp_inf.link_mode == TOISP_UNITE) {
499
-			offset_x = priv->cap_info.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
517
+			if (capture_info->mode == RKMODULE_MULTI_DEV_COMBINE_ONE)
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+				offset_x = 0;
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+			else
520
+				offset_x = priv->cap_info.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
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521
 			width = priv->cap_info.width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
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 		}
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523
 		rkcif_write_register(cif_dev, CIF_REG_TOISP1_CTRL, ctrl_val);
..
..
@@ -606,36 +627,39 @@
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627
 	struct rkcif_device *cif_dev = priv->cif_dev;
607
628
 	struct v4l2_subdev_format fmt;
608
629
 	unsigned int mode = RKCIF_STREAM_MODE_TOISP;
630
+	int ret = 0;
609
631
 
610
632
 	sditf_check_capture_mode(cif_dev);
611
633
 	sditf_get_set_fmt(&priv->sd, NULL, &fmt);
612
634
 	if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) {
613
635
 		if (priv->toisp_inf.link_mode == TOISP0) {
614
-			sditf_channel_enable(priv, 0);
636
+			ret = sditf_channel_enable(priv, 0);
615
637
 		} else if (priv->toisp_inf.link_mode == TOISP1) {
616
-			sditf_channel_enable(priv, 1);
638
+			ret = sditf_channel_enable(priv, 1);
617
639
 		} else if (priv->toisp_inf.link_mode == TOISP_UNITE) {
618
-			sditf_channel_enable(priv, 0);
619
-			sditf_channel_enable(priv, 1);
640
+			ret = sditf_channel_enable(priv, 0);
641
+			ret |= sditf_channel_enable(priv, 1);
620
642
 		}
621
643
 		mode = RKCIF_STREAM_MODE_TOISP;
622
644
 	} else if (priv->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO) {
623
645
 		mode = RKCIF_STREAM_MODE_TOISP_RDBK;
624
646
 	}
647
+	if (ret)
648
+		return ret;
625
649
 
626
650
 	if (priv->hdr_cfg.hdr_mode == NO_HDR ||
627
651
 	    priv->hdr_cfg.hdr_mode == HDR_COMPR) {
628
-		rkcif_do_start_stream(&cif_dev->stream[0], mode);
652
+		ret = rkcif_do_start_stream(&cif_dev->stream[0], mode);
629
653
 	} else if (priv->hdr_cfg.hdr_mode == HDR_X2) {
630
-		rkcif_do_start_stream(&cif_dev->stream[0], mode);
631
-		rkcif_do_start_stream(&cif_dev->stream[1], mode);
654
+		ret = rkcif_do_start_stream(&cif_dev->stream[0], mode);
655
+		ret |= rkcif_do_start_stream(&cif_dev->stream[1], mode);
632
656
 	} else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
633
-		rkcif_do_start_stream(&cif_dev->stream[0], mode);
634
-		rkcif_do_start_stream(&cif_dev->stream[1], mode);
635
-		rkcif_do_start_stream(&cif_dev->stream[2], mode);
657
+		ret = rkcif_do_start_stream(&cif_dev->stream[0], mode);
658
+		ret |= rkcif_do_start_stream(&cif_dev->stream[1], mode);
659
+		ret |= rkcif_do_start_stream(&cif_dev->stream[2], mode);
636
660
 	}
637
661
 	INIT_LIST_HEAD(&priv->buf_free_list);
638
-	return 0;
662
+	return ret;
639
663
 }
640
664
 
641
665
 static int sditf_stop_stream(struct sditf_priv *priv)
..
..
@@ -697,6 +721,8 @@
697
721
 		}
698
722
 
699
723
 	}
724
+	if (on && ret)
725
+		atomic_dec(&priv->stream_cnt);
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726
 	return ret;
701
727
 }
702
728
 
..
..
@@ -724,6 +750,7 @@
724
750
 		} else {
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751
 			v4l2_pipeline_pm_put(&node->vdev.entity);
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752
 			pm_runtime_put_sync(cif_dev->dev);
753
+			priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AIQ;
727
754
 		}
728
755
 		v4l2_info(&node->vdev, "s_power %d, entity use_count %d\n",
729
756
 			  on, node->vdev.entity.use_count);
..
..
@@ -779,10 +806,11 @@
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806
 		return -EINVAL;
780
807
 
781
808
 	rx_buf = to_cif_rx_buf(dbufs);
782
-
809
+	v4l2_dbg(rkcif_debug, 3, &cif_dev->v4l2_dev, "buf back to vicap 0x%x\n",
810
+		 (u32)rx_buf->dummy.dma_addr);
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811
 	spin_lock_irqsave(&stream->vbq_lock, flags);
784
-	stream->buf_num_toisp++;
785
812
 	stream->last_rx_buf_idx = dbufs->sequence + 1;
813
+	atomic_inc(&stream->buf_cnt);
786
814
 
787
815
 	if (!list_empty(&stream->rx_buf_head) &&
788
816
 	    cif_dev->is_thunderboot &&
..
..
@@ -791,6 +819,8 @@
791
819
 		spin_lock_irqsave(&cif_dev->buffree_lock, buffree_flags);
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820
 		list_add_tail(&rx_buf->list_free, &priv->buf_free_list);
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821
 		spin_unlock_irqrestore(&cif_dev->buffree_lock, buffree_flags);
822
+		atomic_dec(&stream->buf_cnt);
823
+		stream->total_buf_num--;
794
824
 		schedule_work(&priv->buffree_work.work);
795
825
 		is_free = true;
796
826
 	}