kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/irqchip/irq-gic.c
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@@ -47,6 +47,10 @@
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 #include "irq-gic-common.h"
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+#ifdef CONFIG_ROCKCHIP_AMP
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+#include <soc/rockchip/rockchip_amp.h>
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+#endif
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+
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 #ifdef CONFIG_ARM64
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 #include <asm/cpufeature.h>
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@@ -194,11 +198,19 @@
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 static void gic_mask_irq(struct irq_data *d)
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 {
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return;
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+#endif
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 	gic_poke_irq(d, GIC_DIST_ENABLE_CLEAR);
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 }
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 static void gic_eoimode1_mask_irq(struct irq_data *d)
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 {
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return;
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+#endif
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 	gic_mask_irq(d);
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 	/*
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 	 * When masking a forwarded interrupt, make sure it is
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@@ -214,6 +226,10 @@
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 static void gic_unmask_irq(struct irq_data *d)
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 {
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return;
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+#endif
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 	gic_poke_irq(d, GIC_DIST_ENABLE_SET);
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 }
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@@ -221,6 +237,10 @@
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 {
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 	u32 hwirq = gic_irq(d);
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(hwirq))
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+		return;
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+#endif
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 	if (hwirq < 16)
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 		hwirq = this_cpu_read(sgi_intid);
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@@ -231,6 +251,10 @@
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 {
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 	u32 hwirq = gic_irq(d);
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return;
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+#endif
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 	/* Do not deactivate an IRQ forwarded to a vcpu. */
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 	if (irqd_is_forwarded_to_vcpu(d))
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 		return;
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@@ -246,6 +270,10 @@
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 {
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 	u32 reg;
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return -EINVAL;
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+#endif
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 	switch (which) {
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 	case IRQCHIP_STATE_PENDING:
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 		reg = val ? GIC_DIST_PENDING_SET : GIC_DIST_PENDING_CLEAR;
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@@ -295,6 +323,11 @@
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 	void __iomem *base = gic_dist_base(d);
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 	unsigned int gicirq = gic_irq(d);
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 	int ret;
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+
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return -EINVAL;
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+#endif
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 	/* Interrupt configuration for SGIs can't be changed */
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 	if (gicirq < 16)
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@@ -492,10 +525,29 @@
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 	 * Set all global interrupts to this CPU only.
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 	 */
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 	cpumask = gic_get_cpumask(gic);
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+
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	for (i = 32; i < gic_irqs; i += 4) {
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+		u32 maskval;
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+		unsigned int j;
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+
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+		maskval = 0;
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+		for (j = 0; j < 4; j++) {
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+			if (rockchip_amp_check_amp_irq(i + j)) {
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+				maskval |= rockchip_amp_get_irq_cpumask(i + j) <<
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+					   (j * 8);
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+			} else {
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+				maskval |= cpumask << (j * 8);
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+			}
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+		}
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+		writel_relaxed(maskval, base + GIC_DIST_TARGET + i * 4 / 4);
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+	}
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+#else
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 	cpumask |= cpumask << 8;
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 	cpumask |= cpumask << 16;
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 	for (i = 32; i < gic_irqs; i += 4)
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 		writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
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+#endif
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 	gic_dist_config(base, gic_irqs, NULL);
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@@ -846,6 +898,11 @@
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 {
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 	void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d);
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 	unsigned int cpu;
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+
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	if (rockchip_amp_check_amp_irq(gic_irq(d)))
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+		return -EINVAL;
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+#endif
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 	if (!force)
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 		cpu = cpumask_any_and(mask_val, cpu_online_mask);
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@@ -1509,6 +1566,10 @@
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 	gic_enable_of_quirks(node, gic_quirks, gic);
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+#ifdef CONFIG_ROCKCHIP_AMP
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+	rockchip_amp_get_gic_info();
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+#endif
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+
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 	return 0;
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 error: