kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/gpu/drm/rockchip/dw-dp.c
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@@ -239,8 +239,14 @@
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 #define DPTX_HDCP22GPIOCHNGSTS			0x362c
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 #define DPTX_HDCPREG_DPK_CRC			0x3630
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+#define HDCP_KEY_SIZE				308
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+#define HDCP_KEY_SEED_SIZE			2
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+
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 #define HDCP_DATA_SIZE				330
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 #define DP_HDCP1X_ID				6
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+
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+#define HDCP_SIG_MAGIC				0x4B534541	/* "AESK" */
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+#define HDCP_FLG_AES				1
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 #define DPTX_MAX_REGISTER			DPTX_HDCPREG_DPK_CRC
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@@ -407,6 +413,14 @@
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 	int color_format;
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 };
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+struct hdcp_key_data_t {
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+	unsigned int signature;
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+	unsigned int length;
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+	unsigned int crc;
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+	unsigned int flags;
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+	unsigned char data[];
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+};
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+
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 enum {
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 	DPTX_VM_RGB_6BIT,
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 	DPTX_VM_RGB_8BIT,
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@@ -499,6 +513,8 @@
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 	u8 hdcp_vendor_data[HDCP_DATA_SIZE + 1];
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 	void __iomem *base;
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 	struct arm_smccc_res res;
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+	struct hdcp_key_data_t *key_data;
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+	bool aes_encrypt;
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 	regmap_read(dp->regmap, DPTX_HDCPREG_RMLSTS, &val);
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 	if (FIELD_GET(IDPK_DATA_INDEX, val) == 40) {
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@@ -507,10 +523,16 @@
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 	}
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 	size = rk_vendor_read(DP_HDCP1X_ID, hdcp_vendor_data, HDCP_DATA_SIZE);
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-	if (size < HDCP_DATA_SIZE)  {
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-		dev_info(dp->dev, "HDCP: read size %d\n", size);
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+	if (size < (HDCP_KEY_SIZE + HDCP_KEY_SEED_SIZE))  {
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+		dev_info(dp->dev, "HDCP key read error, size: %d\n", size);
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 		return -EINVAL;
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 	}
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+
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+	key_data = (struct hdcp_key_data_t *)hdcp_vendor_data;
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+	if ((key_data->signature != HDCP_SIG_MAGIC) || !(key_data->flags & HDCP_FLG_AES))
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+		aes_encrypt = false;
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+	else
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+		aes_encrypt = true;
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 	base = sip_hdcp_request_share_memory(dp->id ? DP_TX1 : DP_TX0);
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 	if (!base)
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@@ -518,7 +540,7 @@
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 	memcpy_toio(base, hdcp_vendor_data, size);
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-	res = sip_hdcp_config(HDCP_FUNC_KEY_LOAD, dp->id ? DP_TX1 : DP_TX0, 0);
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+	res = sip_hdcp_config(HDCP_FUNC_KEY_LOAD, dp->id ? DP_TX1 : DP_TX0, !aes_encrypt);
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 	if (IS_SIP_ERROR(res.a0)) {
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 		dev_err(dp->dev, "load hdcp key failed\n");
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 		return -EBUSY;