hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/drivers/gpu/drm/radeon/radeon.h
....@@ -68,6 +68,10 @@
6868 #include <linux/hashtable.h>
6969 #include <linux/dma-fence.h>
7070
71
+#ifdef CONFIG_MMU_NOTIFIER
72
+#include <linux/mmu_notifier.h>
73
+#endif
74
+
7175 #include <drm/ttm/ttm_bo_api.h>
7276 #include <drm/ttm/ttm_bo_driver.h>
7377 #include <drm/ttm/ttm_placement.h>
....@@ -448,10 +452,7 @@
448452 * TTM.
449453 */
450454 struct radeon_mman {
451
- struct ttm_bo_global_ref bo_global_ref;
452
- struct drm_global_reference mem_global_ref;
453455 struct ttm_bo_device bdev;
454
- bool mem_global_referenced;
455456 bool initialized;
456457
457458 #if defined(CONFIG_DEBUG_FS)
....@@ -508,15 +509,15 @@
508509 struct list_head va;
509510 /* Constant after initialization */
510511 struct radeon_device *rdev;
511
- struct drm_gem_object gem_base;
512512
513513 struct ttm_bo_kmap_obj dma_buf_vmap;
514514 pid_t pid;
515515
516
- struct radeon_mn *mn;
517
- struct list_head mn_list;
516
+#ifdef CONFIG_MMU_NOTIFIER
517
+ struct mmu_interval_notifier notifier;
518
+#endif
518519 };
519
-#define gem_to_radeon_bo(gobj) container_of((gobj), struct radeon_bo, gem_base)
520
+#define gem_to_radeon_bo(gobj) container_of((gobj), struct radeon_bo, tbo.base)
520521
521522 int radeon_gem_debugfs_init(struct radeon_device *rdev);
522523
....@@ -623,7 +624,7 @@
623624 struct radeon_fence *fence);
624625 int radeon_sync_resv(struct radeon_device *rdev,
625626 struct radeon_sync *sync,
626
- struct reservation_object *resv,
627
+ struct dma_resv *resv,
627628 bool shared);
628629 int radeon_sync_rings(struct radeon_device *rdev,
629630 struct radeon_sync *sync,
....@@ -1917,20 +1918,20 @@
19171918 uint64_t src_offset,
19181919 uint64_t dst_offset,
19191920 unsigned num_gpu_pages,
1920
- struct reservation_object *resv);
1921
+ struct dma_resv *resv);
19211922 u32 blit_ring_index;
19221923 struct radeon_fence *(*dma)(struct radeon_device *rdev,
19231924 uint64_t src_offset,
19241925 uint64_t dst_offset,
19251926 unsigned num_gpu_pages,
1926
- struct reservation_object *resv);
1927
+ struct dma_resv *resv);
19271928 u32 dma_ring_index;
19281929 /* method used for bo copy */
19291930 struct radeon_fence *(*copy)(struct radeon_device *rdev,
19301931 uint64_t src_offset,
19311932 uint64_t dst_offset,
19321933 unsigned num_gpu_pages,
1933
- struct reservation_object *resv);
1934
+ struct dma_resv *resv);
19341935 /* ring used for bo copies */
19351936 u32 copy_ring_index;
19361937 } copy;
....@@ -2391,7 +2392,6 @@
23912392 struct radeon_wb wb;
23922393 struct radeon_dummy_page dummy_page;
23932394 bool shutdown;
2394
- bool need_dma32;
23952395 bool need_swiotlb;
23962396 bool accel_working;
23972397 bool fastfb_working; /* IGP feature*/
....@@ -2455,9 +2455,6 @@
24552455 /* tracking pinned memory */
24562456 u64 vram_pin_size;
24572457 u64 gart_pin_size;
2458
-
2459
- struct mutex mn_lock;
2460
- DECLARE_HASHTABLE(mn_hash, 7);
24612458 };
24622459
24632460 bool radeon_is_px(struct drm_device *dev);
....@@ -2819,10 +2816,12 @@
28192816 extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
28202817 extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain);
28212818 extern bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo);
2822
-extern int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
2819
+extern int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
2820
+ struct ttm_tt *ttm, uint64_t addr,
28232821 uint32_t flags);
2824
-extern bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm);
2825
-extern bool radeon_ttm_tt_is_readonly(struct ttm_tt *ttm);
2822
+extern bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, struct ttm_tt *ttm);
2823
+extern bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, struct ttm_tt *ttm);
2824
+bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev, struct ttm_tt *ttm);
28262825 extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base);
28272826 extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
28282827 extern int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
....@@ -2832,6 +2831,7 @@
28322831 extern void radeon_program_register_sequence(struct radeon_device *rdev,
28332832 const u32 *registers,
28342833 const u32 array_size);
2834
+struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev);
28352835
28362836 /*
28372837 * vm
....@@ -2860,7 +2860,7 @@
28602860 struct radeon_vm *vm);
28612861 int radeon_vm_bo_update(struct radeon_device *rdev,
28622862 struct radeon_bo_va *bo_va,
2863
- struct ttm_mem_reg *mem);
2863
+ struct ttm_resource *mem);
28642864 void radeon_vm_bo_invalidate(struct radeon_device *rdev,
28652865 struct radeon_bo *bo);
28662866 struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm,