kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
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@@ -25,6 +25,7 @@
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 #include "changk104.h"
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 #include <core/gpuobj.h>
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+#include <subdev/fault.h>
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 #include <nvif/class.h>
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@@ -41,6 +42,7 @@
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 	.size = 8,
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 	.cgrp = gk110_fifo_runlist_cgrp,
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 	.chan = gm107_fifo_runlist_chan,
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+	.commit = gk104_fifo_runlist_commit,
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 };
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 const struct nvkm_enum
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@@ -66,9 +68,34 @@
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 	{}
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 };
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+void
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+gm107_fifo_intr_fault(struct nvkm_fifo *fifo, int unit)
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+{
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+	struct nvkm_device *device = fifo->engine.subdev.device;
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+	u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));
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+	u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));
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+	u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
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+	u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10));
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+	struct nvkm_fault_data info;
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+
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+	info.inst   =  (u64)inst << 12;
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+	info.addr   = ((u64)vahi << 32) | valo;
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+	info.time   = 0;
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+	info.engine = unit;
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+	info.valid  = 1;
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+	info.gpc    = (type & 0x1f000000) >> 24;
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+	info.client = (type & 0x00003f00) >> 8;
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+	info.access = (type & 0x00000080) >> 7;
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+	info.hub    = (type & 0x00000040) >> 6;
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+	info.reason = (type & 0x0000000f);
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+
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+	nvkm_fifo_fault(fifo, &info);
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+}
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+
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 static const struct gk104_fifo_func
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 gm107_fifo = {
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-	.init_pbdma_timeout = gk208_fifo_init_pbdma_timeout,
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+	.intr.fault = gm107_fifo_intr_fault,
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+	.pbdma = &gk208_fifo_pbdma,
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 	.fault.access = gk104_fifo_fault_access,
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 	.fault.engine = gm107_fifo_fault_engine,
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 	.fault.reason = gk104_fifo_fault_reason,