kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/gpu/drm/nouveau/nv10_fence.c
..
..
@@ -21,20 +21,22 @@
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  *
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  * Authors: Ben Skeggs <bskeggs@redhat.com>
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  */
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-
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 #include "nouveau_drv.h"
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 #include "nouveau_dma.h"
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 #include "nv10_fence.h"
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+#include <nvif/push006c.h>
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+
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+#include <nvhw/class/cl006e.h>
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+
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 int
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 nv10_fence_emit(struct nouveau_fence *fence)
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 {
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-	struct nouveau_channel *chan = fence->channel;
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-	int ret = RING_SPACE(chan, 2);
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+	struct nvif_push *push = fence->channel->chan.push;
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+	int ret = PUSH_WAIT(push, 2);
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 	if (ret == 0) {
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-		BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
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-		OUT_RING  (chan, fence->base.seqno);
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-		FIRE_RING (chan);
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+		PUSH_MTHD(push, NV06E, SET_REFERENCE, fence->base.seqno);
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+		PUSH_KICK(push);
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 	}
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 	return ret;
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 }
..
..
@@ -50,7 +52,7 @@
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 u32
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 nv10_fence_read(struct nouveau_channel *chan)
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 {
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-	return nvif_rd32(&chan->user, 0x0048);
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+	return NVIF_RD32(&chan->user, NV06E, REFERENCE);
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 }
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 void
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@@ -58,7 +60,7 @@
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 {
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 	struct nv10_fence_chan *fctx = chan->fence;
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 	nouveau_fence_context_del(&fctx->base);
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-	nvif_object_fini(&fctx->sema);
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+	nvif_object_dtor(&fctx->sema);
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 	chan->fence = NULL;
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 	nouveau_fence_context_free(&fctx->base);
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 }