kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/gpu/drm/nouveau/include/nvif/class.h
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@@ -1,4 +1,4 @@
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-/* SPDX-License-Identifier: GPL-2.0 */
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+/* SPDX-License-Identifier: MIT */
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 #ifndef __NVIF_CLASS_H__
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 #define __NVIF_CLASS_H__
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@@ -54,6 +54,9 @@
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 #define VOLTA_USERMODE_A                                             0x0000c361
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+#define MAXWELL_FAULT_BUFFER_A                        /* clb069.h */ 0x0000b069
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+#define VOLTA_FAULT_BUFFER_A                          /* clb069.h */ 0x0000c369
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+
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 #define NV03_CHANNEL_DMA                              /* cl506b.h */ 0x0000006b
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 #define NV10_CHANNEL_DMA                              /* cl506b.h */ 0x0000006e
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 #define NV17_CHANNEL_DMA                              /* cl506b.h */ 0x0000176e
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@@ -68,7 +71,8 @@
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 #define KEPLER_CHANNEL_GPFIFO_B                       /* cla06f.h */ 0x0000a16f
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 #define MAXWELL_CHANNEL_GPFIFO_A                      /* cla06f.h */ 0x0000b06f
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 #define PASCAL_CHANNEL_GPFIFO_A                       /* cla06f.h */ 0x0000c06f
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-#define VOLTA_CHANNEL_GPFIFO_A                        /* cla06f.h */ 0x0000c36f
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+#define VOLTA_CHANNEL_GPFIFO_A                        /* clc36f.h */ 0x0000c36f
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+#define TURING_CHANNEL_GPFIFO_A                       /* clc36f.h */ 0x0000c46f
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 #define NV50_DISP                                     /* cl5070.h */ 0x00005070
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 #define G82_DISP                                      /* cl5070.h */ 0x00008270
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@@ -83,6 +87,9 @@
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 #define GP100_DISP                                    /* cl5070.h */ 0x00009770
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 #define GP102_DISP                                    /* cl5070.h */ 0x00009870
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 #define GV100_DISP                                    /* cl5070.h */ 0x0000c370
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+#define TU102_DISP                                    /* cl5070.h */ 0x0000c570
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+
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+#define GV100_DISP_CAPS                                              0x0000c373
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 #define NV31_MPEG                                                    0x00003174
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 #define G82_MPEG                                                     0x00008274
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@@ -95,6 +102,7 @@
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 #define GF110_DISP_CURSOR                             /* cl507a.h */ 0x0000907a
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 #define GK104_DISP_CURSOR                             /* cl507a.h */ 0x0000917a
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 #define GV100_DISP_CURSOR                             /* cl507a.h */ 0x0000c37a
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+#define TU102_DISP_CURSOR                             /* cl507a.h */ 0x0000c57a
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 #define NV50_DISP_OVERLAY                             /* cl507b.h */ 0x0000507b
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 #define G82_DISP_OVERLAY                              /* cl507b.h */ 0x0000827b
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@@ -103,6 +111,7 @@
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 #define GK104_DISP_OVERLAY                            /* cl507b.h */ 0x0000917b
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 #define GV100_DISP_WINDOW_IMM_CHANNEL_DMA             /* clc37b.h */ 0x0000c37b
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+#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA             /* clc37b.h */ 0x0000c57b
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 #define NV50_DISP_BASE_CHANNEL_DMA                    /* cl507c.h */ 0x0000507c
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 #define G82_DISP_BASE_CHANNEL_DMA                     /* cl507c.h */ 0x0000827c
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@@ -125,6 +134,7 @@
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 #define GP100_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000977d
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 #define GP102_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000987d
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 #define GV100_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000c37d
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+#define TU102_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000c57d
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 #define NV50_DISP_OVERLAY_CHANNEL_DMA                 /* cl507e.h */ 0x0000507e
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 #define G82_DISP_OVERLAY_CHANNEL_DMA                  /* cl507e.h */ 0x0000827e
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@@ -134,6 +144,7 @@
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 #define GK104_DISP_OVERLAY_CONTROL_DMA                /* cl507e.h */ 0x0000917e
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 #define GV100_DISP_WINDOW_CHANNEL_DMA                 /* clc37e.h */ 0x0000c37e
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+#define TU102_DISP_WINDOW_CHANNEL_DMA                 /* clc37e.h */ 0x0000c57e
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 #define NV50_TESLA                                                   0x00005097
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 #define G82_TESLA                                                    0x00008297
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@@ -156,6 +167,8 @@
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 #define PASCAL_B                                      /* cl9097.h */ 0x0000c197
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 #define VOLTA_A                                       /* cl9097.h */ 0x0000c397
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+
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+#define TURING_A                                      /* cl9097.h */ 0x0000c597
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 #define NV74_BSP                                                     0x000074b0
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@@ -183,6 +196,7 @@
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 #define PASCAL_DMA_COPY_A                                            0x0000c0b5
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 #define PASCAL_DMA_COPY_B                                            0x0000c1b5
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 #define VOLTA_DMA_COPY_A                                             0x0000c3b5
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+#define TURING_DMA_COPY_A                                            0x0000c5b5
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 #define FERMI_DECOMPRESS                                             0x000090b8
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@@ -197,6 +211,7 @@
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 #define PASCAL_COMPUTE_A                                             0x0000c0c0
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 #define PASCAL_COMPUTE_B                                             0x0000c1c0
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 #define VOLTA_COMPUTE_A                                              0x0000c3c0
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+#define TURING_COMPUTE_A                                             0x0000c5c0
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 #define NV74_CIPHER                                                  0x000074c1
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 #endif