kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/gpu/drm/i915/gvt/sched_policy.c
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@@ -39,8 +39,8 @@
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 	enum intel_engine_id i;
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 	struct intel_engine_cs *engine;
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-	for_each_engine(engine, vgpu->gvt->dev_priv, i) {
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-		if (!list_empty(workload_q_head(vgpu, i)))
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+	for_each_engine(engine, vgpu->gvt->gt, i) {
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+		if (!list_empty(workload_q_head(vgpu, engine)))
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 			return true;
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 	}
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@@ -94,7 +94,7 @@
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 {
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 	struct vgpu_sched_data *vgpu_data;
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 	struct list_head *pos;
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-	static uint64_t stage_check;
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+	static u64 stage_check;
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 	int stage = stage_check++ % GVT_TS_BALANCE_STAGE_NUM;
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 	/* The timeslice accumulation reset at stage 0, which is
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@@ -152,8 +152,8 @@
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 	scheduler->need_reschedule = true;
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 	/* still have uncompleted workload? */
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-	for_each_engine(engine, gvt->dev_priv, i) {
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-		if (scheduler->current_workload[i])
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+	for_each_engine(engine, gvt->gt, i) {
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+		if (scheduler->current_workload[engine->id])
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 			return;
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 	}
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@@ -169,8 +169,8 @@
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 	scheduler->need_reschedule = false;
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 	/* wake up workload dispatch thread */
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-	for_each_engine(engine, gvt->dev_priv, i)
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-		wake_up(&scheduler->waitq[i]);
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+	for_each_engine(engine, gvt->gt, i)
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+		wake_up(&scheduler->waitq[engine->id]);
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 }
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 static struct intel_vgpu *find_busy_vgpu(struct gvt_sched_data *sched_data)
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@@ -444,9 +444,10 @@
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 {
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 	struct intel_gvt_workload_scheduler *scheduler =
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 		&vgpu->gvt->scheduler;
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-	int ring_id;
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 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
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-	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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+	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
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+	struct intel_engine_cs *engine;
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+	enum intel_engine_id id;
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 	if (!vgpu_data->active)
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 		return;
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@@ -465,15 +466,15 @@
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 		scheduler->current_vgpu = NULL;
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 	}
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-	intel_runtime_pm_get(dev_priv);
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+	intel_runtime_pm_get(&dev_priv->runtime_pm);
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 	spin_lock_bh(&scheduler->mmio_context_lock);
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-	for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {
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-		if (scheduler->engine_owner[ring_id] == vgpu) {
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-			intel_gvt_switch_mmio(vgpu, NULL, ring_id);
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-			scheduler->engine_owner[ring_id] = NULL;
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+	for_each_engine(engine, vgpu->gvt->gt, id) {
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+		if (scheduler->engine_owner[engine->id] == vgpu) {
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+			intel_gvt_switch_mmio(vgpu, NULL, engine);
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+			scheduler->engine_owner[engine->id] = NULL;
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 		}
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 	}
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 	spin_unlock_bh(&scheduler->mmio_context_lock);
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-	intel_runtime_pm_put(dev_priv);
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+	intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
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 	mutex_unlock(&vgpu->gvt->sched_lock);
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 }