kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/gpu/drm/i915/gvt/display.h
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@@ -35,6 +35,11 @@
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 #ifndef _GVT_DISPLAY_H_
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 #define _GVT_DISPLAY_H_
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+#include <linux/types.h>
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+
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+struct intel_gvt;
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+struct intel_vgpu;
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+
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 #define SBI_REG_MAX	20
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 #define DPCD_SIZE	0x700
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..
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@@ -146,18 +151,19 @@
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 	GVT_PORT_MAX
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 };
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+enum intel_vgpu_edid {
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+	GVT_EDID_1024_768,
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+	GVT_EDID_1920_1200,
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+	GVT_EDID_NUM,
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+};
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+
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 struct intel_vgpu_port {
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 	/* per display EDID information */
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 	struct intel_vgpu_edid_data *edid;
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 	/* per display DPCD information */
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 	struct intel_vgpu_dpcd_data *dpcd;
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 	int type;
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-};
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-
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-enum intel_vgpu_edid {
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-	GVT_EDID_1024_768,
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-	GVT_EDID_1920_1200,
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-	GVT_EDID_NUM,
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+	enum intel_vgpu_edid id;
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 };
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 static inline char *vgpu_edid_str(enum intel_vgpu_edid id)
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@@ -172,6 +178,30 @@
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 	}
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 }
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+static inline unsigned int vgpu_edid_xres(enum intel_vgpu_edid id)
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+{
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+	switch (id) {
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+	case GVT_EDID_1024_768:
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+		return 1024;
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+	case GVT_EDID_1920_1200:
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+		return 1920;
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+	default:
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+		return 0;
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+	}
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+}
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+
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+static inline unsigned int vgpu_edid_yres(enum intel_vgpu_edid id)
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+{
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+	switch (id) {
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+	case GVT_EDID_1024_768:
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+		return 768;
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+	case GVT_EDID_1920_1200:
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+		return 1200;
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+	default:
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+		return 0;
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+	}
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+}
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+
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 void intel_gvt_emulate_vblank(struct intel_gvt *gvt);
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 void intel_gvt_check_vblank_emulation(struct intel_gvt *gvt);
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