hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/drivers/gpio/gpio-xilinx.c
....@@ -1,15 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Xilinx gpio driver for xps/axi_gpio IP.
34 *
45 * Copyright 2008 - 2013 Xilinx, Inc.
5
- *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License version 2
8
- * as published by the Free Software Foundation.
9
- *
10
- * You should have received a copy of the GNU General Public License
11
- * along with this program; if not, write to the Free Software
12
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
136 */
147
158 #include <linux/bitops.h>
....@@ -18,7 +11,6 @@
1811 #include <linux/module.h>
1912 #include <linux/of_device.h>
2013 #include <linux/of_platform.h>
21
-#include <linux/of_gpio.h>
2214 #include <linux/io.h>
2315 #include <linux/gpio/driver.h>
2416 #include <linux/slab.h>
....@@ -40,14 +32,16 @@
4032
4133 /**
4234 * struct xgpio_instance - Stores information about GPIO device
43
- * @mmchip: OF GPIO chip for memory mapped banks
35
+ * @gc: GPIO chip
36
+ * @regs: register block
4437 * @gpio_width: GPIO width for every channel
4538 * @gpio_state: GPIO state shadow register
4639 * @gpio_dir: GPIO direction shadow register
4740 * @gpio_lock: Lock used for synchronization
4841 */
4942 struct xgpio_instance {
50
- struct of_mm_gpio_chip mmchip;
43
+ struct gpio_chip gc;
44
+ void __iomem *regs;
5145 unsigned int gpio_width[2];
5246 u32 gpio_state[2];
5347 u32 gpio_dir[2];
....@@ -91,11 +85,10 @@
9185 */
9286 static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
9387 {
94
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
9588 struct xgpio_instance *chip = gpiochip_get_data(gc);
9689 u32 val;
9790
98
- val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET +
91
+ val = xgpio_readreg(chip->regs + XGPIO_DATA_OFFSET +
9992 xgpio_regoffset(chip, gpio));
10093
10194 return !!(val & BIT(xgpio_offset(chip, gpio)));
....@@ -113,7 +106,6 @@
113106 static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
114107 {
115108 unsigned long flags;
116
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
117109 struct xgpio_instance *chip = gpiochip_get_data(gc);
118110 int index = xgpio_index(chip, gpio);
119111 int offset = xgpio_offset(chip, gpio);
....@@ -126,7 +118,7 @@
126118 else
127119 chip->gpio_state[index] &= ~BIT(offset);
128120
129
- xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
121
+ xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
130122 xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
131123
132124 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
....@@ -145,7 +137,6 @@
145137 unsigned long *bits)
146138 {
147139 unsigned long flags;
148
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
149140 struct xgpio_instance *chip = gpiochip_get_data(gc);
150141 int index = xgpio_index(chip, 0);
151142 int offset, i;
....@@ -156,9 +147,10 @@
156147 for (i = 0; i < gc->ngpio; i++) {
157148 if (*mask == 0)
158149 break;
150
+ /* Once finished with an index write it out to the register */
159151 if (index != xgpio_index(chip, i)) {
160
- xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
161
- xgpio_regoffset(chip, i),
152
+ xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
153
+ index * XGPIO_CHANNEL_OFFSET,
162154 chip->gpio_state[index]);
163155 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
164156 index = xgpio_index(chip, i);
....@@ -173,8 +165,8 @@
173165 }
174166 }
175167
176
- xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
177
- xgpio_regoffset(chip, i), chip->gpio_state[index]);
168
+ xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
169
+ index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);
178170
179171 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
180172 }
....@@ -191,7 +183,6 @@
191183 static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
192184 {
193185 unsigned long flags;
194
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
195186 struct xgpio_instance *chip = gpiochip_get_data(gc);
196187 int index = xgpio_index(chip, gpio);
197188 int offset = xgpio_offset(chip, gpio);
....@@ -200,7 +191,7 @@
200191
201192 /* Set the GPIO bit in shadow register and set direction as input */
202193 chip->gpio_dir[index] |= BIT(offset);
203
- xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
194
+ xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
204195 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
205196
206197 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
....@@ -223,7 +214,6 @@
223214 static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
224215 {
225216 unsigned long flags;
226
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
227217 struct xgpio_instance *chip = gpiochip_get_data(gc);
228218 int index = xgpio_index(chip, gpio);
229219 int offset = xgpio_offset(chip, gpio);
....@@ -235,12 +225,12 @@
235225 chip->gpio_state[index] |= BIT(offset);
236226 else
237227 chip->gpio_state[index] &= ~BIT(offset);
238
- xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
228
+ xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
239229 xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
240230
241231 /* Clear the GPIO bit in shadow register and set direction as output */
242232 chip->gpio_dir[index] &= ~BIT(offset);
243
- xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
233
+ xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
244234 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
245235
246236 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
....@@ -250,40 +240,20 @@
250240
251241 /**
252242 * xgpio_save_regs - Set initial values of GPIO pins
253
- * @mm_gc: Pointer to memory mapped GPIO chip structure
243
+ * @chip: Pointer to GPIO instance
254244 */
255
-static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
245
+static void xgpio_save_regs(struct xgpio_instance *chip)
256246 {
257
- struct xgpio_instance *chip =
258
- container_of(mm_gc, struct xgpio_instance, mmchip);
259
-
260
- xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]);
261
- xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
247
+ xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]);
248
+ xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
262249
263250 if (!chip->gpio_width[1])
264251 return;
265252
266
- xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
253
+ xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
267254 chip->gpio_state[1]);
268
- xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
255
+ xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
269256 chip->gpio_dir[1]);
270
-}
271
-
272
-/**
273
- * xgpio_remove - Remove method for the GPIO device.
274
- * @pdev: pointer to the platform device
275
- *
276
- * This function remove gpiochips and frees all the allocated resources.
277
- *
278
- * Return: 0 always
279
- */
280
-static int xgpio_remove(struct platform_device *pdev)
281
-{
282
- struct xgpio_instance *chip = platform_get_drvdata(pdev);
283
-
284
- of_mm_gpiochip_remove(&chip->mmchip);
285
-
286
- return 0;
287257 }
288258
289259 /**
....@@ -347,21 +317,28 @@
347317 spin_lock_init(&chip->gpio_lock[1]);
348318 }
349319
350
- chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
351
- chip->mmchip.gc.parent = &pdev->dev;
352
- chip->mmchip.gc.direction_input = xgpio_dir_in;
353
- chip->mmchip.gc.direction_output = xgpio_dir_out;
354
- chip->mmchip.gc.get = xgpio_get;
355
- chip->mmchip.gc.set = xgpio_set;
356
- chip->mmchip.gc.set_multiple = xgpio_set_multiple;
320
+ chip->gc.base = -1;
321
+ chip->gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
322
+ chip->gc.parent = &pdev->dev;
323
+ chip->gc.direction_input = xgpio_dir_in;
324
+ chip->gc.direction_output = xgpio_dir_out;
325
+ chip->gc.get = xgpio_get;
326
+ chip->gc.set = xgpio_set;
327
+ chip->gc.set_multiple = xgpio_set_multiple;
357328
358
- chip->mmchip.save_regs = xgpio_save_regs;
329
+ chip->gc.label = dev_name(&pdev->dev);
359330
360
- /* Call the OF gpio helper to setup and register the GPIO device */
361
- status = of_mm_gpiochip_add_data(np, &chip->mmchip, chip);
331
+ chip->regs = devm_platform_ioremap_resource(pdev, 0);
332
+ if (IS_ERR(chip->regs)) {
333
+ dev_err(&pdev->dev, "failed to ioremap memory resource\n");
334
+ return PTR_ERR(chip->regs);
335
+ }
336
+
337
+ xgpio_save_regs(chip);
338
+
339
+ status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);
362340 if (status) {
363
- pr_err("%pOF: error in probe function with status %d\n",
364
- np, status);
341
+ dev_err(&pdev->dev, "failed to add GPIO chip\n");
365342 return status;
366343 }
367344
....@@ -377,7 +354,6 @@
377354
378355 static struct platform_driver xgpio_plat_driver = {
379356 .probe = xgpio_probe,
380
- .remove = xgpio_remove,
381357 .driver = {
382358 .name = "gpio-xilinx",
383359 .of_match_table = xgpio_of_match,