kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/fpga/dfl-fme-pr.c
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@@ -74,6 +74,7 @@
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 	struct dfl_fme *fme;
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 	unsigned long minsz;
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 	void *buf = NULL;
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+	size_t length;
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 	int ret = 0;
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 	u64 v;
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@@ -83,9 +84,6 @@
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 		return -EFAULT;
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 	if (port_pr.argsz < minsz || port_pr.flags)
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-		return -EINVAL;
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-
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-	if (!IS_ALIGNED(port_pr.buffer_size, 4))
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 		return -EINVAL;
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 	/* get fme header region */
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@@ -99,12 +97,13 @@
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 		return -EINVAL;
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 	}
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-	if (!access_ok(VERIFY_READ,
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-		       (void __user *)(unsigned long)port_pr.buffer_address,
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-		       port_pr.buffer_size))
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-		return -EFAULT;
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+	/*
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+	 * align PR buffer per PR bandwidth, as HW ignores the extra padding
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+	 * data automatically.
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+	 */
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+	length = ALIGN(port_pr.buffer_size, 4);
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-	buf = vmalloc(port_pr.buffer_size);
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+	buf = vmalloc(length);
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 	if (!buf)
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 		return -ENOMEM;
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@@ -141,7 +140,7 @@
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 	fpga_image_info_free(region->info);
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 	info->buf = buf;
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-	info->count = port_pr.buffer_size;
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+	info->count = length;
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 	info->region_id = port_pr.port_id;
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 	region->info = info;
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@@ -160,9 +159,6 @@
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 	mutex_unlock(&pdata->lock);
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 free_exit:
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 	vfree(buf);
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-	if (copy_to_user((void __user *)arg, &port_pr, minsz))
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-		return -EFAULT;
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-
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 	return ret;
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 }
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@@ -444,10 +440,8 @@
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 			  struct dfl_feature *feature)
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 {
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 	struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);
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-	struct dfl_fme *priv;
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 	mutex_lock(&pdata->lock);
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-	priv = dfl_fpga_pdata_get_private(pdata);
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 	dfl_fme_destroy_regions(pdata);
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 	dfl_fme_destroy_bridges(pdata);
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@@ -472,7 +466,12 @@
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 	return ret;
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 }
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468
 
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-const struct dfl_feature_ops pr_mgmt_ops = {
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+const struct dfl_feature_id fme_pr_mgmt_id_table[] = {
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+	{.id = FME_FEATURE_ID_PR_MGMT,},
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+	{0}
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+};
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+
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+const struct dfl_feature_ops fme_pr_mgmt_ops = {
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 	.init = pr_mgmt_init,
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 	.uinit = pr_mgmt_uinit,
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 	.ioctl = fme_pr_ioctl,