kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/firmware/rockchip_sip.c
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@@ -262,6 +262,7 @@
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262
 
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 	return res;
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 }
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+EXPORT_SYMBOL_GPL(sip_smc_lastlog_request);
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 int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3)
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 {
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@@ -271,6 +272,7 @@
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 		      0, 0, 0, &res);
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 	return res.a0;
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 }
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+EXPORT_SYMBOL_GPL(sip_smc_amp_config);
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 struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1)
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 {
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@@ -279,8 +281,38 @@
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 	arm_smccc_smc(RK_SIP_AMP_CFG, sub_func_id, arg1, 0, 0, 0, 0, 0, &res);
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 	return res;
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 }
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+EXPORT_SYMBOL_GPL(sip_smc_get_amp_info);
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-EXPORT_SYMBOL_GPL(sip_smc_lastlog_request);
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+void __iomem *sip_hdcp_request_share_memory(int id)
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+{
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+	static void __iomem *base;
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+	struct arm_smccc_res res;
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+
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+	if (id < 0 || id >= MAX_DEVICE) {
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+		pr_err("%s: invalid device id\n", __func__);
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+		return NULL;
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+	}
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+
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+	if (!base) {
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+		/* request page share memory */
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+		res = sip_smc_request_share_mem(2, SHARE_PAGE_TYPE_HDCP);
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+		if (IS_SIP_ERROR(res.a0))
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+			return NULL;
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+		base = (void __iomem *)res.a1;
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+	}
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+
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+	return base + id * 1024;
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+}
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+EXPORT_SYMBOL_GPL(sip_hdcp_request_share_memory);
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+
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+struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2)
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+{
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+	struct arm_smccc_res res;
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+
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+	res = __invoke_sip_fn_smc(SIP_HDCP_CONFIG, arg0, arg1, arg2);
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+	return res;
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+}
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+EXPORT_SYMBOL_GPL(sip_hdcp_config);
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316
 
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 /************************** fiq debugger **************************************/
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 /*
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@@ -291,17 +323,13 @@
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  */
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 #ifdef CONFIG_ARM64
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 #define SIP_UARTDBG_FN		SIP_UARTDBG_CFG64
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-#define SIP_FIQ_DBG_STACK_SIZE	IRQ_STACK_SIZE
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 #else
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 #define SIP_UARTDBG_FN		SIP_UARTDBG_CFG
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-#define SIP_FIQ_DBG_STACK_SIZE	SZ_8K
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-
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 static int firmware_64_32bit;
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 #endif
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 static int fiq_sip_enabled;
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 static int fiq_target_cpu;
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-static unsigned long fiq_stack_top;
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 static phys_addr_t ft_fiq_mem_phy;
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 static void __iomem *ft_fiq_mem_base;
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 static sip_fiq_debugger_uart_irq_tf_cb_t sip_fiq_debugger_uart_irq_tf;
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@@ -410,26 +438,13 @@
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 {
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 	struct arm_smccc_res res;
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440
 
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-	/* Alloc a page for fiq_debugger's stack */
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-	if (fiq_stack_top == 0) {
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-		fiq_stack_top = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
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-						 get_order(SIP_FIQ_DBG_STACK_SIZE));
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-		if (fiq_stack_top) {
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-			fiq_stack_top += SIP_FIQ_DBG_STACK_SIZE;
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-		} else {
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-			pr_err("%s: alloc stack failed\n", __func__);
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-			return -ENOMEM;
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-		}
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-	}
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+	fiq_target_cpu = 0;
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442
 
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 	/* init fiq debugger callback */
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 	sip_fiq_debugger_uart_irq_tf = callback_fn;
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-	arm_smccc_smc(SIP_UARTDBG_FN,
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-		      irq_id,
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-		      (unsigned long)sip_fiq_debugger_uart_irq_tf_cb,
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-		      UARTDBG_CFG_INIT,
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-		      fiq_stack_top, 0, 0, 0, &res);
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-
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+	res = __invoke_sip_fn_smc(SIP_UARTDBG_FN, irq_id,
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+				  (unsigned long)sip_fiq_debugger_uart_irq_tf_cb,
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+				  UARTDBG_CFG_INIT);
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 	if (IS_SIP_ERROR(res.a0)) {
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 		pr_err("%s error: %d\n", __func__, (int)res.a0);
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 		return res.a0;
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@@ -456,22 +471,33 @@
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 {
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 #ifdef MODULE
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 	/* Empirically, local "cpu_logical_map()" for rockchip platforms */
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-	ulong mpidr = 0x00;
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+	ulong mpidr = read_cpuid_mpidr();
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475
 
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-	if (cpu < 4)
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-		/* 0x00, 0x01, 0x02, 0x03 */
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-		mpidr = cpu;
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-	else if (cpu < 8)
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-		/* 0x100, 0x101, 0x102, 0x103 */
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-		mpidr = 0x100 | (cpu - 4);
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-	else
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-		pr_err("Unsupported map cpu: %d\n", cpu);
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+	if (mpidr & MPIDR_MT_BITMASK) {
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+		/* 0x100, 0x200, 0x300, 0x400 ... */
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+		mpidr = (cpu & 0xff) << 8;
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+	} else {
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+		if (cpu < 4)
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+			/* 0x00, 0x01, 0x02, 0x03 */
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+			mpidr = cpu;
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+		else if (cpu < 8)
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+			/* 0x100, 0x101, 0x102, 0x103 */
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+			mpidr = 0x100 | (cpu - 4);
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+		else
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+			pr_err("Unsupported map cpu: %d\n", cpu);
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+	}
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 	return mpidr;
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 #else
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 	return cpu_logical_map(cpu);
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 #endif
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 }
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+
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+ulong sip_cpu_logical_map_mpidr(u32 cpu)
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+{
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+	return cpu_logical_map_mpidr(cpu);
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+}
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+EXPORT_SYMBOL_GPL(sip_cpu_logical_map_mpidr);
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501
 
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 int sip_fiq_debugger_switch_cpu(u32 cpu)
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 {
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@@ -559,6 +585,58 @@
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 }
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 EXPORT_SYMBOL_GPL(sip_fiq_debugger_enable_fiq);
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587
 
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+int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data)
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+{
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+	struct arm_smccc_res res;
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+
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+	res = __invoke_sip_fn_smc(RK_SIP_FIQ_CTRL,
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+				  sub_func, irq, data);
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+	return res.a0;
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+}
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+EXPORT_SYMBOL_GPL(sip_fiq_control);
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+
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+int sip_wdt_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3)
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+{
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+	struct arm_smccc_res res;
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+
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+	arm_smccc_smc(SIP_WDT_CFG, sub_func, arg1, arg2, arg3,
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+		      0, 0, 0, &res);
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+
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+	return res.a0;
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+}
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+EXPORT_SYMBOL_GPL(sip_wdt_config);
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+
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+int sip_hdmirx_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3)
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+{
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+	struct arm_smccc_res res;
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+
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+	arm_smccc_smc(SIP_HDMIRX_CFG, sub_func, arg1, arg2, arg3,
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+		      0, 0, 0, &res);
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+
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+	return res.a0;
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+}
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+EXPORT_SYMBOL_GPL(sip_hdmirx_config);
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+
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+int sip_hdcpkey_init(u32 hdcp_id)
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+{
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+	struct arm_smccc_res res;
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+
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+	res = __invoke_sip_fn_smc(TRUSTED_OS_HDCPKEY_INIT, hdcp_id, 0, 0);
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+
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+	return res.a0;
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+}
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+EXPORT_SYMBOL_GPL(sip_hdcpkey_init);
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+
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+int sip_smc_mcu_config(unsigned long mcu_id,
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+		       unsigned long func,
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+		       unsigned long arg2)
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+{
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+	struct arm_smccc_res res;
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+
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+	res = __invoke_sip_fn_smc(SIP_MCU_CFG, mcu_id, func, arg2);
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+	return res.a0;
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+}
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+EXPORT_SYMBOL_GPL(sip_smc_mcu_config);
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 /******************************************************************************/
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 #ifdef CONFIG_ARM
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 static __init int sip_firmware_init(void)