kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/clk/ti/gate.c
..
..
@@ -33,6 +33,7 @@
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 	.init		= &omap2_init_clk_clkdm,
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 	.enable		= &omap2_clkops_enable_clkdm,
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 	.disable	= &omap2_clkops_disable_clkdm,
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+	.restore_context = clk_gate_restore_context,
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 };
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 const struct clk_ops omap_gate_clk_ops = {
..
..
@@ -40,6 +41,7 @@
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 	.enable		= &omap2_dflt_clk_enable,
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 	.disable	= &omap2_dflt_clk_disable,
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 	.is_enabled	= &omap2_dflt_clk_is_enabled,
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+	.restore_context = clk_gate_restore_context,
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 };
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 static const struct clk_ops omap_gate_clk_hsdiv_restore_ops = {
..
..
@@ -47,6 +49,7 @@
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 	.enable		= &omap36xx_gate_clk_enable_with_hsdiv_restore,
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 	.disable	= &omap2_dflt_clk_disable,
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 	.is_enabled	= &omap2_dflt_clk_is_enabled,
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+	.restore_context = clk_gate_restore_context,
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 };
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 /**
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@@ -120,42 +123,12 @@
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 	init.flags = flags;
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-	clk = ti_clk_register(NULL, &clk_hw->hw, name);
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+	clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
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 	if (IS_ERR(clk))
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 		kfree(clk_hw);
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 	return clk;
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-}
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-
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-struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup)
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-{
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-	struct clk_hw_omap *gate;
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-	struct clk_omap_reg *reg;
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-	const struct clk_hw_omap_ops *ops = &clkhwops_wait;
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-
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-	if (!setup)
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-		return NULL;
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-
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-	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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-	if (!gate)
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-		return ERR_PTR(-ENOMEM);
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-
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-	reg = (struct clk_omap_reg *)&gate->enable_reg;
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-	reg->index = setup->module;
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-	reg->offset = setup->reg;
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-
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-	gate->enable_bit = setup->bit_shift;
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-
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-	if (setup->flags & CLKF_NO_WAIT)
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-		ops = NULL;
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-
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-	if (setup->flags & CLKF_INTERFACE)
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-		ops = &clkhwops_iclk_wait;
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-
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-	gate->ops = ops;
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-
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-	return &gate->hw;
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 }
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 static void __init _of_ti_gate_clk_setup(struct device_node *node,
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@@ -179,7 +152,7 @@
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 	}
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 	if (of_clk_get_parent_count(node) != 1) {
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-		pr_err("%s must have 1 parent\n", node->name);
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+		pr_err("%pOFn must have 1 parent\n", node);
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 		return;
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 	}
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