kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/drivers/char/tpm/tpm_tis.c
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@@ -50,31 +50,6 @@
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 	return container_of(data, struct tpm_tis_tcg_phy, priv);
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 }
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-#ifdef CONFIG_PREEMPT_RT
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-/*
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- * Flushes previous write operations to chip so that a subsequent
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- * ioread*()s won't stall a cpu.
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- */
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-static inline void tpm_tis_flush(void __iomem *iobase)
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-{
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-	ioread8(iobase + TPM_ACCESS(0));
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-}
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-#else
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-#define tpm_tis_flush(iobase) do { } while (0)
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-#endif
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-
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-static inline void tpm_tis_iowrite8(u8 b, void __iomem *iobase, u32 addr)
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-{
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-	iowrite8(b, iobase + addr);
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-	tpm_tis_flush(iobase);
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-}
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-
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-static inline void tpm_tis_iowrite32(u32 b, void __iomem *iobase, u32 addr)
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-{
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-	iowrite32(b, iobase + addr);
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-	tpm_tis_flush(iobase);
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-}
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-
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 static int interrupts = -1;
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 module_param(interrupts, int, 0444);
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 MODULE_PARM_DESC(interrupts, "Enable interrupts");
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@@ -194,7 +169,7 @@
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 	struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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 	while (len--)
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-		tpm_tis_iowrite8(*value++, phy->iobase, addr);
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+		iowrite8(*value++, phy->iobase + addr);
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 	return 0;
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 }
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@@ -221,7 +196,7 @@
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 {
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 	struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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-	tpm_tis_iowrite32(value, phy->iobase, addr);
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+	iowrite32(value, phy->iobase + addr);
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 	return 0;
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 }