~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,20 +1,14 @@
	1	+// SPDX-License-Identifier: GPL-2.0
1	2	/*
2	3	* ti-sysc.c - Texas Instruments sysc interconnect target driver
3		- *
4		- * This program is free software; you can redistribute it and/or modify
5		- * it under the terms of the GNU General Public License version 2 as
6		- * published by the Free Software Foundation.
7		- *
8		- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9		- * kind, whether express or implied; without even the implied warranty
10		- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11		- * GNU General Public License for more details.
12	4	*/
13	5
14	6	#include <linux/io.h>
15	7	#include <linux/clk.h>
16	8	#include <linux/clkdev.h>
	9	+#include <linux/cpu_pm.h>
17	10	#include <linux/delay.h>
	11	+#include <linux/list.h>
18	12	#include <linux/module.h>
19	13	#include <linux/platform_device.h>
20	14	#include <linux/pm_domain.h>
..	..	@@ -23,15 +17,55 @@
23	17	#include <linux/of_address.h>
24	18	#include <linux/of_platform.h>
25	19	#include <linux/slab.h>
	20	+#include <linux/sys_soc.h>
	21	+#include <linux/timekeeping.h>
26	22	#include <linux/iopoll.h>
27	23
28	24	#include <linux/platform_data/ti-sysc.h>
29	25
30	26	#include <dt-bindings/bus/ti-sysc.h>
31	27
	28	+#define DIS_ISP BIT(2)
	29	+#define DIS_IVA BIT(1)
	30	+#define DIS_SGX BIT(0)
	31	+
	32	+#define SOC_FLAG(match, flag) { .machine = match, .data = (void *)(flag), }
	33	+
32	34	#define MAX_MODULE_SOFTRESET_WAIT 10000
33	35
34		-static const char * const reg_names[] = { "rev", "sysc", "syss", };
	36	+enum sysc_soc {
	37	+ SOC_UNKNOWN,
	38	+ SOC_2420,
	39	+ SOC_2430,
	40	+ SOC_3430,
	41	+ SOC_3630,
	42	+ SOC_4430,
	43	+ SOC_4460,
	44	+ SOC_4470,
	45	+ SOC_5430,
	46	+ SOC_AM3,
	47	+ SOC_AM4,
	48	+ SOC_DRA7,
	49	+};
	50	+
	51	+struct sysc_address {
	52	+ unsigned long base;
	53	+ struct list_head node;
	54	+};
	55	+
	56	+struct sysc_module {
	57	+ struct sysc *ddata;
	58	+ struct list_head node;
	59	+};
	60	+
	61	+struct sysc_soc_info {
	62	+ unsigned long general_purpose:1;
	63	+ enum sysc_soc soc;
	64	+ struct mutex list_lock; /* disabled and restored modules list lock */
	65	+ struct list_head disabled_modules;
	66	+ struct list_head restored_modules;
	67	+ struct notifier_block nb;
	68	+};
35	69
36	70	enum sysc_clocks {
37	71	SYSC_FCK,
..	..	@@ -47,7 +81,12 @@
47	81	SYSC_MAX_CLOCKS,
48	82	};
49	83
50		-static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
	84	+static struct sysc_soc_info *sysc_soc;
	85	+static const char * const reg_names[] = { "rev", "sysc", "syss", };
	86	+static const char * const clock_names[SYSC_MAX_CLOCKS] = {
	87	+ "fck", "ick", "opt0", "opt1", "opt2", "opt3", "opt4",
	88	+ "opt5", "opt6", "opt7",
	89	+};
51	90
52	91	#define SYSC_IDLEMODE_MASK 3
53	92	#define SYSC_CLOCKACTIVITY_MASK 3
..	..	@@ -59,15 +98,30 @@
59	98	* @module_size: size of the interconnect target module
60	99	* @module_va: virtual address of the interconnect target module
61	100	* @offsets: register offsets from module base
	101	+ * @mdata: ti-sysc to hwmod translation data for a module
62	102	* @clocks: clocks used by the interconnect target module
63	103	* @clock_roles: clock role names for the found clocks
64	104	* @nr_clocks: number of clocks used by the interconnect target module
	105	+ * @rsts: resets used by the interconnect target module
65	106	* @legacy_mode: configured for legacy mode if set
66	107	* @cap: interconnect target module capabilities
67	108	* @cfg: interconnect target module configuration
	109	+ * @cookie: data used by legacy platform callbacks
68	110	* @name: name if available
69	111	* @revision: interconnect target module revision
	112	+ * @reserved: target module is reserved and already in use
	113	+ * @enabled: sysc runtime enabled status
70	114	* @needs_resume: runtime resume needed on resume from suspend
	115	+ * @child_needs_resume: runtime resume needed for child on resume from suspend
	116	+ * @disable_on_idle: status flag used for disabling modules with resets
	117	+ * @idle_work: work structure used to perform delayed idle on a module
	118	+ * @pre_reset_quirk: module specific pre-reset quirk
	119	+ * @post_reset_quirk: module specific post-reset quirk
	120	+ * @reset_done_quirk: module specific reset done quirk
	121	+ * @module_enable_quirk: module specific enable quirk
	122	+ * @module_disable_quirk: module specific disable quirk
	123	+ * @module_unlock_quirk: module specific sysconfig unlock quirk
	124	+ * @module_lock_quirk: module specific sysconfig lock quirk
71	125	*/
72	126	struct sysc {
73	127	struct device *dev;
..	..	@@ -75,6 +129,7 @@
75	129	u32 module_size;
76	130	void __iomem *module_va;
77	131	int offsets[SYSC_MAX_REGS];
	132	+ struct ti_sysc_module_data *mdata;
78	133	struct clk **clocks;
79	134	const char **clock_roles;
80	135	int nr_clocks;
..	..	@@ -85,17 +140,39 @@
85	140	struct ti_sysc_cookie cookie;
86	141	const char *name;
87	142	u32 revision;
88		- bool enabled;
89		- bool needs_resume;
90		- bool child_needs_resume;
	143	+ unsigned int reserved:1;
	144	+ unsigned int enabled:1;
	145	+ unsigned int needs_resume:1;
	146	+ unsigned int child_needs_resume:1;
91	147	struct delayed_work idle_work;
	148	+ void (pre_reset_quirk)(struct sysc sysc);
	149	+ void (post_reset_quirk)(struct sysc sysc);
	150	+ void (reset_done_quirk)(struct sysc sysc);
	151	+ void (module_enable_quirk)(struct sysc sysc);
	152	+ void (module_disable_quirk)(struct sysc sysc);
	153	+ void (module_unlock_quirk)(struct sysc sysc);
	154	+ void (module_lock_quirk)(struct sysc sysc);
92	155	};
93	156
94	157	static void sysc_parse_dts_quirks(struct sysc ddata, struct device_node np,
95	158	bool is_child);
96	159
97		-void sysc_write(struct sysc *ddata, int offset, u32 value)
	160	+static void sysc_write(struct sysc *ddata, int offset, u32 value)
98	161	{
	162	+ if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
	163	+ writew_relaxed(value & 0xffff, ddata->module_va + offset);
	164	+
	165	+ /* Only i2c revision has LO and HI register with stride of 4 */
	166	+ if (ddata->offsets[SYSC_REVISION] >= 0 &&
	167	+ offset == ddata->offsets[SYSC_REVISION]) {
	168	+ u16 hi = value >> 16;
	169	+
	170	+ writew_relaxed(hi, ddata->module_va + offset + 4);
	171	+ }
	172	+
	173	+ return;
	174	+ }
	175	+
99	176	writel_relaxed(value, ddata->module_va + offset);
100	177	}
101	178
..	..	@@ -105,7 +182,14 @@
105	182	u32 val;
106	183
107	184	val = readw_relaxed(ddata->module_va + offset);
108		- val \|= (readw_relaxed(ddata->module_va + offset + 4) << 16);
	185	+
	186	+ /* Only i2c revision has LO and HI register with stride of 4 */
	187	+ if (ddata->offsets[SYSC_REVISION] >= 0 &&
	188	+ offset == ddata->offsets[SYSC_REVISION]) {
	189	+ u16 tmp = readw_relaxed(ddata->module_va + offset + 4);
	190	+
	191	+ val \|= tmp << 16;
	192	+ }
109	193
110	194	return val;
111	195	}
..	..	@@ -126,6 +210,172 @@
126	210	return 0;
127	211
128	212	return sysc_read(ddata, offset);
	213	+}
	214	+
	215	+static u32 sysc_read_sysconfig(struct sysc *ddata)
	216	+{
	217	+ int offset = ddata->offsets[SYSC_SYSCONFIG];
	218	+
	219	+ if (offset < 0)
	220	+ return 0;
	221	+
	222	+ return sysc_read(ddata, offset);
	223	+}
	224	+
	225	+static u32 sysc_read_sysstatus(struct sysc *ddata)
	226	+{
	227	+ int offset = ddata->offsets[SYSC_SYSSTATUS];
	228	+
	229	+ if (offset < 0)
	230	+ return 0;
	231	+
	232	+ return sysc_read(ddata, offset);
	233	+}
	234	+
	235	+static int sysc_poll_reset_sysstatus(struct sysc *ddata)
	236	+{
	237	+ int error, retries;
	238	+ u32 syss_done, rstval;
	239	+
	240	+ if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED)
	241	+ syss_done = 0;
	242	+ else
	243	+ syss_done = ddata->cfg.syss_mask;
	244	+
	245	+ if (likely(!timekeeping_suspended)) {
	246	+ error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata,
	247	+ rstval, (rstval & ddata->cfg.syss_mask) ==
	248	+ syss_done, 100, MAX_MODULE_SOFTRESET_WAIT);
	249	+ } else {
	250	+ retries = MAX_MODULE_SOFTRESET_WAIT;
	251	+ while (retries--) {
	252	+ rstval = sysc_read_sysstatus(ddata);
	253	+ if ((rstval & ddata->cfg.syss_mask) == syss_done)
	254	+ return 0;
	255	+ udelay(2); /* Account for udelay flakeyness */
	256	+ }
	257	+ error = -ETIMEDOUT;
	258	+ }
	259	+
	260	+ return error;
	261	+}
	262	+
	263	+static int sysc_poll_reset_sysconfig(struct sysc *ddata)
	264	+{
	265	+ int error, retries;
	266	+ u32 sysc_mask, rstval;
	267	+
	268	+ sysc_mask = BIT(ddata->cap->regbits->srst_shift);
	269	+
	270	+ if (likely(!timekeeping_suspended)) {
	271	+ error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata,
	272	+ rstval, !(rstval & sysc_mask),
	273	+ 100, MAX_MODULE_SOFTRESET_WAIT);
	274	+ } else {
	275	+ retries = MAX_MODULE_SOFTRESET_WAIT;
	276	+ while (retries--) {
	277	+ rstval = sysc_read_sysconfig(ddata);
	278	+ if (!(rstval & sysc_mask))
	279	+ return 0;
	280	+ udelay(2); /* Account for udelay flakeyness */
	281	+ }
	282	+ error = -ETIMEDOUT;
	283	+ }
	284	+
	285	+ return error;
	286	+}
	287	+
	288	+/* Poll on reset status */
	289	+static int sysc_wait_softreset(struct sysc *ddata)
	290	+{
	291	+ int syss_offset, error = 0;
	292	+
	293	+ if (ddata->cap->regbits->srst_shift < 0)
	294	+ return 0;
	295	+
	296	+ syss_offset = ddata->offsets[SYSC_SYSSTATUS];
	297	+
	298	+ if (syss_offset >= 0)
	299	+ error = sysc_poll_reset_sysstatus(ddata);
	300	+ else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS)
	301	+ error = sysc_poll_reset_sysconfig(ddata);
	302	+
	303	+ return error;
	304	+}
	305	+
	306	+static int sysc_add_named_clock_from_child(struct sysc *ddata,
	307	+ const char *name,
	308	+ const char *optfck_name)
	309	+{
	310	+ struct device_node *np = ddata->dev->of_node;
	311	+ struct device_node *child;
	312	+ struct clk_lookup *cl;
	313	+ struct clk *clock;
	314	+ const char *n;
	315	+
	316	+ if (name)
	317	+ n = name;
	318	+ else
	319	+ n = optfck_name;
	320	+
	321	+ /* Does the clock alias already exist? */
	322	+ clock = of_clk_get_by_name(np, n);
	323	+ if (!IS_ERR(clock)) {
	324	+ clk_put(clock);
	325	+
	326	+ return 0;
	327	+ }
	328	+
	329	+ child = of_get_next_available_child(np, NULL);
	330	+ if (!child)
	331	+ return -ENODEV;
	332	+
	333	+ clock = devm_get_clk_from_child(ddata->dev, child, name);
	334	+ if (IS_ERR(clock))
	335	+ return PTR_ERR(clock);
	336	+
	337	+ /*
	338	+ * Use clkdev_add() instead of clkdev_alloc() to avoid the MAX_DEV_ID
	339	+ * limit for clk_get(). If cl ever needs to be freed, it should be done
	340	+ * with clkdev_drop().
	341	+ */
	342	+ cl = kcalloc(1, sizeof(*cl), GFP_KERNEL);
	343	+ if (!cl)
	344	+ return -ENOMEM;
	345	+
	346	+ cl->con_id = n;
	347	+ cl->dev_id = dev_name(ddata->dev);
	348	+ cl->clk = clock;
	349	+ clkdev_add(cl);
	350	+
	351	+ clk_put(clock);
	352	+
	353	+ return 0;
	354	+}
	355	+
	356	+static int sysc_init_ext_opt_clock(struct sysc ddata, const char name)
	357	+{
	358	+ const char *optfck_name;
	359	+ int error, index;
	360	+
	361	+ if (ddata->nr_clocks < SYSC_OPTFCK0)
	362	+ index = SYSC_OPTFCK0;
	363	+ else
	364	+ index = ddata->nr_clocks;
	365	+
	366	+ if (name)
	367	+ optfck_name = name;
	368	+ else
	369	+ optfck_name = clock_names[index];
	370	+
	371	+ error = sysc_add_named_clock_from_child(ddata, name, optfck_name);
	372	+ if (error)
	373	+ return error;
	374	+
	375	+ ddata->clock_roles[index] = optfck_name;
	376	+ ddata->nr_clocks++;
	377	+
	378	+ return 0;
129	379	}
130	380
131	381	static int sysc_get_one_clock(struct sysc ddata, const char name)
..	..	@@ -153,9 +403,6 @@
153	403
154	404	ddata->clocks[index] = devm_clk_get(ddata->dev, name);
155	405	if (IS_ERR(ddata->clocks[index])) {
156		- if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
157		- return 0;
158		-
159	406	dev_err(ddata->dev, "clock get error for %s: %li\n",
160	407	name, PTR_ERR(ddata->clocks[index]));
161	408
..	..	@@ -199,6 +446,12 @@
199	446	if (ddata->nr_clocks < 1)
200	447	return 0;
201	448
	449	+ if ((ddata->cfg.quirks & SYSC_QUIRK_EXT_OPT_CLOCK)) {
	450	+ error = sysc_init_ext_opt_clock(ddata, NULL);
	451	+ if (error)
	452	+ return error;
	453	+ }
	454	+
202	455	if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
203	456	dev_err(ddata->dev, "too many clocks for %pOF\n", np);
204	457
..	..	@@ -210,6 +463,12 @@
210	463
211	464	return -EINVAL;
212	465	}
	466	+
	467	+ /* Always add a slot for main clocks fck and ick even if unused */
	468	+ if (!nr_fck)
	469	+ ddata->nr_clocks++;
	470	+ if (!nr_ick)
	471	+ ddata->nr_clocks++;
213	472
214	473	ddata->clocks = devm_kcalloc(ddata->dev,
215	474	ddata->nr_clocks, sizeof(*ddata->clocks),
..	..	@@ -224,47 +483,155 @@
224	483	continue;
225	484
226	485	error = sysc_get_one_clock(ddata, name);
227		- if (error && error != -ENOENT)
	486	+ if (error)
228	487	return error;
229	488	}
230	489
231	490	return 0;
232	491	}
233	492
	493	+static int sysc_enable_main_clocks(struct sysc *ddata)
	494	+{
	495	+ struct clk *clock;
	496	+ int i, error;
	497	+
	498	+ if (!ddata->clocks)
	499	+ return 0;
	500	+
	501	+ for (i = 0; i < SYSC_OPTFCK0; i++) {
	502	+ clock = ddata->clocks[i];
	503	+
	504	+ /* Main clocks may not have ick */
	505	+ if (IS_ERR_OR_NULL(clock))
	506	+ continue;
	507	+
	508	+ error = clk_enable(clock);
	509	+ if (error)
	510	+ goto err_disable;
	511	+ }
	512	+
	513	+ return 0;
	514	+
	515	+err_disable:
	516	+ for (i--; i >= 0; i--) {
	517	+ clock = ddata->clocks[i];
	518	+
	519	+ /* Main clocks may not have ick */
	520	+ if (IS_ERR_OR_NULL(clock))
	521	+ continue;
	522	+
	523	+ clk_disable(clock);
	524	+ }
	525	+
	526	+ return error;
	527	+}
	528	+
	529	+static void sysc_disable_main_clocks(struct sysc *ddata)
	530	+{
	531	+ struct clk *clock;
	532	+ int i;
	533	+
	534	+ if (!ddata->clocks)
	535	+ return;
	536	+
	537	+ for (i = 0; i < SYSC_OPTFCK0; i++) {
	538	+ clock = ddata->clocks[i];
	539	+ if (IS_ERR_OR_NULL(clock))
	540	+ continue;
	541	+
	542	+ clk_disable(clock);
	543	+ }
	544	+}
	545	+
	546	+static int sysc_enable_opt_clocks(struct sysc *ddata)
	547	+{
	548	+ struct clk *clock;
	549	+ int i, error;
	550	+
	551	+ if (!ddata->clocks \|\| ddata->nr_clocks < SYSC_OPTFCK0 + 1)
	552	+ return 0;
	553	+
	554	+ for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
	555	+ clock = ddata->clocks[i];
	556	+
	557	+ /* Assume no holes for opt clocks */
	558	+ if (IS_ERR_OR_NULL(clock))
	559	+ return 0;
	560	+
	561	+ error = clk_enable(clock);
	562	+ if (error)
	563	+ goto err_disable;
	564	+ }
	565	+
	566	+ return 0;
	567	+
	568	+err_disable:
	569	+ for (i--; i >= 0; i--) {
	570	+ clock = ddata->clocks[i];
	571	+ if (IS_ERR_OR_NULL(clock))
	572	+ continue;
	573	+
	574	+ clk_disable(clock);
	575	+ }
	576	+
	577	+ return error;
	578	+}
	579	+
	580	+static void sysc_disable_opt_clocks(struct sysc *ddata)
	581	+{
	582	+ struct clk *clock;
	583	+ int i;
	584	+
	585	+ if (!ddata->clocks \|\| ddata->nr_clocks < SYSC_OPTFCK0 + 1)
	586	+ return;
	587	+
	588	+ for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
	589	+ clock = ddata->clocks[i];
	590	+
	591	+ /* Assume no holes for opt clocks */
	592	+ if (IS_ERR_OR_NULL(clock))
	593	+ return;
	594	+
	595	+ clk_disable(clock);
	596	+ }
	597	+}
	598	+
	599	+static void sysc_clkdm_deny_idle(struct sysc *ddata)
	600	+{
	601	+ struct ti_sysc_platform_data *pdata;
	602	+
	603	+ if (ddata->legacy_mode \|\| (ddata->cfg.quirks & SYSC_QUIRK_CLKDM_NOAUTO))
	604	+ return;
	605	+
	606	+ pdata = dev_get_platdata(ddata->dev);
	607	+ if (pdata && pdata->clkdm_deny_idle)
	608	+ pdata->clkdm_deny_idle(ddata->dev, &ddata->cookie);
	609	+}
	610	+
	611	+static void sysc_clkdm_allow_idle(struct sysc *ddata)
	612	+{
	613	+ struct ti_sysc_platform_data *pdata;
	614	+
	615	+ if (ddata->legacy_mode \|\| (ddata->cfg.quirks & SYSC_QUIRK_CLKDM_NOAUTO))
	616	+ return;
	617	+
	618	+ pdata = dev_get_platdata(ddata->dev);
	619	+ if (pdata && pdata->clkdm_allow_idle)
	620	+ pdata->clkdm_allow_idle(ddata->dev, &ddata->cookie);
	621	+}
	622	+
234	623	/**
235		- * sysc_init_resets - reset module on init
	624	+ * sysc_init_resets - init rstctrl reset line if configured
236	625	* @ddata: device driver data
237	626	*
238		- * A module can have both OCP softreset control and external rstctrl.
239		- * If more complicated rstctrl resets are needed, please handle these
240		- * directly from the child device driver and map only the module reset
241		- * for the parent interconnect target module device.
242		- *
243		- * Automatic reset of the module on init can be skipped with the
244		- * "ti,no-reset-on-init" device tree property.
	627	+ * See sysc_rstctrl_reset_deassert().
245	628	*/
246	629	static int sysc_init_resets(struct sysc *ddata)
247	630	{
248		- int error;
249		-
250	631	ddata->rsts =
251		- devm_reset_control_array_get_optional_exclusive(ddata->dev);
252		- if (IS_ERR(ddata->rsts))
253		- return PTR_ERR(ddata->rsts);
	632	+ devm_reset_control_get_optional_shared(ddata->dev, "rstctrl");
254	633
255		- if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
256		- goto deassert;
257		-
258		- error = reset_control_assert(ddata->rsts);
259		- if (error)
260		- return error;
261		-
262		-deassert:
263		- error = reset_control_deassert(ddata->rsts);
264		- if (error)
265		- return error;
266		-
267		- return 0;
	634	+ return PTR_ERR_OR_ZERO(ddata->rsts);
268	635	}
269	636
270	637	/**
..	..	@@ -317,6 +684,51 @@
317	684	ddata->module_size = be32_to_cpup(ranges);
318	685
319	686	return 0;
	687	+}
	688	+
	689	+/* Interconnect instances to probe before l4_per instances */
	690	+static struct resource early_bus_ranges[] = {
	691	+ /* am3/4 l4_wkup */
	692	+ { .start = 0x44c00000, .end = 0x44c00000 + 0x300000, },
	693	+ /* omap4/5 and dra7 l4_cfg */
	694	+ { .start = 0x4a000000, .end = 0x4a000000 + 0x300000, },
	695	+ /* omap4 l4_wkup */
	696	+ { .start = 0x4a300000, .end = 0x4a300000 + 0x30000, },
	697	+ /* omap5 and dra7 l4_wkup without dra7 dcan segment */
	698	+ { .start = 0x4ae00000, .end = 0x4ae00000 + 0x30000, },
	699	+};
	700	+
	701	+static atomic_t sysc_defer = ATOMIC_INIT(10);
	702	+
	703	+/**
	704	+ * sysc_defer_non_critical - defer non_critical interconnect probing
	705	+ * @ddata: device driver data
	706	+ *
	707	+ * We want to probe l4_cfg and l4_wkup interconnect instances before any
	708	+ * l4_per instances as l4_per instances depend on resources on l4_cfg and
	709	+ * l4_wkup interconnects.
	710	+ */
	711	+static int sysc_defer_non_critical(struct sysc *ddata)
	712	+{
	713	+ struct resource *res;
	714	+ int i;
	715	+
	716	+ if (!atomic_read(&sysc_defer))
	717	+ return 0;
	718	+
	719	+ for (i = 0; i < ARRAY_SIZE(early_bus_ranges); i++) {
	720	+ res = &early_bus_ranges[i];
	721	+ if (ddata->module_pa >= res->start &&
	722	+ ddata->module_pa <= res->end) {
	723	+ atomic_set(&sysc_defer, 0);
	724	+
	725	+ return 0;
	726	+ }
	727	+ }
	728	+
	729	+ atomic_dec_if_positive(&sysc_defer);
	730	+
	731	+ return -EPROBE_DEFER;
320	732	}
321	733
322	734	static struct device_node *stdout_path;
..	..	@@ -372,33 +784,25 @@
372	784	* node but children have "ti,hwmods". These belong to the interconnect
373	785	* target node and are managed by this driver.
374	786	*/
375		-static int sysc_check_one_child(struct sysc *ddata,
376		- struct device_node *np)
	787	+static void sysc_check_one_child(struct sysc *ddata,
	788	+ struct device_node *np)
377	789	{
378	790	const char *name;
379	791
380	792	name = of_get_property(np, "ti,hwmods", NULL);
381		- if (name)
	793	+ if (name && !of_device_is_compatible(np, "ti,sysc"))
382	794	dev_warn(ddata->dev, "really a child ti,hwmods property?");
383	795
384	796	sysc_check_quirk_stdout(ddata, np);
385	797	sysc_parse_dts_quirks(ddata, np, true);
386		-
387		- return 0;
388	798	}
389	799
390		-static int sysc_check_children(struct sysc *ddata)
	800	+static void sysc_check_children(struct sysc *ddata)
391	801	{
392	802	struct device_node *child;
393		- int error;
394	803
395		- for_each_child_of_node(ddata->dev->of_node, child) {
396		- error = sysc_check_one_child(ddata, child);
397		- if (error)
398		- return error;
399		- }
400		-
401		- return 0;
	804	+ for_each_child_of_node(ddata->dev->of_node, child)
	805	+ sysc_check_one_child(ddata, child);
402	806	}
403	807
404	808	/*
..	..	@@ -489,12 +893,6 @@
489	893	nr_regs++;
490	894	}
491	895
492		- if (nr_regs < 1) {
493		- dev_err(ddata->dev, "missing registers\n");
494		-
495		- return -EINVAL;
496		- }
497		-
498	896	if (nr_matches > nr_regs) {
499	897	dev_err(ddata->dev, "overlapping registers: (%i/%i)",
500	898	nr_regs, nr_matches);
..	..	@@ -520,12 +918,21 @@
520	918	{
521	919	int size;
522	920
523		- size = max3(ddata->offsets[SYSC_REVISION],
524		- ddata->offsets[SYSC_SYSCONFIG],
525		- ddata->offsets[SYSC_SYSSTATUS]);
	921	+ if (ddata->offsets[SYSC_REVISION] < 0 &&
	922	+ ddata->offsets[SYSC_SYSCONFIG] < 0 &&
	923	+ ddata->offsets[SYSC_SYSSTATUS] < 0) {
	924	+ size = ddata->module_size;
	925	+ } else {
	926	+ size = max3(ddata->offsets[SYSC_REVISION],
	927	+ ddata->offsets[SYSC_SYSCONFIG],
	928	+ ddata->offsets[SYSC_SYSSTATUS]);
526	929
527		- if (size < 0 \|\| (size + sizeof(u32)) > ddata->module_size)
528		- return -EINVAL;
	930	+ if (size < SZ_1K)
	931	+ size = SZ_1K;
	932	+
	933	+ if ((size + sizeof(u32)) > ddata->module_size)
	934	+ size = ddata->module_size;
	935	+ }
529	936
530	937	ddata->module_va = devm_ioremap(ddata->dev,
531	938	ddata->module_pa,
..	..	@@ -548,9 +955,11 @@
548	955	if (error)
549	956	return error;
550	957
551		- error = sysc_check_children(ddata);
	958	+ error = sysc_defer_non_critical(ddata);
552	959	if (error)
553	960	return error;
	961	+
	962	+ sysc_check_children(ddata);
554	963
555	964	error = sysc_parse_registers(ddata);
556	965	if (error)
..	..	@@ -622,206 +1031,429 @@
622	1031	buf);
623	1032	}
624	1033
625		-static int __maybe_unused sysc_runtime_suspend(struct device *dev)
	1034	+/**
	1035	+ * sysc_write_sysconfig - handle sysconfig quirks for register write
	1036	+ * @ddata: device driver data
	1037	+ * @value: register value
	1038	+ */
	1039	+static void sysc_write_sysconfig(struct sysc *ddata, u32 value)
	1040	+{
	1041	+ if (ddata->module_unlock_quirk)
	1042	+ ddata->module_unlock_quirk(ddata);
	1043	+
	1044	+ sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], value);
	1045	+
	1046	+ if (ddata->module_lock_quirk)
	1047	+ ddata->module_lock_quirk(ddata);
	1048	+}
	1049	+
	1050	+#define SYSC_IDLE_MASK (SYSC_NR_IDLEMODES - 1)
	1051	+#define SYSC_CLOCACT_ICK 2
	1052	+
	1053	+/* Caller needs to manage sysc_clkdm_deny_idle() and sysc_clkdm_allow_idle() */
	1054	+static int sysc_enable_module(struct device *dev)
	1055	+{
	1056	+ struct sysc *ddata;
	1057	+ const struct sysc_regbits *regbits;
	1058	+ u32 reg, idlemodes, best_mode;
	1059	+ int error;
	1060	+
	1061	+ ddata = dev_get_drvdata(dev);
	1062	+
	1063	+ /*
	1064	+ * Some modules like DSS reset automatically on idle. Enable optional
	1065	+ * reset clocks and wait for OCP softreset to complete.
	1066	+ */
	1067	+ if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET) {
	1068	+ error = sysc_enable_opt_clocks(ddata);
	1069	+ if (error) {
	1070	+ dev_err(ddata->dev,
	1071	+ "Optional clocks failed for enable: %i\n",
	1072	+ error);
	1073	+ return error;
	1074	+ }
	1075	+ }
	1076	+ /*
	1077	+ * Some modules like i2c and hdq1w have unusable reset status unless
	1078	+ * the module reset quirk is enabled. Skip status check on enable.
	1079	+ */
	1080	+ if (!(ddata->cfg.quirks & SYSC_MODULE_QUIRK_ENA_RESETDONE)) {
	1081	+ error = sysc_wait_softreset(ddata);
	1082	+ if (error)
	1083	+ dev_warn(ddata->dev, "OCP softreset timed out\n");
	1084	+ }
	1085	+ if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
	1086	+ sysc_disable_opt_clocks(ddata);
	1087	+
	1088	+ /*
	1089	+ * Some subsystem private interconnects, like DSS top level module,
	1090	+ * need only the automatic OCP softreset handling with no sysconfig
	1091	+ * register bits to configure.
	1092	+ */
	1093	+ if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
	1094	+ return 0;
	1095	+
	1096	+ regbits = ddata->cap->regbits;
	1097	+ reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
	1098	+
	1099	+ /*
	1100	+ * Set CLOCKACTIVITY, we only use it for ick. And we only configure it
	1101	+ * based on the SYSC_QUIRK_USE_CLOCKACT flag, not based on the hardware
	1102	+ * capabilities. See the old HWMOD_SET_DEFAULT_CLOCKACT flag.
	1103	+ */
	1104	+ if (regbits->clkact_shift >= 0 &&
	1105	+ (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT))
	1106	+ reg \|= SYSC_CLOCACT_ICK << regbits->clkact_shift;
	1107	+
	1108	+ /* Set SIDLE mode */
	1109	+ idlemodes = ddata->cfg.sidlemodes;
	1110	+ if (!idlemodes \|\| regbits->sidle_shift < 0)
	1111	+ goto set_midle;
	1112	+
	1113	+ if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE \|
	1114	+ SYSC_QUIRK_SWSUP_SIDLE_ACT)) {
	1115	+ best_mode = SYSC_IDLE_NO;
	1116	+ } else {
	1117	+ best_mode = fls(ddata->cfg.sidlemodes) - 1;
	1118	+ if (best_mode > SYSC_IDLE_MASK) {
	1119	+ dev_err(dev, "%s: invalid sidlemode\n", __func__);
	1120	+ return -EINVAL;
	1121	+ }
	1122	+
	1123	+ /* Set WAKEUP */
	1124	+ if (regbits->enwkup_shift >= 0 &&
	1125	+ ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
	1126	+ reg \|= BIT(regbits->enwkup_shift);
	1127	+ }
	1128	+
	1129	+ reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
	1130	+ reg \|= best_mode << regbits->sidle_shift;
	1131	+ sysc_write_sysconfig(ddata, reg);
	1132	+
	1133	+set_midle:
	1134	+ /* Set MIDLE mode */
	1135	+ idlemodes = ddata->cfg.midlemodes;
	1136	+ if (!idlemodes \|\| regbits->midle_shift < 0)
	1137	+ goto set_autoidle;
	1138	+
	1139	+ best_mode = fls(ddata->cfg.midlemodes) - 1;
	1140	+ if (best_mode > SYSC_IDLE_MASK) {
	1141	+ dev_err(dev, "%s: invalid midlemode\n", __func__);
	1142	+ return -EINVAL;
	1143	+ }
	1144	+
	1145	+ if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
	1146	+ best_mode = SYSC_IDLE_NO;
	1147	+
	1148	+ reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
	1149	+ reg \|= best_mode << regbits->midle_shift;
	1150	+ sysc_write_sysconfig(ddata, reg);
	1151	+
	1152	+set_autoidle:
	1153	+ /* Autoidle bit must enabled separately if available */
	1154	+ if (regbits->autoidle_shift >= 0 &&
	1155	+ ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) {
	1156	+ reg \|= 1 << regbits->autoidle_shift;
	1157	+ sysc_write_sysconfig(ddata, reg);
	1158	+ }
	1159	+
	1160	+ /* Flush posted write */
	1161	+ sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
	1162	+
	1163	+ if (ddata->module_enable_quirk)
	1164	+ ddata->module_enable_quirk(ddata);
	1165	+
	1166	+ return 0;
	1167	+}
	1168	+
	1169	+static int sysc_best_idle_mode(u32 idlemodes, u32 *best_mode)
	1170	+{
	1171	+ if (idlemodes & BIT(SYSC_IDLE_SMART_WKUP))
	1172	+ *best_mode = SYSC_IDLE_SMART_WKUP;
	1173	+ else if (idlemodes & BIT(SYSC_IDLE_SMART))
	1174	+ *best_mode = SYSC_IDLE_SMART;
	1175	+ else if (idlemodes & BIT(SYSC_IDLE_FORCE))
	1176	+ *best_mode = SYSC_IDLE_FORCE;
	1177	+ else
	1178	+ return -EINVAL;
	1179	+
	1180	+ return 0;
	1181	+}
	1182	+
	1183	+/* Caller needs to manage sysc_clkdm_deny_idle() and sysc_clkdm_allow_idle() */
	1184	+static int sysc_disable_module(struct device *dev)
	1185	+{
	1186	+ struct sysc *ddata;
	1187	+ const struct sysc_regbits *regbits;
	1188	+ u32 reg, idlemodes, best_mode;
	1189	+ int ret;
	1190	+
	1191	+ ddata = dev_get_drvdata(dev);
	1192	+ if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
	1193	+ return 0;
	1194	+
	1195	+ if (ddata->module_disable_quirk)
	1196	+ ddata->module_disable_quirk(ddata);
	1197	+
	1198	+ regbits = ddata->cap->regbits;
	1199	+ reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
	1200	+
	1201	+ /* Set MIDLE mode */
	1202	+ idlemodes = ddata->cfg.midlemodes;
	1203	+ if (!idlemodes \|\| regbits->midle_shift < 0)
	1204	+ goto set_sidle;
	1205	+
	1206	+ ret = sysc_best_idle_mode(idlemodes, &best_mode);
	1207	+ if (ret) {
	1208	+ dev_err(dev, "%s: invalid midlemode\n", __func__);
	1209	+ return ret;
	1210	+ }
	1211	+
	1212	+ if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_MSTANDBY) \|\|
	1213	+ ddata->cfg.quirks & (SYSC_QUIRK_FORCE_MSTANDBY))
	1214	+ best_mode = SYSC_IDLE_FORCE;
	1215	+
	1216	+ reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
	1217	+ reg \|= best_mode << regbits->midle_shift;
	1218	+ sysc_write_sysconfig(ddata, reg);
	1219	+
	1220	+set_sidle:
	1221	+ /* Set SIDLE mode */
	1222	+ idlemodes = ddata->cfg.sidlemodes;
	1223	+ if (!idlemodes \|\| regbits->sidle_shift < 0)
	1224	+ return 0;
	1225	+
	1226	+ if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE) {
	1227	+ best_mode = SYSC_IDLE_FORCE;
	1228	+ } else {
	1229	+ ret = sysc_best_idle_mode(idlemodes, &best_mode);
	1230	+ if (ret) {
	1231	+ dev_err(dev, "%s: invalid sidlemode\n", __func__);
	1232	+ return ret;
	1233	+ }
	1234	+ }
	1235	+
	1236	+ reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
	1237	+ reg \|= best_mode << regbits->sidle_shift;
	1238	+ if (regbits->autoidle_shift >= 0 &&
	1239	+ ddata->cfg.sysc_val & BIT(regbits->autoidle_shift))
	1240	+ reg \|= 1 << regbits->autoidle_shift;
	1241	+ sysc_write_sysconfig(ddata, reg);
	1242	+
	1243	+ /* Flush posted write */
	1244	+ sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
	1245	+
	1246	+ return 0;
	1247	+}
	1248	+
	1249	+static int __maybe_unused sysc_runtime_suspend_legacy(struct device *dev,
	1250	+ struct sysc *ddata)
626	1251	{
627	1252	struct ti_sysc_platform_data *pdata;
	1253	+ int error;
	1254	+
	1255	+ pdata = dev_get_platdata(ddata->dev);
	1256	+ if (!pdata)
	1257	+ return 0;
	1258	+
	1259	+ if (!pdata->idle_module)
	1260	+ return -ENODEV;
	1261	+
	1262	+ error = pdata->idle_module(dev, &ddata->cookie);
	1263	+ if (error)
	1264	+ dev_err(dev, "%s: could not idle: %i\n",
	1265	+ __func__, error);
	1266	+
	1267	+ reset_control_assert(ddata->rsts);
	1268	+
	1269	+ return 0;
	1270	+}
	1271	+
	1272	+static int __maybe_unused sysc_runtime_resume_legacy(struct device *dev,
	1273	+ struct sysc *ddata)
	1274	+{
	1275	+ struct ti_sysc_platform_data *pdata;
	1276	+ int error;
	1277	+
	1278	+ pdata = dev_get_platdata(ddata->dev);
	1279	+ if (!pdata)
	1280	+ return 0;
	1281	+
	1282	+ if (!pdata->enable_module)
	1283	+ return -ENODEV;
	1284	+
	1285	+ error = pdata->enable_module(dev, &ddata->cookie);
	1286	+ if (error)
	1287	+ dev_err(dev, "%s: could not enable: %i\n",
	1288	+ __func__, error);
	1289	+
	1290	+ reset_control_deassert(ddata->rsts);
	1291	+
	1292	+ return 0;
	1293	+}
	1294	+
	1295	+static int __maybe_unused sysc_runtime_suspend(struct device *dev)
	1296	+{
628	1297	struct sysc *ddata;
629		- int error = 0, i;
	1298	+ int error = 0;
630	1299
631	1300	ddata = dev_get_drvdata(dev);
632	1301
633	1302	if (!ddata->enabled)
634	1303	return 0;
635	1304
	1305	+ sysc_clkdm_deny_idle(ddata);
	1306	+
636	1307	if (ddata->legacy_mode) {
637		- pdata = dev_get_platdata(ddata->dev);
638		- if (!pdata)
639		- return 0;
640		-
641		- if (!pdata->idle_module)
642		- return -ENODEV;
643		-
644		- error = pdata->idle_module(dev, &ddata->cookie);
	1308	+ error = sysc_runtime_suspend_legacy(dev, ddata);
645	1309	if (error)
646		- dev_err(dev, "%s: could not idle: %i\n",
647		- __func__, error);
648		-
649		- goto idled;
	1310	+ goto err_allow_idle;
	1311	+ } else {
	1312	+ error = sysc_disable_module(dev);
	1313	+ if (error)
	1314	+ goto err_allow_idle;
650	1315	}
651	1316
652		- for (i = 0; i < ddata->nr_clocks; i++) {
653		- if (IS_ERR_OR_NULL(ddata->clocks[i]))
654		- continue;
	1317	+ sysc_disable_main_clocks(ddata);
655	1318
656		- if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
657		- break;
	1319	+ if (sysc_opt_clks_needed(ddata))
	1320	+ sysc_disable_opt_clocks(ddata);
658	1321
659		- clk_disable(ddata->clocks[i]);
660		- }
661		-
662		-idled:
663	1322	ddata->enabled = false;
	1323	+
	1324	+err_allow_idle:
	1325	+ reset_control_assert(ddata->rsts);
	1326	+
	1327	+ sysc_clkdm_allow_idle(ddata);
664	1328
665	1329	return error;
666	1330	}
667	1331
668	1332	static int __maybe_unused sysc_runtime_resume(struct device *dev)
669	1333	{
670		- struct ti_sysc_platform_data *pdata;
671	1334	struct sysc *ddata;
672		- int error = 0, i;
	1335	+ int error = 0;
673	1336
674	1337	ddata = dev_get_drvdata(dev);
675	1338
676	1339	if (ddata->enabled)
677	1340	return 0;
678	1341
	1342	+
	1343	+ sysc_clkdm_deny_idle(ddata);
	1344	+
	1345	+ if (sysc_opt_clks_needed(ddata)) {
	1346	+ error = sysc_enable_opt_clocks(ddata);
	1347	+ if (error)
	1348	+ goto err_allow_idle;
	1349	+ }
	1350	+
	1351	+ error = sysc_enable_main_clocks(ddata);
	1352	+ if (error)
	1353	+ goto err_opt_clocks;
	1354	+
	1355	+ reset_control_deassert(ddata->rsts);
	1356	+
679	1357	if (ddata->legacy_mode) {
680		- pdata = dev_get_platdata(ddata->dev);
681		- if (!pdata)
682		- return 0;
683		-
684		- if (!pdata->enable_module)
685		- return -ENODEV;
686		-
687		- error = pdata->enable_module(dev, &ddata->cookie);
	1358	+ error = sysc_runtime_resume_legacy(dev, ddata);
688	1359	if (error)
689		- dev_err(dev, "%s: could not enable: %i\n",
690		- __func__, error);
691		-
692		- goto awake;
	1360	+ goto err_main_clocks;
	1361	+ } else {
	1362	+ error = sysc_enable_module(dev);
	1363	+ if (error)
	1364	+ goto err_main_clocks;
693	1365	}
694	1366
695		- for (i = 0; i < ddata->nr_clocks; i++) {
696		- if (IS_ERR_OR_NULL(ddata->clocks[i]))
697		- continue;
698		-
699		- if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
700		- break;
701		-
702		- error = clk_enable(ddata->clocks[i]);
703		- if (error)
704		- return error;
705		- }
706		-
707		-awake:
708	1367	ddata->enabled = true;
	1368	+
	1369	+ sysc_clkdm_allow_idle(ddata);
	1370	+
	1371	+ return 0;
	1372	+
	1373	+err_main_clocks:
	1374	+ sysc_disable_main_clocks(ddata);
	1375	+err_opt_clocks:
	1376	+ if (sysc_opt_clks_needed(ddata))
	1377	+ sysc_disable_opt_clocks(ddata);
	1378	+err_allow_idle:
	1379	+ sysc_clkdm_allow_idle(ddata);
709	1380
710	1381	return error;
711	1382	}
712	1383
713		-#ifdef CONFIG_PM_SLEEP
714		-static int sysc_suspend(struct device *dev)
	1384	+static int sysc_reinit_module(struct sysc *ddata, bool leave_enabled)
	1385	+{
	1386	+ struct device *dev = ddata->dev;
	1387	+ int error;
	1388	+
	1389	+ /* Disable target module if it is enabled */
	1390	+ if (ddata->enabled) {
	1391	+ error = sysc_runtime_suspend(dev);
	1392	+ if (error)
	1393	+ dev_warn(dev, "reinit suspend failed: %i\n", error);
	1394	+ }
	1395	+
	1396	+ /* Enable target module */
	1397	+ error = sysc_runtime_resume(dev);
	1398	+ if (error)
	1399	+ dev_warn(dev, "reinit resume failed: %i\n", error);
	1400	+
	1401	+ if (leave_enabled)
	1402	+ return error;
	1403	+
	1404	+ /* Disable target module if no leave_enabled was set */
	1405	+ error = sysc_runtime_suspend(dev);
	1406	+ if (error)
	1407	+ dev_warn(dev, "reinit suspend failed: %i\n", error);
	1408	+
	1409	+ return error;
	1410	+}
	1411	+
	1412	+static int __maybe_unused sysc_noirq_suspend(struct device *dev)
715	1413	{
716	1414	struct sysc *ddata;
717		- int error;
718	1415
719	1416	ddata = dev_get_drvdata(dev);
720	1417
721		- if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER \|
722		- SYSC_QUIRK_LEGACY_IDLE))
	1418	+ if (ddata->cfg.quirks &
	1419	+ (SYSC_QUIRK_LEGACY_IDLE \| SYSC_QUIRK_NO_IDLE))
723	1420	return 0;
724	1421
725	1422	if (!ddata->enabled)
726	1423	return 0;
727	1424
728		- dev_dbg(ddata->dev, "%s %s\n", __func__,
729		- ddata->name ? ddata->name : "");
730		-
731		- error = pm_runtime_put_sync_suspend(dev);
732		- if (error < 0) {
733		- dev_warn(ddata->dev, "%s not idle %i %s\n",
734		- __func__, error,
735		- ddata->name ? ddata->name : "");
736		-
737		- return 0;
738		- }
739		-
740		- ddata->needs_resume = true;
741		-
742		- return 0;
743		-}
744		-
745		-static int sysc_resume(struct device *dev)
746		-{
747		- struct sysc *ddata;
748		- int error;
749		-
750		- ddata = dev_get_drvdata(dev);
751		-
752		- if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER \|
753		- SYSC_QUIRK_LEGACY_IDLE))
754		- return 0;
755		-
756		- if (ddata->needs_resume) {
757		- dev_dbg(ddata->dev, "%s %s\n", __func__,
758		- ddata->name ? ddata->name : "");
759		-
760		- error = pm_runtime_get_sync(dev);
761		- if (error < 0) {
762		- dev_err(ddata->dev, "%s error %i %s\n",
763		- __func__, error,
764		- ddata->name ? ddata->name : "");
765		-
766		- return error;
767		- }
768		-
769		- ddata->needs_resume = false;
770		- }
771		-
772		- return 0;
773		-}
774		-
775		-static int sysc_noirq_suspend(struct device *dev)
776		-{
777		- struct sysc *ddata;
778		-
779		- ddata = dev_get_drvdata(dev);
780		-
781		- if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
782		- return 0;
783		-
784		- if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
785		- return 0;
786		-
787		- if (!ddata->enabled)
788		- return 0;
789		-
790		- dev_dbg(ddata->dev, "%s %s\n", __func__,
791		- ddata->name ? ddata->name : "");
792		-
793		- ddata->needs_resume = true;
	1425	+ ddata->needs_resume = 1;
794	1426
795	1427	return sysc_runtime_suspend(dev);
796	1428	}
797	1429
798		-static int sysc_noirq_resume(struct device *dev)
	1430	+static int __maybe_unused sysc_noirq_resume(struct device *dev)
799	1431	{
800	1432	struct sysc *ddata;
	1433	+ int error = 0;
801	1434
802	1435	ddata = dev_get_drvdata(dev);
803	1436
804		- if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
	1437	+ if (ddata->cfg.quirks &
	1438	+ (SYSC_QUIRK_LEGACY_IDLE \| SYSC_QUIRK_NO_IDLE))
805	1439	return 0;
806	1440
807		- if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
808		- return 0;
809		-
810		- if (ddata->needs_resume) {
811		- dev_dbg(ddata->dev, "%s %s\n", __func__,
812		- ddata->name ? ddata->name : "");
813		-
814		- ddata->needs_resume = false;
815		-
816		- return sysc_runtime_resume(dev);
	1441	+ if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_RESUME) {
	1442	+ error = sysc_reinit_module(ddata, ddata->needs_resume);
	1443	+ if (error)
	1444	+ dev_warn(dev, "noirq_resume failed: %i\n", error);
	1445	+ } else if (ddata->needs_resume) {
	1446	+ error = sysc_runtime_resume(dev);
	1447	+ if (error)
	1448	+ dev_warn(dev, "noirq_resume failed: %i\n", error);
817	1449	}
818	1450
819		- return 0;
	1451	+ ddata->needs_resume = 0;
	1452	+
	1453	+ return error;
820	1454	}
821		-#endif
822	1455
823	1456	static const struct dev_pm_ops sysc_pm_ops = {
824		- SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
825	1457	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
826	1458	SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
827	1459	sysc_runtime_resume,
..	..	@@ -854,77 +1486,196 @@
854	1486	}
855	1487
856	1488	static const struct sysc_revision_quirk sysc_revision_quirks[] = {
857		- /* These need to use noirq_suspend */
858		- SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
859		- SYSC_QUIRK_RESOURCE_PROVIDER),
860		- SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xffffffff,
861		- SYSC_QUIRK_RESOURCE_PROVIDER),
862		- SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff,
863		- SYSC_QUIRK_RESOURCE_PROVIDER),
864		- SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff,
865		- SYSC_QUIRK_RESOURCE_PROVIDER),
866		- SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff,
867		- SYSC_QUIRK_RESOURCE_PROVIDER),
868		- SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff,
869		- SYSC_QUIRK_RESOURCE_PROVIDER),
870		- SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
871		- SYSC_QUIRK_RESOURCE_PROVIDER),
872		- SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff,
873		- SYSC_QUIRK_RESOURCE_PROVIDER),
874		- SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff,
875		- SYSC_QUIRK_RESOURCE_PROVIDER),
876		-
877	1489	/* These drivers need to be fixed to not use pm_runtime_irq_safe() */
878		- SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff,
	1490	+ SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffff00ff,
879	1491	SYSC_QUIRK_LEGACY_IDLE \| SYSC_QUIRK_OPT_CLKS_IN_RESET),
880		- SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
881		- SYSC_QUIRK_LEGACY_IDLE),
882		- SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
883		- SYSC_QUIRK_LEGACY_IDLE),
884	1492	SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
885	1493	SYSC_QUIRK_LEGACY_IDLE),
886		- SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
	1494	+ SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x24, -ENODEV, 0x00000000, 0xffffffff,
887	1495	SYSC_QUIRK_LEGACY_IDLE),
888		- SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
	1496	+ SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff,
889	1497	SYSC_QUIRK_LEGACY_IDLE),
890		- SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
891		- 0),
892		- /* Some timers on omap4 and later */
893		- SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff,
894		- 0),
	1498	+ SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,
	1499	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_LEGACY_IDLE),
895	1500	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
896		- SYSC_QUIRK_LEGACY_IDLE),
	1501	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_LEGACY_IDLE),
897	1502	/* Uarts on omap4 and later */
898		- SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffffffff,
899		- SYSC_QUIRK_LEGACY_IDLE),
	1503	+ SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
	1504	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_LEGACY_IDLE),
	1505	+ SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
	1506	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_LEGACY_IDLE),
900	1507
901		- /* These devices don't yet suspend properly without legacy setting */
902		- SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff,
903		- SYSC_QUIRK_LEGACY_IDLE),
904		- SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xffffffff,
905		- SYSC_QUIRK_LEGACY_IDLE),
906		- SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0d00, 0xffffffff,
907		- SYSC_QUIRK_LEGACY_IDLE),
	1508	+ /* Quirks that need to be set based on the module address */
	1509	+ SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,
	1510	+ SYSC_QUIRK_EXT_OPT_CLOCK \| SYSC_QUIRK_NO_RESET_ON_INIT \|
	1511	+ SYSC_QUIRK_SWSUP_SIDLE),
	1512	+
	1513	+ /* Quirks that need to be set based on detected module */
	1514	+ SYSC_QUIRK("aess", 0, 0, 0x10, -ENODEV, 0x40000000, 0xffffffff,
	1515	+ SYSC_MODULE_QUIRK_AESS),
	1516	+ /* Errata i893 handling for dra7 dcan1 and 2 */
	1517	+ SYSC_QUIRK("dcan", 0x4ae3c000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
	1518	+ SYSC_QUIRK_CLKDM_NOAUTO),
	1519	+ SYSC_QUIRK("dcan", 0x48480000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
	1520	+ SYSC_QUIRK_CLKDM_NOAUTO),
	1521	+ SYSC_QUIRK("dss", 0x4832a000, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
	1522	+ SYSC_QUIRK_OPT_CLKS_IN_RESET \| SYSC_MODULE_QUIRK_DSS_RESET),
	1523	+ SYSC_QUIRK("dss", 0x58000000, 0, -ENODEV, 0x14, 0x00000040, 0xffffffff,
	1524	+ SYSC_QUIRK_OPT_CLKS_IN_RESET \| SYSC_MODULE_QUIRK_DSS_RESET),
	1525	+ SYSC_QUIRK("dss", 0x58000000, 0, -ENODEV, 0x14, 0x00000061, 0xffffffff,
	1526	+ SYSC_QUIRK_OPT_CLKS_IN_RESET \| SYSC_MODULE_QUIRK_DSS_RESET),
	1527	+ SYSC_QUIRK("dwc3", 0x48880000, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff,
	1528	+ SYSC_QUIRK_CLKDM_NOAUTO),
	1529	+ SYSC_QUIRK("dwc3", 0x488c0000, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff,
	1530	+ SYSC_QUIRK_CLKDM_NOAUTO),
	1531	+ SYSC_QUIRK("gpmc", 0, 0, 0x10, 0x14, 0x00000060, 0xffffffff,
	1532	+ SYSC_QUIRK_GPMC_DEBUG),
	1533	+ SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50030200, 0xffffffff,
	1534	+ SYSC_QUIRK_OPT_CLKS_NEEDED),
	1535	+ SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff,
	1536	+ SYSC_MODULE_QUIRK_HDQ1W \| SYSC_MODULE_QUIRK_ENA_RESETDONE),
	1537	+ SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff,
	1538	+ SYSC_MODULE_QUIRK_HDQ1W \| SYSC_MODULE_QUIRK_ENA_RESETDONE),
	1539	+ SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000036, 0x000000ff,
	1540	+ SYSC_MODULE_QUIRK_I2C \| SYSC_MODULE_QUIRK_ENA_RESETDONE),
	1541	+ SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x0000003c, 0x000000ff,
	1542	+ SYSC_MODULE_QUIRK_I2C \| SYSC_MODULE_QUIRK_ENA_RESETDONE),
	1543	+ SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000040, 0x000000ff,
	1544	+ SYSC_MODULE_QUIRK_I2C \| SYSC_MODULE_QUIRK_ENA_RESETDONE),
	1545	+ SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
	1546	+ SYSC_MODULE_QUIRK_I2C \| SYSC_MODULE_QUIRK_ENA_RESETDONE),
	1547	+ SYSC_QUIRK("gpu", 0x50000000, 0x14, -ENODEV, -ENODEV, 0x00010201, 0xffffffff, 0),
	1548	+ SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff,
	1549	+ SYSC_MODULE_QUIRK_SGX),
	1550	+ SYSC_QUIRK("lcdc", 0, 0, 0x54, -ENODEV, 0x4f201000, 0xffffffff,
	1551	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY),
	1552	+ SYSC_QUIRK("rtc", 0, 0x74, 0x78, -ENODEV, 0x4eb01908, 0xffff00f0,
	1553	+ SYSC_MODULE_QUIRK_RTC_UNLOCK),
	1554	+ SYSC_QUIRK("tptc", 0, 0, 0x10, -ENODEV, 0x40006c00, 0xffffefff,
	1555	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY),
	1556	+ SYSC_QUIRK("tptc", 0, 0, -ENODEV, -ENODEV, 0x40007c00, 0xffffffff,
	1557	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY),
	1558	+ SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff,
	1559	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY),
	1560	+ SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff,
	1561	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY),
	1562	+ SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
	1563	+ 0xffffffff, SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY),
	1564	+ SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff,
	1565	+ SYSC_QUIRK_SWSUP_SIDLE \| SYSC_QUIRK_SWSUP_MSTANDBY \|
	1566	+ SYSC_QUIRK_REINIT_ON_CTX_LOST),
	1567	+ SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
	1568	+ SYSC_MODULE_QUIRK_WDT),
	1569	+ /* PRUSS on am3, am4 and am5 */
	1570	+ SYSC_QUIRK("pruss", 0, 0x26000, 0x26004, -ENODEV, 0x47000000, 0xff000000,
	1571	+ SYSC_MODULE_QUIRK_PRUSS),
	1572	+ /* Watchdog on am3 and am4 */
	1573	+ SYSC_QUIRK("wdt", 0x44e35000, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
	1574	+ SYSC_MODULE_QUIRK_WDT \| SYSC_QUIRK_SWSUP_SIDLE),
908	1575
909	1576	#ifdef DEBUG
910		- SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
911		- SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
912		- SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
	1577	+ SYSC_QUIRK("adc", 0, 0, 0x10, -ENODEV, 0x47300001, 0xffffffff, 0),
	1578	+ SYSC_QUIRK("atl", 0, 0, -ENODEV, -ENODEV, 0x0a070100, 0xffffffff, 0),
	1579	+ SYSC_QUIRK("cm", 0, 0, -ENODEV, -ENODEV, 0x40000301, 0xffffffff, 0),
	1580	+ SYSC_QUIRK("control", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0),
	1581	+ SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,
	1582	+ 0xffff00f0, 0),
	1583	+ SYSC_QUIRK("dcan", 0, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff, 0),
	1584	+ SYSC_QUIRK("dcan", 0, 0x20, -ENODEV, -ENODEV, 0x4edb1902, 0xffffffff, 0),
	1585	+ SYSC_QUIRK("dispc", 0x4832a400, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0),
	1586	+ SYSC_QUIRK("dispc", 0x58001000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0),
	1587	+ SYSC_QUIRK("dispc", 0x58001000, 0, 0x10, 0x14, 0x00000051, 0xffffffff, 0),
	1588	+ SYSC_QUIRK("dmic", 0, 0, 0x10, -ENODEV, 0x50010000, 0xffffffff, 0),
	1589	+ SYSC_QUIRK("dsi", 0x58004000, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0),
	1590	+ SYSC_QUIRK("dsi", 0x58005000, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0),
	1591	+ SYSC_QUIRK("dsi", 0x58005000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0),
	1592	+ SYSC_QUIRK("dsi", 0x58009000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0),
	1593	+ SYSC_QUIRK("dwc3", 0, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff, 0),
	1594	+ SYSC_QUIRK("d2d", 0x4a0b6000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
	1595	+ SYSC_QUIRK("d2d", 0x4a0cd000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
	1596	+ SYSC_QUIRK("epwmss", 0, 0, 0x4, -ENODEV, 0x47400001, 0xffffffff, 0),
	1597	+ SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -ENODEV, 0, 0, 0),
	1598	+ SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff, 0),
	1599	+ SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50031d00, 0xffffffff, 0),
913	1600	SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
914		- SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
915		- SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
916		- SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
917		- SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
918		- SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
919		- SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
920		- SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
	1601	+ SYSC_QUIRK("iss", 0, 0, 0x10, -ENODEV, 0x40000101, 0xffffffff, 0),
	1602	+ SYSC_QUIRK("mcasp", 0, 0, 0x4, -ENODEV, 0x44306302, 0xffffffff, 0),
	1603	+ SYSC_QUIRK("mcasp", 0, 0, 0x4, -ENODEV, 0x44307b02, 0xffffffff, 0),
	1604	+ SYSC_QUIRK("mcbsp", 0, -ENODEV, 0x8c, -ENODEV, 0, 0, 0),
	1605	+ SYSC_QUIRK("mcspi", 0, 0, 0x10, -ENODEV, 0x40300a0b, 0xffff00ff, 0),
	1606	+ SYSC_QUIRK("mcspi", 0, 0, 0x110, 0x114, 0x40300a0b, 0xffffffff, 0),
	1607	+ SYSC_QUIRK("mailbox", 0, 0, 0x10, -ENODEV, 0x00000400, 0xffffffff, 0),
	1608	+ SYSC_QUIRK("m3", 0, 0, -ENODEV, -ENODEV, 0x5f580105, 0x0fff0f00, 0),
	1609	+ SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xfffffff0, 0),
	1610	+ SYSC_QUIRK("ocp2scp", 0, 0, -ENODEV, -ENODEV, 0x50060007, 0xffffffff, 0),
	1611	+ SYSC_QUIRK("padconf", 0, 0, 0x10, -ENODEV, 0x4fff0800, 0xffffffff, 0),
	1612	+ SYSC_QUIRK("padconf", 0, 0, -ENODEV, -ENODEV, 0x40001100, 0xffffffff, 0),
	1613	+ SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000100, 0xffffffff, 0),
	1614	+ SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x00004102, 0xffffffff, 0),
	1615	+ SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000400, 0xffffffff, 0),
	1616	+ SYSC_QUIRK("rfbi", 0x4832a800, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
	1617	+ SYSC_QUIRK("rfbi", 0x58002000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
	1618	+ SYSC_QUIRK("scm", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0),
	1619	+ SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4e8b0100, 0xffffffff, 0),
	1620	+ SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4f000100, 0xffffffff, 0),
	1621	+ SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x40000900, 0xffffffff, 0),
	1622	+ SYSC_QUIRK("scrm", 0, 0, -ENODEV, -ENODEV, 0x00000010, 0xffffffff, 0),
	1623	+ SYSC_QUIRK("sdio", 0, 0, 0x10, -ENODEV, 0x40202301, 0xffff0ff0, 0),
	1624	+ SYSC_QUIRK("sdio", 0, 0x2fc, 0x110, 0x114, 0x31010000, 0xffffffff, 0),
	1625	+ SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0),
	1626	+ SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40000902, 0xffffffff, 0),
	1627	+ SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40002903, 0xffffffff, 0),
	1628	+ SYSC_QUIRK("spinlock", 0, 0, 0x10, -ENODEV, 0x50020000, 0xffffffff, 0),
	1629	+ SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -ENODEV, 0x00000020, 0xffffffff, 0),
	1630	+ SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000013, 0xffffffff, 0),
	1631	+ SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, 0),
	1632	+ /* Some timers on omap4 and later */
	1633	+ SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x50002100, 0xffffffff, 0),
	1634	+ SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x4fff1301, 0xffff00ff, 0),
	1635	+ SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000040, 0xffffffff, 0),
	1636	+ SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000011, 0xffffffff, 0),
	1637	+ SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000060, 0xffffffff, 0),
	1638	+ SYSC_QUIRK("tpcc", 0, 0, -ENODEV, -ENODEV, 0x40014c00, 0xffffffff, 0),
921	1639	SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
922		- SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
923		- SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
924		- 0xffffffff, 0),
	1640	+ SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000008, 0xffffffff, 0),
	1641	+ SYSC_QUIRK("venc", 0x58003000, 0, -ENODEV, -ENODEV, 0x00000002, 0xffffffff, 0),
	1642	+ SYSC_QUIRK("vfpe", 0, 0, 0x104, -ENODEV, 0x4d001200, 0xffffffff, 0),
925	1643	#endif
926	1644	};
927	1645
	1646	+/*
	1647	+ * Early quirks based on module base and register offsets only that are
	1648	+ * needed before the module revision can be read
	1649	+ */
	1650	+static void sysc_init_early_quirks(struct sysc *ddata)
	1651	+{
	1652	+ const struct sysc_revision_quirk *q;
	1653	+ int i;
	1654	+
	1655	+ for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
	1656	+ q = &sysc_revision_quirks[i];
	1657	+
	1658	+ if (!q->base)
	1659	+ continue;
	1660	+
	1661	+ if (q->base != ddata->module_pa)
	1662	+ continue;
	1663	+
	1664	+ if (q->rev_offset != ddata->offsets[SYSC_REVISION])
	1665	+ continue;
	1666	+
	1667	+ if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
	1668	+ continue;
	1669	+
	1670	+ if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
	1671	+ continue;
	1672	+
	1673	+ ddata->name = q->name;
	1674	+ ddata->cfg.quirks \|= q->quirks;
	1675	+ }
	1676	+}
	1677	+
	1678	+/* Quirks that also consider the revision register value */
928	1679	static void sysc_init_revision_quirks(struct sysc *ddata)
929	1680	{
930	1681	const struct sysc_revision_quirk *q;
..	..	@@ -936,16 +1687,13 @@
936	1687	if (q->base && q->base != ddata->module_pa)
937	1688	continue;
938	1689
939		- if (q->rev_offset >= 0 &&
940		- q->rev_offset != ddata->offsets[SYSC_REVISION])
	1690	+ if (q->rev_offset != ddata->offsets[SYSC_REVISION])
941	1691	continue;
942	1692
943		- if (q->sysc_offset >= 0 &&
944		- q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
	1693	+ if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
945	1694	continue;
946	1695
947		- if (q->syss_offset >= 0 &&
948		- q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
	1696	+ if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
949	1697	continue;
950	1698
951	1699	if (q->revision == ddata->revision \|\|
..	..	@@ -957,68 +1705,470 @@
957	1705	}
958	1706	}
959	1707
	1708	+/*
	1709	+ * DSS needs dispc outputs disabled to reset modules. Returns mask of
	1710	+ * enabled DSS interrupts. Eventually we may be able to do this on
	1711	+ * dispc init rather than top-level DSS init.
	1712	+ */
	1713	+static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset,
	1714	+ bool disable)
	1715	+{
	1716	+ bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false;
	1717	+ const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1);
	1718	+ int manager_count;
	1719	+ bool framedonetv_irq = true;
	1720	+ u32 val, irq_mask = 0;
	1721	+
	1722	+ switch (sysc_soc->soc) {
	1723	+ case SOC_2420 ... SOC_3630:
	1724	+ manager_count = 2;
	1725	+ framedonetv_irq = false;
	1726	+ break;
	1727	+ case SOC_4430 ... SOC_4470:
	1728	+ manager_count = 3;
	1729	+ break;
	1730	+ case SOC_5430:
	1731	+ case SOC_DRA7:
	1732	+ manager_count = 4;
	1733	+ break;
	1734	+ case SOC_AM4:
	1735	+ manager_count = 1;
	1736	+ framedonetv_irq = false;
	1737	+ break;
	1738	+ case SOC_UNKNOWN:
	1739	+ default:
	1740	+ return 0;
	1741	+ };
	1742	+
	1743	+ /* Remap the whole module range to be able to reset dispc outputs */
	1744	+ devm_iounmap(ddata->dev, ddata->module_va);
	1745	+ ddata->module_va = devm_ioremap(ddata->dev,
	1746	+ ddata->module_pa,
	1747	+ ddata->module_size);
	1748	+ if (!ddata->module_va)
	1749	+ return -EIO;
	1750	+
	1751	+ /* DISP_CONTROL */
	1752	+ val = sysc_read(ddata, dispc_offset + 0x40);
	1753	+ lcd_en = val & lcd_en_mask;
	1754	+ digit_en = val & digit_en_mask;
	1755	+ if (lcd_en)
	1756	+ irq_mask \|= BIT(0); /* FRAMEDONE */
	1757	+ if (digit_en) {
	1758	+ if (framedonetv_irq)
	1759	+ irq_mask \|= BIT(24); /* FRAMEDONETV */
	1760	+ else
	1761	+ irq_mask \|= BIT(2) \| BIT(3); /* EVSYNC bits */
	1762	+ }
	1763	+ if (disable & (lcd_en \| digit_en))
	1764	+ sysc_write(ddata, dispc_offset + 0x40,
	1765	+ val & ~(lcd_en_mask \| digit_en_mask));
	1766	+
	1767	+ if (manager_count <= 2)
	1768	+ return irq_mask;
	1769	+
	1770	+ /* DISPC_CONTROL2 */
	1771	+ val = sysc_read(ddata, dispc_offset + 0x238);
	1772	+ lcd2_en = val & lcd_en_mask;
	1773	+ if (lcd2_en)
	1774	+ irq_mask \|= BIT(22); /* FRAMEDONE2 */
	1775	+ if (disable && lcd2_en)
	1776	+ sysc_write(ddata, dispc_offset + 0x238,
	1777	+ val & ~lcd_en_mask);
	1778	+
	1779	+ if (manager_count <= 3)
	1780	+ return irq_mask;
	1781	+
	1782	+ /* DISPC_CONTROL3 */
	1783	+ val = sysc_read(ddata, dispc_offset + 0x848);
	1784	+ lcd3_en = val & lcd_en_mask;
	1785	+ if (lcd3_en)
	1786	+ irq_mask \|= BIT(30); /* FRAMEDONE3 */
	1787	+ if (disable && lcd3_en)
	1788	+ sysc_write(ddata, dispc_offset + 0x848,
	1789	+ val & ~lcd_en_mask);
	1790	+
	1791	+ return irq_mask;
	1792	+}
	1793	+
	1794	+/* DSS needs child outputs disabled and SDI registers cleared for reset */
	1795	+static void sysc_pre_reset_quirk_dss(struct sysc *ddata)
	1796	+{
	1797	+ const int dispc_offset = 0x1000;
	1798	+ int error;
	1799	+ u32 irq_mask, val;
	1800	+
	1801	+ /* Get enabled outputs */
	1802	+ irq_mask = sysc_quirk_dispc(ddata, dispc_offset, false);
	1803	+ if (!irq_mask)
	1804	+ return;
	1805	+
	1806	+ /* Clear IRQSTATUS */
	1807	+ sysc_write(ddata, dispc_offset + 0x18, irq_mask);
	1808	+
	1809	+ /* Disable outputs */
	1810	+ val = sysc_quirk_dispc(ddata, dispc_offset, true);
	1811	+
	1812	+ /* Poll IRQSTATUS */
	1813	+ error = readl_poll_timeout(ddata->module_va + dispc_offset + 0x18,
	1814	+ val, val != irq_mask, 100, 50);
	1815	+ if (error)
	1816	+ dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n",
	1817	+ __func__, val, irq_mask);
	1818	+
	1819	+ if (sysc_soc->soc == SOC_3430) {
	1820	+ /* Clear DSS_SDI_CONTROL */
	1821	+ sysc_write(ddata, 0x44, 0);
	1822	+
	1823	+ /* Clear DSS_PLL_CONTROL */
	1824	+ sysc_write(ddata, 0x48, 0);
	1825	+ }
	1826	+
	1827	+ /* Clear DSS_CONTROL to switch DSS clock sources to PRCM if not */
	1828	+ sysc_write(ddata, 0x40, 0);
	1829	+}
	1830	+
	1831	+/* 1-wire needs module's internal clocks enabled for reset */
	1832	+static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
	1833	+{
	1834	+ int offset = 0x0c; /* HDQ_CTRL_STATUS */
	1835	+ u16 val;
	1836	+
	1837	+ val = sysc_read(ddata, offset);
	1838	+ val \|= BIT(5);
	1839	+ sysc_write(ddata, offset, val);
	1840	+}
	1841	+
	1842	+/* AESS (Audio Engine SubSystem) needs autogating set after enable */
	1843	+static void sysc_module_enable_quirk_aess(struct sysc *ddata)
	1844	+{
	1845	+ int offset = 0x7c; /* AESS_AUTO_GATING_ENABLE */
	1846	+
	1847	+ sysc_write(ddata, offset, 1);
	1848	+}
	1849	+
	1850	+/* I2C needs to be disabled for reset */
	1851	+static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable)
	1852	+{
	1853	+ int offset;
	1854	+ u16 val;
	1855	+
	1856	+ /* I2C_CON, omap2/3 is different from omap4 and later */
	1857	+ if ((ddata->revision & 0xffffff00) == 0x001f0000)
	1858	+ offset = 0x24;
	1859	+ else
	1860	+ offset = 0xa4;
	1861	+
	1862	+ /* I2C_EN */
	1863	+ val = sysc_read(ddata, offset);
	1864	+ if (enable)
	1865	+ val \|= BIT(15);
	1866	+ else
	1867	+ val &= ~BIT(15);
	1868	+ sysc_write(ddata, offset, val);
	1869	+}
	1870	+
	1871	+static void sysc_pre_reset_quirk_i2c(struct sysc *ddata)
	1872	+{
	1873	+ sysc_clk_quirk_i2c(ddata, false);
	1874	+}
	1875	+
	1876	+static void sysc_post_reset_quirk_i2c(struct sysc *ddata)
	1877	+{
	1878	+ sysc_clk_quirk_i2c(ddata, true);
	1879	+}
	1880	+
	1881	+/* RTC on am3 and 4 needs to be unlocked and locked for sysconfig */
	1882	+static void sysc_quirk_rtc(struct sysc *ddata, bool lock)
	1883	+{
	1884	+ u32 val, kick0_val = 0, kick1_val = 0;
	1885	+ unsigned long flags;
	1886	+ int error;
	1887	+
	1888	+ if (!lock) {
	1889	+ kick0_val = 0x83e70b13;
	1890	+ kick1_val = 0x95a4f1e0;
	1891	+ }
	1892	+
	1893	+ local_irq_save(flags);
	1894	+ /* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */
	1895	+ error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val,
	1896	+ !(val & BIT(0)), 100, 50);
	1897	+ if (error)
	1898	+ dev_warn(ddata->dev, "rtc busy timeout\n");
	1899	+ /* Now we have ~15 microseconds to read/write various registers */
	1900	+ sysc_write(ddata, 0x6c, kick0_val);
	1901	+ sysc_write(ddata, 0x70, kick1_val);
	1902	+ local_irq_restore(flags);
	1903	+}
	1904	+
	1905	+static void sysc_module_unlock_quirk_rtc(struct sysc *ddata)
	1906	+{
	1907	+ sysc_quirk_rtc(ddata, false);
	1908	+}
	1909	+
	1910	+static void sysc_module_lock_quirk_rtc(struct sysc *ddata)
	1911	+{
	1912	+ sysc_quirk_rtc(ddata, true);
	1913	+}
	1914	+
	1915	+/* 36xx SGX needs a quirk for to bypass OCP IPG interrupt logic */
	1916	+static void sysc_module_enable_quirk_sgx(struct sysc *ddata)
	1917	+{
	1918	+ int offset = 0xff08; /* OCP_DEBUG_CONFIG */
	1919	+ u32 val = BIT(31); /* THALIA_INT_BYPASS */
	1920	+
	1921	+ sysc_write(ddata, offset, val);
	1922	+}
	1923	+
	1924	+/* Watchdog timer needs a disable sequence after reset */
	1925	+static void sysc_reset_done_quirk_wdt(struct sysc *ddata)
	1926	+{
	1927	+ int wps, spr, error;
	1928	+ u32 val;
	1929	+
	1930	+ wps = 0x34;
	1931	+ spr = 0x48;
	1932	+
	1933	+ sysc_write(ddata, spr, 0xaaaa);
	1934	+ error = readl_poll_timeout(ddata->module_va + wps, val,
	1935	+ !(val & 0x10), 100,
	1936	+ MAX_MODULE_SOFTRESET_WAIT);
	1937	+ if (error)
	1938	+ dev_warn(ddata->dev, "wdt disable step1 failed\n");
	1939	+
	1940	+ sysc_write(ddata, spr, 0x5555);
	1941	+ error = readl_poll_timeout(ddata->module_va + wps, val,
	1942	+ !(val & 0x10), 100,
	1943	+ MAX_MODULE_SOFTRESET_WAIT);
	1944	+ if (error)
	1945	+ dev_warn(ddata->dev, "wdt disable step2 failed\n");
	1946	+}
	1947	+
	1948	+/* PRUSS needs to set MSTANDBY_INIT inorder to idle properly */
	1949	+static void sysc_module_disable_quirk_pruss(struct sysc *ddata)
	1950	+{
	1951	+ u32 reg;
	1952	+
	1953	+ reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
	1954	+ reg \|= SYSC_PRUSS_STANDBY_INIT;
	1955	+ sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
	1956	+}
	1957	+
	1958	+static void sysc_init_module_quirks(struct sysc *ddata)
	1959	+{
	1960	+ if (ddata->legacy_mode \|\| !ddata->name)
	1961	+ return;
	1962	+
	1963	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
	1964	+ ddata->pre_reset_quirk = sysc_pre_reset_quirk_hdq1w;
	1965	+
	1966	+ return;
	1967	+ }
	1968	+
	1969	+#ifdef CONFIG_OMAP_GPMC_DEBUG
	1970	+ if (ddata->cfg.quirks & SYSC_QUIRK_GPMC_DEBUG) {
	1971	+ ddata->cfg.quirks \|= SYSC_QUIRK_NO_RESET_ON_INIT;
	1972	+
	1973	+ return;
	1974	+ }
	1975	+#endif
	1976	+
	1977	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_I2C) {
	1978	+ ddata->pre_reset_quirk = sysc_pre_reset_quirk_i2c;
	1979	+ ddata->post_reset_quirk = sysc_post_reset_quirk_i2c;
	1980	+
	1981	+ return;
	1982	+ }
	1983	+
	1984	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_AESS)
	1985	+ ddata->module_enable_quirk = sysc_module_enable_quirk_aess;
	1986	+
	1987	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_DSS_RESET)
	1988	+ ddata->pre_reset_quirk = sysc_pre_reset_quirk_dss;
	1989	+
	1990	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_RTC_UNLOCK) {
	1991	+ ddata->module_unlock_quirk = sysc_module_unlock_quirk_rtc;
	1992	+ ddata->module_lock_quirk = sysc_module_lock_quirk_rtc;
	1993	+
	1994	+ return;
	1995	+ }
	1996	+
	1997	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
	1998	+ ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
	1999	+
	2000	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT) {
	2001	+ ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
	2002	+ ddata->module_disable_quirk = sysc_reset_done_quirk_wdt;
	2003	+ }
	2004	+
	2005	+ if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS)
	2006	+ ddata->module_disable_quirk = sysc_module_disable_quirk_pruss;
	2007	+}
	2008	+
	2009	+static int sysc_clockdomain_init(struct sysc *ddata)
	2010	+{
	2011	+ struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
	2012	+ struct clk fck = NULL, ick = NULL;
	2013	+ int error;
	2014	+
	2015	+ if (!pdata \|\| !pdata->init_clockdomain)
	2016	+ return 0;
	2017	+
	2018	+ switch (ddata->nr_clocks) {
	2019	+ case 2:
	2020	+ ick = ddata->clocks[SYSC_ICK];
	2021	+ fallthrough;
	2022	+ case 1:
	2023	+ fck = ddata->clocks[SYSC_FCK];
	2024	+ break;
	2025	+ case 0:
	2026	+ return 0;
	2027	+ }
	2028	+
	2029	+ error = pdata->init_clockdomain(ddata->dev, fck, ick, &ddata->cookie);
	2030	+ if (!error \|\| error == -ENODEV)
	2031	+ return 0;
	2032	+
	2033	+ return error;
	2034	+}
	2035	+
	2036	+/*
	2037	+ * Note that pdata->init_module() typically does a reset first. After
	2038	+ * pdata->init_module() is done, PM runtime can be used for the interconnect
	2039	+ * target module.
	2040	+ */
	2041	+static int sysc_legacy_init(struct sysc *ddata)
	2042	+{
	2043	+ struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
	2044	+ int error;
	2045	+
	2046	+ if (!pdata \|\| !pdata->init_module)
	2047	+ return 0;
	2048	+
	2049	+ error = pdata->init_module(ddata->dev, ddata->mdata, &ddata->cookie);
	2050	+ if (error == -EEXIST)
	2051	+ error = 0;
	2052	+
	2053	+ return error;
	2054	+}
	2055	+
	2056	+/*
	2057	+ * Note that the caller must ensure the interconnect target module is enabled
	2058	+ * before calling reset. Otherwise reset will not complete.
	2059	+ */
960	2060	static int sysc_reset(struct sysc *ddata)
961	2061	{
962		- int offset = ddata->offsets[SYSC_SYSCONFIG];
963		- int val;
	2062	+ int sysc_offset, sysc_val, error;
	2063	+ u32 sysc_mask;
964	2064
965		- if (ddata->legacy_mode \|\| offset < 0 \|\|
	2065	+ sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
	2066	+
	2067	+ if (ddata->legacy_mode \|\|
	2068	+ ddata->cap->regbits->srst_shift < 0 \|\|
966	2069	ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
967	2070	return 0;
968	2071
969		- /*
970		- * Currently only support reset status in sysstatus.
971		- * Warn and return error in all other cases
972		- */
973		- if (!ddata->cfg.syss_mask) {
974		- dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n");
975		- return -EINVAL;
	2072	+ sysc_mask = BIT(ddata->cap->regbits->srst_shift);
	2073	+
	2074	+ if (ddata->pre_reset_quirk)
	2075	+ ddata->pre_reset_quirk(ddata);
	2076	+
	2077	+ if (sysc_offset >= 0) {
	2078	+ sysc_val = sysc_read_sysconfig(ddata);
	2079	+ sysc_val \|= sysc_mask;
	2080	+ sysc_write(ddata, sysc_offset, sysc_val);
976	2081	}
977	2082
978		- val = sysc_read(ddata, offset);
979		- val \|= (0x1 << ddata->cap->regbits->srst_shift);
980		- sysc_write(ddata, offset, val);
	2083	+ if (ddata->cfg.srst_udelay)
	2084	+ usleep_range(ddata->cfg.srst_udelay,
	2085	+ ddata->cfg.srst_udelay * 2);
981	2086
982		- /* Poll on reset status */
983		- offset = ddata->offsets[SYSC_SYSSTATUS];
	2087	+ if (ddata->post_reset_quirk)
	2088	+ ddata->post_reset_quirk(ddata);
984	2089
985		- return readl_poll_timeout(ddata->module_va + offset, val,
986		- (val & ddata->cfg.syss_mask) == 0x0,
987		- 100, MAX_MODULE_SOFTRESET_WAIT);
	2090	+ error = sysc_wait_softreset(ddata);
	2091	+ if (error)
	2092	+ dev_warn(ddata->dev, "OCP softreset timed out\n");
	2093	+
	2094	+ if (ddata->reset_done_quirk)
	2095	+ ddata->reset_done_quirk(ddata);
	2096	+
	2097	+ return error;
988	2098	}
989	2099
990		-/* At this point the module is configured enough to read the revision */
	2100	+/*
	2101	+ * At this point the module is configured enough to read the revision but
	2102	+ * module may not be completely configured yet to use PM runtime. Enable
	2103	+ * all clocks directly during init to configure the quirks needed for PM
	2104	+ * runtime based on the revision register.
	2105	+ */
991	2106	static int sysc_init_module(struct sysc *ddata)
992	2107	{
993		- int error;
	2108	+ int error = 0;
994	2109
995		- if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
996		- ddata->revision = sysc_read_revision(ddata);
997		- goto rev_quirks;
998		- }
999		-
1000		- error = pm_runtime_get_sync(ddata->dev);
1001		- if (error < 0) {
1002		- pm_runtime_put_noidle(ddata->dev);
1003		-
1004		- return 0;
1005		- }
1006		-
1007		- error = sysc_reset(ddata);
1008		- if (error) {
1009		- dev_err(ddata->dev, "Reset failed with %d\n", error);
1010		- pm_runtime_put_sync(ddata->dev);
1011		-
	2110	+ error = sysc_clockdomain_init(ddata);
	2111	+ if (error)
1012	2112	return error;
	2113	+
	2114	+ sysc_clkdm_deny_idle(ddata);
	2115	+
	2116	+ /*
	2117	+ * Always enable clocks. The bootloader may or may not have enabled
	2118	+ * the related clocks.
	2119	+ */
	2120	+ error = sysc_enable_opt_clocks(ddata);
	2121	+ if (error)
	2122	+ return error;
	2123	+
	2124	+ error = sysc_enable_main_clocks(ddata);
	2125	+ if (error)
	2126	+ goto err_opt_clocks;
	2127	+
	2128	+ if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) {
	2129	+ error = reset_control_deassert(ddata->rsts);
	2130	+ if (error)
	2131	+ goto err_main_clocks;
1013	2132	}
1014	2133
1015	2134	ddata->revision = sysc_read_revision(ddata);
1016		- pm_runtime_put_sync(ddata->dev);
1017		-
1018		-rev_quirks:
1019	2135	sysc_init_revision_quirks(ddata);
	2136	+ sysc_init_module_quirks(ddata);
1020	2137
1021		- return 0;
	2138	+ if (ddata->legacy_mode) {
	2139	+ error = sysc_legacy_init(ddata);
	2140	+ if (error)
	2141	+ goto err_reset;
	2142	+ }
	2143	+
	2144	+ if (!ddata->legacy_mode) {
	2145	+ error = sysc_enable_module(ddata->dev);
	2146	+ if (error)
	2147	+ goto err_reset;
	2148	+ }
	2149	+
	2150	+ error = sysc_reset(ddata);
	2151	+ if (error)
	2152	+ dev_err(ddata->dev, "Reset failed with %d\n", error);
	2153	+
	2154	+ if (error && !ddata->legacy_mode)
	2155	+ sysc_disable_module(ddata->dev);
	2156	+
	2157	+err_reset:
	2158	+ if (error && !(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT))
	2159	+ reset_control_assert(ddata->rsts);
	2160	+
	2161	+err_main_clocks:
	2162	+ if (error)
	2163	+ sysc_disable_main_clocks(ddata);
	2164	+err_opt_clocks:
	2165	+ /* No re-enable of clockdomain autoidle to prevent module autoidle */
	2166	+ if (error) {
	2167	+ sysc_disable_opt_clocks(ddata);
	2168	+ sysc_clkdm_allow_idle(ddata);
	2169	+ }
	2170	+
	2171	+ return error;
1022	2172	}
1023	2173
1024	2174	static int sysc_init_sysc_mask(struct sysc *ddata)
..	..	@@ -1120,9 +2270,8 @@
1120	2270
1121	2271	clk = clk_get(child, name);
1122	2272	if (!IS_ERR(clk)) {
1123		- clk_put(clk);
1124		-
1125		- return -EEXIST;
	2273	+ error = -EEXIST;
	2274	+ goto put_clk;
1126	2275	}
1127	2276
1128	2277	clk = clk_get(ddata->dev, name);
..	..	@@ -1132,7 +2281,7 @@
1132	2281	l = clkdev_create(clk, name, dev_name(child));
1133	2282	if (!l)
1134	2283	error = -ENOMEM;
1135		-
	2284	+put_clk:
1136	2285	clk_put(clk);
1137	2286
1138	2287	return error;
..	..	@@ -1227,8 +2376,8 @@
1227	2376	if (!pm_runtime_status_suspended(dev)) {
1228	2377	error = pm_generic_runtime_suspend(dev);
1229	2378	if (error) {
1230		- dev_warn(dev, "%s busy at %i: %i\n",
1231		- __func__, __LINE__, error);
	2379	+ dev_dbg(dev, "%s busy at %i: %i\n",
	2380	+ __func__, __LINE__, error);
1232	2381
1233	2382	return 0;
1234	2383	}
..	..	@@ -1277,7 +2426,7 @@
1277	2426	}
1278	2427	#endif
1279	2428
1280		-struct dev_pm_domain sysc_child_pm_domain = {
	2429	+static struct dev_pm_domain sysc_child_pm_domain = {
1281	2430	.ops = {
1282	2431	SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1283	2432	sysc_child_runtime_resume,
..	..	@@ -1287,6 +2436,78 @@
1287	2436	sysc_child_resume_noirq)
1288	2437	}
1289	2438	};
	2439	+
	2440	+/* Caller needs to take list_lock if ever used outside of cpu_pm */
	2441	+static void sysc_reinit_modules(struct sysc_soc_info *soc)
	2442	+{
	2443	+ struct sysc_module *module;
	2444	+ struct list_head *pos;
	2445	+ struct sysc *ddata;
	2446	+
	2447	+ list_for_each(pos, &sysc_soc->restored_modules) {
	2448	+ module = list_entry(pos, struct sysc_module, node);
	2449	+ ddata = module->ddata;
	2450	+ sysc_reinit_module(ddata, ddata->enabled);
	2451	+ }
	2452	+}
	2453	+
	2454	+/**
	2455	+ * sysc_context_notifier - optionally reset and restore module after idle
	2456	+ * @nb: notifier block
	2457	+ * @cmd: unused
	2458	+ * @v: unused
	2459	+ *
	2460	+ * Some interconnect target modules need to be restored, or reset and restored
	2461	+ * on CPU_PM CPU_PM_CLUSTER_EXIT notifier. This is needed at least for am335x
	2462	+ * OTG and GPMC target modules even if the modules are unused.
	2463	+ */
	2464	+static int sysc_context_notifier(struct notifier_block *nb, unsigned long cmd,
	2465	+ void *v)
	2466	+{
	2467	+ struct sysc_soc_info *soc;
	2468	+
	2469	+ soc = container_of(nb, struct sysc_soc_info, nb);
	2470	+
	2471	+ switch (cmd) {
	2472	+ case CPU_CLUSTER_PM_ENTER:
	2473	+ break;
	2474	+ case CPU_CLUSTER_PM_ENTER_FAILED: /* No need to restore context */
	2475	+ break;
	2476	+ case CPU_CLUSTER_PM_EXIT:
	2477	+ sysc_reinit_modules(soc);
	2478	+ break;
	2479	+ }
	2480	+
	2481	+ return NOTIFY_OK;
	2482	+}
	2483	+
	2484	+/**
	2485	+ * sysc_add_restored - optionally add reset and restore quirk hanlling
	2486	+ * @ddata: device data
	2487	+ */
	2488	+static void sysc_add_restored(struct sysc *ddata)
	2489	+{
	2490	+ struct sysc_module *restored_module;
	2491	+
	2492	+ restored_module = kzalloc(sizeof(*restored_module), GFP_KERNEL);
	2493	+ if (!restored_module)
	2494	+ return;
	2495	+
	2496	+ restored_module->ddata = ddata;
	2497	+
	2498	+ mutex_lock(&sysc_soc->list_lock);
	2499	+
	2500	+ list_add(&restored_module->node, &sysc_soc->restored_modules);
	2501	+
	2502	+ if (sysc_soc->nb.notifier_call)
	2503	+ goto out_unlock;
	2504	+
	2505	+ sysc_soc->nb.notifier_call = sysc_context_notifier;
	2506	+ cpu_pm_register_notifier(&sysc_soc->nb);
	2507	+
	2508	+out_unlock:
	2509	+ mutex_unlock(&sysc_soc->list_lock);
	2510	+}
1290	2511
1291	2512	/**
1292	2513	* sysc_legacy_idle_quirk - handle children in omap_device compatible way
..	..	@@ -1303,9 +2524,6 @@
1303	2524	*/
1304	2525	static void sysc_legacy_idle_quirk(struct sysc ddata, struct device child)
1305	2526	{
1306		- if (!ddata->legacy_mode)
1307		- return;
1308		-
1309	2527	if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1310	2528	dev_pm_domain_set(child, &sysc_child_pm_domain);
1311	2529	}
..	..	@@ -1350,6 +2568,8 @@
1350	2568	.mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1351	2569	{ .name = "ti,no-reset-on-init",
1352	2570	.mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
	2571	+ { .name = "ti,no-idle",
	2572	+ .mask = SYSC_QUIRK_NO_IDLE, },
1353	2573	};
1354	2574
1355	2575	static void sysc_parse_dts_quirks(struct sysc ddata, struct device_node np,
..	..	@@ -1643,33 +2863,44 @@
1643	2863	.type = TI_SYSC_DRA7_MCAN,
1644	2864	.sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP \| SYSC_OMAP4_SOFTRESET,
1645	2865	.regbits = &sysc_regbits_dra7_mcan,
	2866	+ .mod_quirks = SYSS_QUIRK_RESETDONE_INVERTED,
	2867	+};
	2868	+
	2869	+/*
	2870	+ * PRUSS found on some AM33xx, AM437x and AM57xx SoCs
	2871	+ */
	2872	+static const struct sysc_capabilities sysc_pruss = {
	2873	+ .type = TI_SYSC_PRUSS,
	2874	+ .sysc_mask = SYSC_PRUSS_STANDBY_INIT \| SYSC_PRUSS_SUB_MWAIT,
	2875	+ .regbits = &sysc_regbits_omap4_simple,
	2876	+ .mod_quirks = SYSC_MODULE_QUIRK_PRUSS,
1646	2877	};
1647	2878
1648	2879	static int sysc_init_pdata(struct sysc *ddata)
1649	2880	{
1650	2881	struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1651		- struct ti_sysc_module_data mdata;
1652		- int error = 0;
	2882	+ struct ti_sysc_module_data *mdata;
1653	2883
1654		- if (!pdata \|\| !ddata->legacy_mode)
	2884	+ if (!pdata)
1655	2885	return 0;
1656	2886
1657		- mdata.name = ddata->legacy_mode;
1658		- mdata.module_pa = ddata->module_pa;
1659		- mdata.module_size = ddata->module_size;
1660		- mdata.offsets = ddata->offsets;
1661		- mdata.nr_offsets = SYSC_MAX_REGS;
1662		- mdata.cap = ddata->cap;
1663		- mdata.cfg = &ddata->cfg;
	2887	+ mdata = devm_kzalloc(ddata->dev, sizeof(*mdata), GFP_KERNEL);
	2888	+ if (!mdata)
	2889	+ return -ENOMEM;
1664	2890
1665		- if (!pdata->init_module)
1666		- return -ENODEV;
	2891	+ if (ddata->legacy_mode) {
	2892	+ mdata->name = ddata->legacy_mode;
	2893	+ mdata->module_pa = ddata->module_pa;
	2894	+ mdata->module_size = ddata->module_size;
	2895	+ mdata->offsets = ddata->offsets;
	2896	+ mdata->nr_offsets = SYSC_MAX_REGS;
	2897	+ mdata->cap = ddata->cap;
	2898	+ mdata->cfg = &ddata->cfg;
	2899	+ }
1667	2900
1668		- error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1669		- if (error == -EEXIST)
1670		- error = 0;
	2901	+ ddata->mdata = mdata;
1671	2902
1672		- return error;
	2903	+ return 0;
1673	2904	}
1674	2905
1675	2906	static int sysc_init_match(struct sysc *ddata)
..	..	@@ -1693,8 +2924,235 @@
1693	2924
1694	2925	ddata = container_of(work, struct sysc, idle_work.work);
1695	2926
	2927	+ /*
	2928	+ * One time decrement of clock usage counts if left on from init.
	2929	+ * Note that we disable opt clocks unconditionally in this case
	2930	+ * as they are enabled unconditionally during init without
	2931	+ * considering sysc_opt_clks_needed() at that point.
	2932	+ */
	2933	+ if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE \|
	2934	+ SYSC_QUIRK_NO_IDLE_ON_INIT)) {
	2935	+ sysc_disable_main_clocks(ddata);
	2936	+ sysc_disable_opt_clocks(ddata);
	2937	+ sysc_clkdm_allow_idle(ddata);
	2938	+ }
	2939	+
	2940	+ /* Keep permanent PM runtime usage count for SYSC_QUIRK_NO_IDLE */
	2941	+ if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE)
	2942	+ return;
	2943	+
	2944	+ /*
	2945	+ * Decrement PM runtime usage count for SYSC_QUIRK_NO_IDLE_ON_INIT
	2946	+ * and SYSC_QUIRK_NO_RESET_ON_INIT
	2947	+ */
1696	2948	if (pm_runtime_active(ddata->dev))
1697	2949	pm_runtime_put_sync(ddata->dev);
	2950	+}
	2951	+
	2952	+/*
	2953	+ * SoC model and features detection. Only needed for SoCs that need
	2954	+ * special handling for quirks, no need to list others.
	2955	+ */
	2956	+static const struct soc_device_attribute sysc_soc_match[] = {
	2957	+ SOC_FLAG("OMAP242*", SOC_2420),
	2958	+ SOC_FLAG("OMAP243*", SOC_2430),
	2959	+ SOC_FLAG("OMAP3[45]*", SOC_3430),
	2960	+ SOC_FLAG("OMAP3[67]*", SOC_3630),
	2961	+ SOC_FLAG("OMAP443*", SOC_4430),
	2962	+ SOC_FLAG("OMAP446*", SOC_4460),
	2963	+ SOC_FLAG("OMAP447*", SOC_4470),
	2964	+ SOC_FLAG("OMAP54*", SOC_5430),
	2965	+ SOC_FLAG("AM433", SOC_AM3),
	2966	+ SOC_FLAG("AM43*", SOC_AM4),
	2967	+ SOC_FLAG("DRA7*", SOC_DRA7),
	2968	+
	2969	+ { /* sentinel */ },
	2970	+};
	2971	+
	2972	+/*
	2973	+ * List of SoCs variants with disabled features. By default we assume all
	2974	+ * devices in the device tree are available so no need to list those SoCs.
	2975	+ */
	2976	+static const struct soc_device_attribute sysc_soc_feat_match[] = {
	2977	+ /* OMAP3430/3530 and AM3517 variants with some accelerators disabled */
	2978	+ SOC_FLAG("AM3505", DIS_SGX),
	2979	+ SOC_FLAG("OMAP3525", DIS_SGX),
	2980	+ SOC_FLAG("OMAP3515", DIS_IVA \| DIS_SGX),
	2981	+ SOC_FLAG("OMAP3503", DIS_ISP \| DIS_IVA \| DIS_SGX),
	2982	+
	2983	+ /* OMAP3630/DM3730 variants with some accelerators disabled */
	2984	+ SOC_FLAG("AM3703", DIS_IVA \| DIS_SGX),
	2985	+ SOC_FLAG("DM3725", DIS_SGX),
	2986	+ SOC_FLAG("OMAP3611", DIS_ISP \| DIS_IVA \| DIS_SGX),
	2987	+ SOC_FLAG("OMAP3615/AM3715", DIS_IVA),
	2988	+ SOC_FLAG("OMAP3621", DIS_ISP),
	2989	+
	2990	+ { /* sentinel */ },
	2991	+};
	2992	+
	2993	+static int sysc_add_disabled(unsigned long base)
	2994	+{
	2995	+ struct sysc_address *disabled_module;
	2996	+
	2997	+ disabled_module = kzalloc(sizeof(*disabled_module), GFP_KERNEL);
	2998	+ if (!disabled_module)
	2999	+ return -ENOMEM;
	3000	+
	3001	+ disabled_module->base = base;
	3002	+
	3003	+ mutex_lock(&sysc_soc->list_lock);
	3004	+ list_add(&disabled_module->node, &sysc_soc->disabled_modules);
	3005	+ mutex_unlock(&sysc_soc->list_lock);
	3006	+
	3007	+ return 0;
	3008	+}
	3009	+
	3010	+/*
	3011	+ * One time init to detect the booted SoC, disable unavailable features
	3012	+ * and initialize list for optional cpu_pm notifier.
	3013	+ *
	3014	+ * Note that we initialize static data shared across all ti-sysc instances
	3015	+ * so ddata is only used for SoC type. This can be called from module_init
	3016	+ * once we no longer need to rely on platform data.
	3017	+ */
	3018	+static int sysc_init_static_data(struct sysc *ddata)
	3019	+{
	3020	+ const struct soc_device_attribute *match;
	3021	+ struct ti_sysc_platform_data *pdata;
	3022	+ unsigned long features = 0;
	3023	+
	3024	+ if (sysc_soc)
	3025	+ return 0;
	3026	+
	3027	+ sysc_soc = kzalloc(sizeof(*sysc_soc), GFP_KERNEL);
	3028	+ if (!sysc_soc)
	3029	+ return -ENOMEM;
	3030	+
	3031	+ mutex_init(&sysc_soc->list_lock);
	3032	+ INIT_LIST_HEAD(&sysc_soc->disabled_modules);
	3033	+ INIT_LIST_HEAD(&sysc_soc->restored_modules);
	3034	+ sysc_soc->general_purpose = true;
	3035	+
	3036	+ pdata = dev_get_platdata(ddata->dev);
	3037	+ if (pdata && pdata->soc_type_gp)
	3038	+ sysc_soc->general_purpose = pdata->soc_type_gp();
	3039	+
	3040	+ match = soc_device_match(sysc_soc_match);
	3041	+ if (match && match->data)
	3042	+ sysc_soc->soc = (int)match->data;
	3043	+
	3044	+ /* Ignore devices that are not available on HS and EMU SoCs */
	3045	+ if (!sysc_soc->general_purpose) {
	3046	+ switch (sysc_soc->soc) {
	3047	+ case SOC_3430 ... SOC_3630:
	3048	+ sysc_add_disabled(0x48304000); /* timer12 */
	3049	+ break;
	3050	+ case SOC_AM3:
	3051	+ sysc_add_disabled(0x48310000); /* rng */
	3052	+ break;
	3053	+ default:
	3054	+ break;
	3055	+ };
	3056	+ }
	3057	+
	3058	+ match = soc_device_match(sysc_soc_feat_match);
	3059	+ if (!match)
	3060	+ return 0;
	3061	+
	3062	+ if (match->data)
	3063	+ features = (unsigned long)match->data;
	3064	+
	3065	+ /*
	3066	+ * Add disabled devices to the list based on the module base.
	3067	+ * Note that this must be done before we attempt to access the
	3068	+ * device and have module revision checks working.
	3069	+ */
	3070	+ if (features & DIS_ISP)
	3071	+ sysc_add_disabled(0x480bd400);
	3072	+ if (features & DIS_IVA)
	3073	+ sysc_add_disabled(0x5d000000);
	3074	+ if (features & DIS_SGX)
	3075	+ sysc_add_disabled(0x50000000);
	3076	+
	3077	+ return 0;
	3078	+}
	3079	+
	3080	+static void sysc_cleanup_static_data(void)
	3081	+{
	3082	+ struct sysc_module *restored_module;
	3083	+ struct sysc_address *disabled_module;
	3084	+ struct list_head pos, tmp;
	3085	+
	3086	+ if (!sysc_soc)
	3087	+ return;
	3088	+
	3089	+ if (sysc_soc->nb.notifier_call)
	3090	+ cpu_pm_unregister_notifier(&sysc_soc->nb);
	3091	+
	3092	+ mutex_lock(&sysc_soc->list_lock);
	3093	+ list_for_each_safe(pos, tmp, &sysc_soc->restored_modules) {
	3094	+ restored_module = list_entry(pos, struct sysc_module, node);
	3095	+ list_del(pos);
	3096	+ kfree(restored_module);
	3097	+ }
	3098	+ list_for_each_safe(pos, tmp, &sysc_soc->disabled_modules) {
	3099	+ disabled_module = list_entry(pos, struct sysc_address, node);
	3100	+ list_del(pos);
	3101	+ kfree(disabled_module);
	3102	+ }
	3103	+ mutex_unlock(&sysc_soc->list_lock);
	3104	+}
	3105	+
	3106	+static int sysc_check_disabled_devices(struct sysc *ddata)
	3107	+{
	3108	+ struct sysc_address *disabled_module;
	3109	+ struct list_head *pos;
	3110	+ int error = 0;
	3111	+
	3112	+ mutex_lock(&sysc_soc->list_lock);
	3113	+ list_for_each(pos, &sysc_soc->disabled_modules) {
	3114	+ disabled_module = list_entry(pos, struct sysc_address, node);
	3115	+ if (ddata->module_pa == disabled_module->base) {
	3116	+ dev_dbg(ddata->dev, "module disabled for this SoC\n");
	3117	+ error = -ENODEV;
	3118	+ break;
	3119	+ }
	3120	+ }
	3121	+ mutex_unlock(&sysc_soc->list_lock);
	3122	+
	3123	+ return error;
	3124	+}
	3125	+
	3126	+/*
	3127	+ * Ignore timers tagged with no-reset and no-idle. These are likely in use,
	3128	+ * for example by drivers/clocksource/timer-ti-dm-systimer.c. If more checks
	3129	+ * are needed, we could also look at the timer register configuration.
	3130	+ */
	3131	+static int sysc_check_active_timer(struct sysc *ddata)
	3132	+{
	3133	+ int error;
	3134	+
	3135	+ if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
	3136	+ ddata->cap->type != TI_SYSC_OMAP4_TIMER)
	3137	+ return 0;
	3138	+
	3139	+ /*
	3140	+ * Quirk for omap3 beagleboard revision A to B4 to use gpt12.
	3141	+ * Revision C and later are fixed with commit 23885389dbbb ("ARM:
	3142	+ * dts: Fix timer regression for beagleboard revision c"). This all
	3143	+ * can be dropped if we stop supporting old beagleboard revisions
	3144	+ * A to B4 at some point.
	3145	+ */
	3146	+ if (sysc_soc->soc == SOC_3430)
	3147	+ error = -ENXIO;
	3148	+ else
	3149	+ error = -EBUSY;
	3150	+
	3151	+ if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
	3152	+ (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
	3153	+ return error;
	3154	+
	3155	+ return 0;
1698	3156	}
1699	3157
1700	3158	static const struct of_device_id sysc_match_table[] = {
..	..	@@ -1715,15 +3173,15 @@
1715	3173	ddata->dev = &pdev->dev;
1716	3174	platform_set_drvdata(pdev, ddata);
1717	3175
	3176	+ error = sysc_init_static_data(ddata);
	3177	+ if (error)
	3178	+ return error;
	3179	+
1718	3180	error = sysc_init_match(ddata);
1719	3181	if (error)
1720	3182	return error;
1721	3183
1722	3184	error = sysc_init_dts_quirks(ddata);
1723		- if (error)
1724		- return error;
1725		-
1726		- error = sysc_get_clocks(ddata);
1727	3185	if (error)
1728	3186	return error;
1729	3187
..	..	@@ -1747,15 +3205,31 @@
1747	3205	if (error)
1748	3206	return error;
1749	3207
	3208	+ sysc_init_early_quirks(ddata);
	3209	+
	3210	+ error = sysc_check_disabled_devices(ddata);
	3211	+ if (error)
	3212	+ return error;
	3213	+
	3214	+ error = sysc_check_active_timer(ddata);
	3215	+ if (error == -ENXIO)
	3216	+ ddata->reserved = true;
	3217	+ else if (error)
	3218	+ return error;
	3219	+
	3220	+ error = sysc_get_clocks(ddata);
	3221	+ if (error)
	3222	+ return error;
	3223	+
1750	3224	error = sysc_init_resets(ddata);
1751	3225	if (error)
1752	3226	goto unprepare;
1753	3227
1754		- pm_runtime_enable(ddata->dev);
1755	3228	error = sysc_init_module(ddata);
1756	3229	if (error)
1757	3230	goto unprepare;
1758	3231
	3232	+ pm_runtime_enable(ddata->dev);
1759	3233	error = pm_runtime_get_sync(ddata->dev);
1760	3234	if (error < 0) {
1761	3235	pm_runtime_put_noidle(ddata->dev);
..	..	@@ -1763,27 +3237,43 @@
1763	3237	goto unprepare;
1764	3238	}
1765	3239
	3240	+ /* Balance use counts as PM runtime should have enabled these all */
	3241	+ if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT))
	3242	+ reset_control_assert(ddata->rsts);
	3243	+
	3244	+ if (!(ddata->cfg.quirks &
	3245	+ (SYSC_QUIRK_NO_IDLE \| SYSC_QUIRK_NO_IDLE_ON_INIT))) {
	3246	+ sysc_disable_main_clocks(ddata);
	3247	+ sysc_disable_opt_clocks(ddata);
	3248	+ sysc_clkdm_allow_idle(ddata);
	3249	+ }
	3250	+
1766	3251	sysc_show_registers(ddata);
1767	3252
1768	3253	ddata->dev->type = &sysc_device_type;
1769		- error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1770		- pdata ? pdata->auxdata : NULL,
1771		- ddata->dev);
1772		- if (error)
1773		- goto err;
	3254	+
	3255	+ if (!ddata->reserved) {
	3256	+ error = of_platform_populate(ddata->dev->of_node,
	3257	+ sysc_match_table,
	3258	+ pdata ? pdata->auxdata : NULL,
	3259	+ ddata->dev);
	3260	+ if (error)
	3261	+ goto err;
	3262	+ }
1774	3263
1775	3264	INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1776	3265
1777	3266	/* At least earlycon won't survive without deferred idle */
1778		- if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT \|
	3267	+ if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE \|
	3268	+ SYSC_QUIRK_NO_IDLE_ON_INIT \|
1779	3269	SYSC_QUIRK_NO_RESET_ON_INIT)) {
1780	3270	schedule_delayed_work(&ddata->idle_work, 3000);
1781	3271	} else {
1782	3272	pm_runtime_put(&pdev->dev);
1783	3273	}
1784	3274
1785		- if (!of_get_available_child_count(ddata->dev->of_node))
1786		- reset_control_assert(ddata->rsts);
	3275	+ if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_CTX_LOST)
	3276	+ sysc_add_restored(ddata);
1787	3277
1788	3278	return 0;
1789	3279
..	..	@@ -1801,7 +3291,9 @@
1801	3291	struct sysc *ddata = platform_get_drvdata(pdev);
1802	3292	int error;
1803	3293
1804		- cancel_delayed_work_sync(&ddata->idle_work);
	3294	+ /* Device can still be enabled, see deferred idle quirk in probe */
	3295	+ if (cancel_delayed_work_sync(&ddata->idle_work))
	3296	+ ti_sysc_idle(&ddata->idle_work.work);
1805	3297
1806	3298	error = pm_runtime_get_sync(ddata->dev);
1807	3299	if (error < 0) {
..	..	@@ -1840,6 +3332,7 @@
1840	3332	{ .compatible = "ti,sysc-usb-host-fs",
1841	3333	.data = &sysc_omap4_usb_host_fs, },
1842	3334	{ .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
	3335	+ { .compatible = "ti,sysc-pruss", .data = &sysc_pruss, },
1843	3336	{ },
1844	3337	};
1845	3338	MODULE_DEVICE_TABLE(of, sysc_match);
..	..	@@ -1866,6 +3359,7 @@
1866	3359	{
1867	3360	bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1868	3361	platform_driver_unregister(&sysc_driver);
	3362	+ sysc_cleanup_static_data();
1869	3363	}
1870	3364	module_exit(sysc_exit);
1871	3365