forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/arch/x86/pci/fixup.c
....@@ -557,12 +557,12 @@
557557 * Device [8086:2fc0]
558558 * Erratum HSE43
559559 * CONFIG_TDP_NOMINAL CSR Implemented at Incorrect Offset
560
- * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
560
+ * https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
561561 *
562562 * Devices [8086:6f60,6fa0,6fc0]
563563 * Erratum BDF2
564564 * PCI BARs in the Home Agent Will Return Non-Zero Values During Enumeration
565
- * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
565
+ * https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
566566 */
567567 static void pci_invalid_bar(struct pci_dev *dev)
568568 {
....@@ -587,7 +587,7 @@
587587 static void pci_fixup_amd_ehci_pme(struct pci_dev *dev)
588588 {
589589 dev_info(&dev->dev, "PME# does not work under D3, disabling it\n");
590
- dev->pme_support &= ~((PCI_PM_CAP_PME_D3 | PCI_PM_CAP_PME_D3cold)
590
+ dev->pme_support &= ~((PCI_PM_CAP_PME_D3hot | PCI_PM_CAP_PME_D3cold)
591591 >> PCI_PM_CAP_PME_SHIFT);
592592 }
593593 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x7808, pci_fixup_amd_ehci_pme);