kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/x86/lib/retpoline.S
..
..
@@ -4,18 +4,38 @@
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 #include <linux/linkage.h>
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 #include <asm/dwarf2.h>
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 #include <asm/cpufeatures.h>
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-#include <asm/alternative-asm.h>
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+#include <asm/alternative.h>
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 #include <asm/export.h>
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 #include <asm/nospec-branch.h>
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+#include <asm/unwind_hints.h>
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+#include <asm/frame.h>
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-.macro THUNK reg
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 	.section .text.__x86.indirect_thunk
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14
 
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-ENTRY(__x86_indirect_thunk_\reg)
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-	CFI_STARTPROC
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-	JMP_NOSPEC %\reg
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-	CFI_ENDPROC
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-ENDPROC(__x86_indirect_thunk_\reg)
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+.macro RETPOLINE reg
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+	ANNOTATE_INTRA_FUNCTION_CALL
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+	call    .Ldo_rop_\@
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+.Lspec_trap_\@:
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+	UNWIND_HINT_EMPTY
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+	pause
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+	lfence
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+	jmp .Lspec_trap_\@
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+.Ldo_rop_\@:
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+	mov     %\reg, (%_ASM_SP)
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+	UNWIND_HINT_FUNC
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+	RET
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+.endm
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+
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+.macro THUNK reg
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+
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+	.align RETPOLINE_THUNK_SIZE
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+SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL)
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+	UNWIND_HINT_EMPTY
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+
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+	ALTERNATIVE_2 __stringify(RETPOLINE \reg), \
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+		      __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg; int3), X86_FEATURE_RETPOLINE_LFENCE, \
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+		      __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), ALT_NOT(X86_FEATURE_RETPOLINE)
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+
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 .endm
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 /*
..
..
@@ -24,25 +44,98 @@
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  * only see one instance of "__x86_indirect_thunk_\reg" rather
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  * than one per register with the correct names. So we do it
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  * the simple and nasty way...
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+ *
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+ * Worse, you can only have a single EXPORT_SYMBOL per line,
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+ * and CPP can't insert newlines, so we have to repeat everything
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+ * at least twice.
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  */
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-#define __EXPORT_THUNK(sym) _ASM_NOKPROBE(sym); EXPORT_SYMBOL(sym)
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-#define EXPORT_THUNK(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg)
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-#define GENERATE_THUNK(reg) THUNK reg ; EXPORT_THUNK(reg)
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-GENERATE_THUNK(_ASM_AX)
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-GENERATE_THUNK(_ASM_BX)
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-GENERATE_THUNK(_ASM_CX)
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-GENERATE_THUNK(_ASM_DX)
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-GENERATE_THUNK(_ASM_SI)
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-GENERATE_THUNK(_ASM_DI)
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-GENERATE_THUNK(_ASM_BP)
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-#ifdef CONFIG_64BIT
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-GENERATE_THUNK(r8)
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-GENERATE_THUNK(r9)
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-GENERATE_THUNK(r10)
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-GENERATE_THUNK(r11)
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-GENERATE_THUNK(r12)
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-GENERATE_THUNK(r13)
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-GENERATE_THUNK(r14)
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-GENERATE_THUNK(r15)
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-#endif
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+#define __EXPORT_THUNK(sym)	_ASM_NOKPROBE(sym); EXPORT_SYMBOL(sym)
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+#define EXPORT_THUNK(reg)	__EXPORT_THUNK(__x86_indirect_thunk_ ## reg)
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+
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+	.align RETPOLINE_THUNK_SIZE
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+SYM_CODE_START(__x86_indirect_thunk_array)
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+
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+#define GEN(reg) THUNK reg
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+#include <asm/GEN-for-each-reg.h>
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+#undef GEN
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+
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+	.align RETPOLINE_THUNK_SIZE
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+SYM_CODE_END(__x86_indirect_thunk_array)
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+
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+#define GEN(reg) EXPORT_THUNK(reg)
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+#include <asm/GEN-for-each-reg.h>
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+#undef GEN
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+
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+/*
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+ * This function name is magical and is used by -mfunction-return=thunk-extern
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+ * for the compiler to generate JMPs to it.
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+ */
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+#ifdef CONFIG_RETHUNK
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+
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+	.section .text.__x86.return_thunk
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+
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+/*
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+ * Safety details here pertain to the AMD Zen{1,2} microarchitecture:
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+ * 1) The RET at __x86_return_thunk must be on a 64 byte boundary, for
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+ *    alignment within the BTB.
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+ * 2) The instruction at zen_untrain_ret must contain, and not
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+ *    end with, the 0xc3 byte of the RET.
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+ * 3) STIBP must be enabled, or SMT disabled, to prevent the sibling thread
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+ *    from re-poisioning the BTB prediction.
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+ */
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+	.align 64
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+	.skip 63, 0xcc
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+SYM_FUNC_START_NOALIGN(zen_untrain_ret);
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+
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+	/*
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+	 * As executed from zen_untrain_ret, this is:
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+	 *
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+	 *   TEST $0xcc, %bl
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+	 *   LFENCE
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+	 *   JMP __x86_return_thunk
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+	 *
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+	 * Executing the TEST instruction has a side effect of evicting any BTB
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+	 * prediction (potentially attacker controlled) attached to the RET, as
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+	 * __x86_return_thunk + 1 isn't an instruction boundary at the moment.
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+	 */
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+	.byte	0xf6
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+
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+	/*
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+	 * As executed from __x86_return_thunk, this is a plain RET.
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+	 *
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+	 * As part of the TEST above, RET is the ModRM byte, and INT3 the imm8.
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+	 *
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+	 * We subsequently jump backwards and architecturally execute the RET.
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+	 * This creates a correct BTB prediction (type=ret), but in the
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+	 * meantime we suffer Straight Line Speculation (because the type was
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+	 * no branch) which is halted by the INT3.
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+	 *
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+	 * With SMT enabled and STIBP active, a sibling thread cannot poison
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+	 * RET's prediction to a type of its choice, but can evict the
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+	 * prediction due to competitive sharing. If the prediction is
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+	 * evicted, __x86_return_thunk will suffer Straight Line Speculation
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+	 * which will be contained safely by the INT3.
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+	 */
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+SYM_INNER_LABEL(__x86_return_thunk, SYM_L_GLOBAL)
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+	ret
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+	int3
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+SYM_CODE_END(__x86_return_thunk)
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+
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+	/*
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+	 * Ensure the TEST decoding / BTB invalidation is complete.
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+	 */
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+	lfence
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+
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+	/*
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+	 * Jump back and execute the RET in the middle of the TEST instruction.
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+	 * INT3 is for SLS protection.
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+	 */
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+	jmp __x86_return_thunk
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+	int3
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+SYM_FUNC_END(zen_untrain_ret)
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+__EXPORT_THUNK(zen_untrain_ret)
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+
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+EXPORT_SYMBOL(__x86_return_thunk)
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+
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+#endif /* CONFIG_RETHUNK */