kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/x86/include/asm/fpu/api.h
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@@ -28,7 +28,6 @@
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 extern void kernel_fpu_end(void);
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 extern bool irq_fpu_usable(void);
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 extern void fpregs_mark_activate(void);
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-extern void kernel_fpu_resched(void);
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 /* Code that is unaware of kernel_fpu_begin_mask() can use this */
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 static inline void kernel_fpu_begin(void)
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@@ -41,32 +40,17 @@
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  * A context switch will (and softirq might) save CPU's FPU registers to
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  * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in
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  * a random state.
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- *
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- * local_bh_disable() protects against both preemption and soft interrupts
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- * on !RT kernels.
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- *
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- * On RT kernels local_bh_disable() is not sufficient because it only
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- * serializes soft interrupt related sections via a local lock, but stays
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- * preemptible. Disabling preemption is the right choice here as bottom
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- * half processing is always in thread context on RT kernels so it
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- * implicitly prevents bottom half processing as well.
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- *
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- * Disabling preemption also serializes against kernel_fpu_begin().
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  */
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 static inline void fpregs_lock(void)
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 {
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-	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
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-		local_bh_disable();
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-	else
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-		preempt_disable();
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+	preempt_disable();
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+	local_bh_disable();
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 }
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 static inline void fpregs_unlock(void)
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 {
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-	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
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-		local_bh_enable();
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-	else
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-		preempt_enable();
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+	local_bh_enable();
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+	preempt_enable();
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 }
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 #ifdef CONFIG_X86_DEBUG_FPU