kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/riscv/include/asm/cacheflush.h
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@@ -1,24 +1,12 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright (C) 2015 Regents of the University of California
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- *
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- *   This program is free software; you can redistribute it and/or
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- *   modify it under the terms of the GNU General Public License
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- *   as published by the Free Software Foundation, version 2.
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- *
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- *   This program is distributed in the hope that it will be useful,
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- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
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- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- *   GNU General Public License for more details.
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  */
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 #ifndef _ASM_RISCV_CACHEFLUSH_H
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 #define _ASM_RISCV_CACHEFLUSH_H
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-#include <asm-generic/cacheflush.h>
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-
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-#undef flush_icache_range
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-#undef flush_icache_user_range
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-#undef flush_dcache_page
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+#include <linux/mm.h>
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 static inline void local_flush_icache_all(void)
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 {
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@@ -32,13 +20,15 @@
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 	if (test_bit(PG_dcache_clean, &page->flags))
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 		clear_bit(PG_dcache_clean, &page->flags);
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 }
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+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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 /*
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  * RISC-V doesn't have an instruction to flush parts of the instruction cache,
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  * so instead we just flush the whole thing.
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  */
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 #define flush_icache_range(start, end) flush_icache_all()
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-#define flush_icache_user_range(vma, pg, addr, len) flush_icache_all()
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+#define flush_icache_user_page(vma, pg, addr, len) \
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+	flush_icache_mm(vma->vm_mm, 0)
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 #ifndef CONFIG_SMP
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@@ -47,7 +37,7 @@
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 #else /* CONFIG_SMP */
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-#define flush_icache_all() sbi_remote_fence_i(NULL)
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+void flush_icache_all(void);
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 void flush_icache_mm(struct mm_struct *mm, bool local);
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 #endif /* CONFIG_SMP */
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@@ -58,4 +48,6 @@
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 #define SYS_RISCV_FLUSH_ICACHE_LOCAL 1UL
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 #define SYS_RISCV_FLUSH_ICACHE_ALL   (SYS_RISCV_FLUSH_ICACHE_LOCAL)
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+#include <asm-generic/cacheflush.h>
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+
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 #endif /* _ASM_RISCV_CACHEFLUSH_H */