kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/powerpc/include/asm/book3s/64/tlbflush.h
..
..
@@ -147,19 +147,12 @@
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 		flush_tlb_page(vma, address);
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 }
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-/*
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- * flush the page walk cache for the address
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- */
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-static inline void flush_tlb_pgtable(struct mmu_gather *tlb, unsigned long address)
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-{
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-	/*
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-	 * Flush the page table walk cache on freeing a page table. We already
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-	 * have marked the upper/higher level page table entry none by now.
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-	 * So it is safe to flush PWC here.
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-	 */
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-	if (!radix_enabled())
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-		return;
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+extern bool tlbie_capable;
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+extern bool tlbie_enabled;
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-	radix__flush_tlb_pwc(tlb, address);
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+static inline bool cputlb_use_tlbie(void)
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+{
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+	return tlbie_enabled;
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 }
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+
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 #endif /*  _ASM_POWERPC_BOOK3S_64_TLBFLUSH_H */