kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/openrisc/kernel/smp.c
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@@ -14,6 +14,7 @@
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 #include <linux/smp.h>
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 #include <linux/cpu.h>
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 #include <linux/sched.h>
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+#include <linux/sched/mm.h>
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 #include <linux/irq.h>
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 #include <asm/cpuinfo.h>
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 #include <asm/mmu_context.h>
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@@ -113,7 +114,7 @@
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 	 * All kernel threads share the same mm context; grab a
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 	 * reference and switch to it.
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 	 */
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-	atomic_inc(&mm->mm_count);
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+	mmgrab(mm);
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 	current->active_mm = mm;
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 	cpumask_set_cpu(cpu, mm_cpumask(mm));
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..
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@@ -133,8 +134,6 @@
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 	set_cpu_online(cpu, true);
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 	local_irq_enable();
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-
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-	preempt_disable();
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 	/*
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 	 * OK, it's off to the idle thread for us
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 	 */
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@@ -218,30 +217,101 @@
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 	local_flush_tlb_all();
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 }
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+static inline void ipi_flush_tlb_mm(void *info)
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+{
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+	struct mm_struct *mm = (struct mm_struct *)info;
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+
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+	local_flush_tlb_mm(mm);
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+}
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+
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+static void smp_flush_tlb_mm(struct cpumask *cmask, struct mm_struct *mm)
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+{
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+	unsigned int cpuid;
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+
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+	if (cpumask_empty(cmask))
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+		return;
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+
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+	cpuid = get_cpu();
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+
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+	if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) {
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+		/* local cpu is the only cpu present in cpumask */
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+		local_flush_tlb_mm(mm);
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+	} else {
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+		on_each_cpu_mask(cmask, ipi_flush_tlb_mm, mm, 1);
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+	}
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+	put_cpu();
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+}
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+
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+struct flush_tlb_data {
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+	unsigned long addr1;
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+	unsigned long addr2;
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+};
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+
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+static inline void ipi_flush_tlb_page(void *info)
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+{
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+	struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
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+
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+	local_flush_tlb_page(NULL, fd->addr1);
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+}
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+
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+static inline void ipi_flush_tlb_range(void *info)
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+{
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+	struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
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+
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+	local_flush_tlb_range(NULL, fd->addr1, fd->addr2);
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+}
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+
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+static void smp_flush_tlb_range(const struct cpumask *cmask, unsigned long start,
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+				unsigned long end)
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+{
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+	unsigned int cpuid;
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+
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+	if (cpumask_empty(cmask))
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+		return;
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+
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+	cpuid = get_cpu();
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+
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+	if (cpumask_any_but(cmask, cpuid) >= nr_cpu_ids) {
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+		/* local cpu is the only cpu present in cpumask */
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+		if ((end - start) <= PAGE_SIZE)
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+			local_flush_tlb_page(NULL, start);
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+		else
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+			local_flush_tlb_range(NULL, start, end);
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+	} else {
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+		struct flush_tlb_data fd;
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+
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+		fd.addr1 = start;
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+		fd.addr2 = end;
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+
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+		if ((end - start) <= PAGE_SIZE)
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+			on_each_cpu_mask(cmask, ipi_flush_tlb_page, &fd, 1);
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+		else
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+			on_each_cpu_mask(cmask, ipi_flush_tlb_range, &fd, 1);
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+	}
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+	put_cpu();
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+}
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+
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 void flush_tlb_all(void)
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 {
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 	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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 }
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-/*
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- * FIXME: implement proper functionality instead of flush_tlb_all.
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- * *But*, as things currently stands, the local_tlb_flush_* functions will
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- * all boil down to local_tlb_flush_all anyway.
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- */
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 void flush_tlb_mm(struct mm_struct *mm)
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 {
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-	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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+	smp_flush_tlb_mm(mm_cpumask(mm), mm);
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 }
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 void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
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 {
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-	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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+	smp_flush_tlb_range(mm_cpumask(vma->vm_mm), uaddr, uaddr + PAGE_SIZE);
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 }
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 void flush_tlb_range(struct vm_area_struct *vma,
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 		     unsigned long start, unsigned long end)
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 {
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-	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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+	const struct cpumask *cmask = vma ? mm_cpumask(vma->vm_mm)
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+					  : cpu_online_mask;
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+	smp_flush_tlb_range(cmask, start, end);
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 }
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 /* Instruction cache invalidate - performed on each cpu */