kernel/arch/openrisc/boot/dts/simple_smp.dts
.. .. @@ -60,4 +60,10 @@ 60 60 clock-frequency = <20000000>; 61 61 }; 62 62 63 + enet0: ethoc@92000000 {64 + compatible = "opencores,ethoc";65 + reg = <0x92000000 0x800>;66 + interrupts = <4>;67 + big-endian;68 + };63 69 };