kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/mips/ath25/ar5312.c
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@@ -19,6 +19,7 @@
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 #include <linux/bitops.h>
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 #include <linux/irqdomain.h>
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 #include <linux/interrupt.h>
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+#include <linux/memblock.h>
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 #include <linux/platform_device.h>
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 #include <linux/mtd/physmap.h>
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 #include <linux/reboot.h>
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@@ -67,11 +68,6 @@
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 	machine_restart("AHB error"); /* Catastrophic failure */
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 	return IRQ_HANDLED;
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 }
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-
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-static struct irqaction ar5312_ahb_err_interrupt  = {
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-	.handler = ar5312_ahb_err_handler,
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-	.name    = "ar5312-ahb-error",
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-};
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 static void ar5312_misc_irq_handler(struct irq_desc *desc)
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 {
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@@ -154,7 +150,9 @@
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 		panic("Failed to add IRQ domain");
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 	irq = irq_create_mapping(domain, AR5312_MISC_IRQ_AHB_PROC);
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-	setup_irq(irq, &ar5312_ahb_err_interrupt);
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+	if (request_irq(irq, ar5312_ahb_err_handler, 0, "ar5312-ahb-error",
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+			NULL))
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+		pr_err("Failed to register ar5312-ahb-error interrupt\n");
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 	irq_set_chained_handler_and_data(AR5312_IRQ_MISC,
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 					 ar5312_misc_irq_handler, domain);
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@@ -185,7 +183,7 @@
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 	void __iomem *flashctl_base;
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 	u32 ctl;
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-	flashctl_base = ioremap_nocache(AR5312_FLASHCTL_BASE,
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+	flashctl_base = ioremap(AR5312_FLASHCTL_BASE,
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 					AR5312_FLASHCTL_SIZE);
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 	ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0);
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@@ -358,7 +356,7 @@
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 	u32 devid;
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 	/* Detect memory size */
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-	sdram_base = ioremap_nocache(AR5312_SDRAMCTL_BASE,
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+	sdram_base = ioremap(AR5312_SDRAMCTL_BASE,
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 				     AR5312_SDRAMCTL_SIZE);
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 	memcfg = __raw_readl(sdram_base + AR5312_MEM_CFG1);
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 	bank0_ac = ATH25_REG_MS(memcfg, AR5312_MEM_CFG1_AC0);
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@@ -366,10 +364,10 @@
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 	memsize = (bank0_ac ? (1 << (bank0_ac + 1)) : 0) +
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 		  (bank1_ac ? (1 << (bank1_ac + 1)) : 0);
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 	memsize <<= 20;
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-	add_memory_region(0, memsize, BOOT_MEM_RAM);
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+	memblock_add(0, memsize);
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 	iounmap(sdram_base);
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-	ar5312_rst_base = ioremap_nocache(AR5312_RST_BASE, AR5312_RST_SIZE);
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+	ar5312_rst_base = ioremap(AR5312_RST_BASE, AR5312_RST_SIZE);
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 	devid = ar5312_rst_reg_read(AR5312_REV);
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 	devid >>= AR5312_REV_WMAC_MIN_S;