kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/m68k/kernel/dma.c
..
..
@@ -6,7 +6,7 @@
6
6
 
7
7
 #undef DEBUG
8
8
 
9
-#include <linux/dma-noncoherent.h>
9
+#include <linux/dma-map-ops.h>
10
10
 #include <linux/device.h>
11
11
 #include <linux/kernel.h>
12
12
 #include <linux/platform_device.h>
..
..
@@ -15,60 +15,24 @@
15
15
 #include <linux/vmalloc.h>
16
16
 #include <linux/export.h>
17
17
 
18
-#include <asm/pgalloc.h>
18
+#include <asm/cacheflush.h>
19
19
 
20
20
 #if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
21
-
22
-void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
23
-		gfp_t flag, unsigned long attrs)
21
+void arch_dma_prep_coherent(struct page *page, size_t size)
24
22
 {
25
-	struct page *page, **map;
26
-	pgprot_t pgprot;
27
-	void *addr;
28
-	int i, order;
23
+	cache_push(page_to_phys(page), size);
24
+}
29
25
 
30
-	pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
31
-
32
-	size = PAGE_ALIGN(size);
33
-	order = get_order(size);
34
-
35
-	page = alloc_pages(flag, order);
36
-	if (!page)
37
-		return NULL;
38
-
39
-	*handle = page_to_phys(page);
40
-	map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
41
-	if (!map) {
42
-		__free_pages(page, order);
43
-		return NULL;
26
+pgprot_t pgprot_dmacoherent(pgprot_t prot)
27
+{
28
+	if (CPU_IS_040_OR_060) {
29
+		pgprot_val(prot) &= ~_PAGE_CACHE040;
30
+		pgprot_val(prot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
31
+	} else {
32
+		pgprot_val(prot) |= _PAGE_NOCACHE030;
44
33
 	}
45
-	split_page(page, order);
46
-
47
-	order = 1 << order;
48
-	size >>= PAGE_SHIFT;
49
-	map[0] = page;
50
-	for (i = 1; i < size; i++)
51
-		map[i] = page + i;
52
-	for (; i < order; i++)
53
-		__free_page(page + i);
54
-	pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
55
-	if (CPU_IS_040_OR_060)
56
-		pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
57
-	else
58
-		pgprot_val(pgprot) |= _PAGE_NOCACHE030;
59
-	addr = vmap(map, size, VM_MAP, pgprot);
60
-	kfree(map);
61
-
62
-	return addr;
34
+	return prot;
63
35
 }
64
-
65
-void arch_dma_free(struct device *dev, size_t size, void *addr,
66
-		dma_addr_t handle, unsigned long attrs)
67
-{
68
-	pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
69
-	vfree(addr);
70
-}
71
-
72
36
 #else
73
37
 
74
38
 #include <asm/cacheflush.h>
..
..
@@ -97,8 +61,8 @@
97
61
 
98
62
 #endif /* CONFIG_MMU && !CONFIG_COLDFIRE */
99
63
 
100
-void arch_sync_dma_for_device(struct device *dev, phys_addr_t handle,
101
-		size_t size, enum dma_data_direction dir)
64
+void arch_sync_dma_for_device(phys_addr_t handle, size_t size,
65
+		enum dma_data_direction dir)
102
66
 {
103
67
 	switch (dir) {
104
68
 	case DMA_BIDIRECTIONAL:
..
..
@@ -112,14 +76,5 @@
112
76
 		pr_err_ratelimited("dma_sync_single_for_device: unsupported dir %u\n",
113
77
 				   dir);
114
78
 		break;
115
-	}
116
-}
117
-
118
-void arch_setup_pdev_archdata(struct platform_device *pdev)
119
-{
120
-	if (pdev->dev.coherent_dma_mask == DMA_MASK_NONE &&
121
-	    pdev->dev.dma_mask == NULL) {
122
-		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
123
-		pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
124
79
 	}
125
80
 }