kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
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@@ -2,7 +2,7 @@
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 /*
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  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
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  *
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- * (C) Copyright 2015 - 2018, Xilinx, Inc.
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+ * (C) Copyright 2015 - 2019, Xilinx, Inc.
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  *
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  * Michal Simek <michal.simek@xilinx.com>
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  */
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@@ -10,7 +10,7 @@
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 /dts-v1/;
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 #include "zynqmp.dtsi"
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-#include "zynqmp-clk.dtsi"
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+#include "zynqmp-clk-ccf.dtsi"
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 #include <dt-bindings/gpio/gpio.h>
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 / {
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@@ -84,11 +84,12 @@
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 	status = "okay";
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 	phy-handle = <&phy0>;
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 	phy-mode = "rgmii-id";
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-	phy0: phy@5 {
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+	phy0: ethernet-phy@5 {
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 		reg = <5>;
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 		ti,rx-internal-delay = <0x8>;
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 		ti,tx-internal-delay = <0xa>;
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 		ti,fifo-depth = <0x1>;
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+		ti,dp83867-rxctrl-strap-quirk;
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 	};
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 };
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@@ -122,7 +123,7 @@
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 	status = "okay";
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 	num-cs = <1>;
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-	spi0_flash0: flash0@0 {
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+	spi0_flash0: flash@0 {
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 		#address-cells = <1>;
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 		#size-cells = <1>;
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 		compatible = "sst,sst25wf080", "jedec,spi-nor";
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@@ -140,7 +141,7 @@
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 	status = "okay";
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 	num-cs = <1>;
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-	spi1_flash0: flash0@0 {
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+	spi1_flash0: flash@0 {
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 		#address-cells = <1>;
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 		#size-cells = <1>;
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 		compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
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@@ -157,6 +158,7 @@
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 /* ULPI SMSC USB3320 */
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 &usb1 {
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 	status = "okay";
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+	dr_mode = "host";
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 };
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 &uart0 {