kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/arm64/boot/dts/sprd/whale2.dtsi
..
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@@ -75,7 +75,9 @@
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 					     "sprd,sc9836-uart";
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 				reg = <0x0 0x100>;
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 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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-				clocks = <&ext_26m>;
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+				clock-names = "enable", "uart", "source";
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+				clocks = <&apapb_gate CLK_UART0_EB>,
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+				       <&ap_clk CLK_UART0>, <&ext_26m>;
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 				status = "disabled";
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 			};
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..
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@@ -84,7 +86,9 @@
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 					     "sprd,sc9836-uart";
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 				reg = <0x100000 0x100>;
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 				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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-				clocks = <&ext_26m>;
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+				clock-names = "enable", "uart", "source";
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+				clocks = <&apapb_gate CLK_UART1_EB>,
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+				       <&ap_clk CLK_UART1>, <&ext_26m>;
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 				status = "disabled";
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 			};
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..
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@@ -93,7 +97,9 @@
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 					     "sprd,sc9836-uart";
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 				reg = <0x200000 0x100>;
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 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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-				clocks = <&ext_26m>;
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+				clock-names = "enable", "uart", "source";
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+				clocks = <&apapb_gate CLK_UART2_EB>,
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+				       <&ap_clk CLK_UART2>, <&ext_26m>;
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 				status = "disabled";
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 			};
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..
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@@ -102,7 +108,9 @@
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 					     "sprd,sc9836-uart";
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 				reg = <0x300000 0x100>;
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 				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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-				clocks = <&ext_26m>;
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+				clock-names = "enable", "uart", "source";
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+				clocks = <&apapb_gate CLK_UART3_EB>,
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+				       <&ap_clk CLK_UART3>, <&ext_26m>;
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 				status = "disabled";
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 			};
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 		};
..
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@@ -121,6 +129,34 @@
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 				#dma-channels = <32>;
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 				clock-names = "enable";
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 				clocks = <&apahb_gate CLK_DMA_EB>;
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+			};
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+
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+			sdio3: sdio@50430000 {
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+				compatible  = "sprd,sdhci-r11";
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+				reg = <0 0x50430000 0 0x1000>;
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+				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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+
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+				clock-names = "sdio", "enable", "2x_enable";
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+				clocks = <&aon_prediv CLK_EMMC_2X>,
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+				       <&apahb_gate CLK_EMMC_EB>,
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+				       <&aon_gate CLK_EMMC_2X_EN>;
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+				assigned-clocks = <&aon_prediv CLK_EMMC_2X>;
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+				assigned-clock-parents = <&clk_l0_409m6>;
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+
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+				sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
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+				sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
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+				sprd,phy-delay-mmc-ddr52 = <0x3f 0x75 0x14 0x14>;
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+				sprd,phy-delay-mmc-hs400es = <0x3f 0x3f 0x2e 0x2e>;
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+				vmmc-supply = <&vddemmccore>;
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+				bus-width = <8>;
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+				non-removable;
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+				no-sdio;
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+				no-sd;
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+				cap-mmc-hw-reset;
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+				mmc-hs400-enhanced-strobe;
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+				mmc-hs400-1_8v;
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+				mmc-hs200-1_8v;
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+				mmc-ddr-1_8v;
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 			};
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 		};
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..
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@@ -264,4 +300,11 @@
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 		clock-frequency = <100000000>;
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 		clock-output-names = "ext-rco-100m";
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 	};
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+
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+	clk_l0_409m6: clk_l0_409m6 {
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+		compatible = "fixed-clock";
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+		#clock-cells = <0>;
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+		clock-frequency = <409600000>;
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+		clock-output-names = "ext-409m6";
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+	};
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 };