| .. | .. |
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| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | 2 | /* |
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| 3 | | - * Device Tree Source for the r8a77995 SoC |
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| 3 | + * Device Tree Source for the R-Car D3 (R8A77995) SoC |
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| 4 | 4 | * |
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| 5 | 5 | * Copyright (C) 2016 Renesas Electronics Corp. |
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| 6 | 6 | * Copyright (C) 2017 Glider bvba |
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| .. | .. |
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| 27 | 27 | #size-cells = <0>; |
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| 28 | 28 | |
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| 29 | 29 | a53_0: cpu@0 { |
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| 30 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 30 | + compatible = "arm,cortex-a53"; |
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| 31 | 31 | reg = <0x0>; |
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| 32 | 32 | device_type = "cpu"; |
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| 33 | 33 | power-domains = <&sysc R8A77995_PD_CA53_CPU0>; |
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| .. | .. |
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| 188 | 188 | resets = <&cpg 906>; |
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| 189 | 189 | }; |
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| 190 | 190 | |
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| 191 | | - pfc: pin-controller@e6060000 { |
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| 191 | + pfc: pinctrl@e6060000 { |
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| 192 | 192 | compatible = "renesas,pfc-r8a77995"; |
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| 193 | 193 | reg = <0 0xe6060000 0 0x508>; |
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| 194 | 194 | }; |
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| .. | .. |
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| 231 | 231 | #interrupt-cells = <2>; |
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| 232 | 232 | interrupt-controller; |
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| 233 | 233 | reg = <0 0xe61c0000 0 0x200>; |
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| 234 | | - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH |
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| 235 | | - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH |
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| 236 | | - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH |
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| 237 | | - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH |
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| 238 | | - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH |
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| 239 | | - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; |
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| 234 | + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
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| 235 | + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
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| 236 | + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
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| 237 | + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, |
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| 238 | + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, |
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| 239 | + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; |
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| 240 | 240 | clocks = <&cpg CPG_MOD 407>; |
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| 241 | 241 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 242 | 242 | resets = <&cpg 407>; |
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| 243 | | - }; |
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| 244 | | - |
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| 245 | | - hscif0: serial@e6540000 { |
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| 246 | | - compatible = "renesas,hscif-r8a77995", |
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| 247 | | - "renesas,rcar-gen3-hscif", |
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| 248 | | - "renesas,hscif"; |
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| 249 | | - reg = <0 0xe6540000 0 0x60>; |
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| 250 | | - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
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| 251 | | - clocks = <&cpg CPG_MOD 520>, |
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| 252 | | - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, |
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| 253 | | - <&scif_clk>; |
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| 254 | | - clock-names = "fck", "brg_int", "scif_clk"; |
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| 255 | | - dmas = <&dmac1 0x31>, <&dmac1 0x30>, |
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| 256 | | - <&dmac2 0x31>, <&dmac2 0x30>; |
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| 257 | | - dma-names = "tx", "rx", "tx", "rx"; |
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| 258 | | - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 259 | | - resets = <&cpg 520>; |
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| 260 | | - status = "disabled"; |
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| 261 | | - }; |
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| 262 | | - |
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| 263 | | - hscif3: serial@e66a0000 { |
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| 264 | | - compatible = "renesas,hscif-r8a77995", |
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| 265 | | - "renesas,rcar-gen3-hscif", |
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| 266 | | - "renesas,hscif"; |
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| 267 | | - reg = <0 0xe66a0000 0 0x60>; |
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| 268 | | - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
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| 269 | | - clocks = <&cpg CPG_MOD 517>, |
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| 270 | | - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, |
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| 271 | | - <&scif_clk>; |
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| 272 | | - clock-names = "fck", "brg_int", "scif_clk"; |
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| 273 | | - dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
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| 274 | | - dma-names = "tx", "rx"; |
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| 275 | | - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 276 | | - resets = <&cpg 517>; |
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| 277 | | - status = "disabled"; |
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| 278 | 243 | }; |
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| 279 | 244 | |
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| 280 | 245 | i2c0: i2c@e6500000 { |
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| .. | .. |
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| 344 | 309 | status = "disabled"; |
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| 345 | 310 | }; |
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| 346 | 311 | |
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| 312 | + hscif0: serial@e6540000 { |
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| 313 | + compatible = "renesas,hscif-r8a77995", |
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| 314 | + "renesas,rcar-gen3-hscif", |
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| 315 | + "renesas,hscif"; |
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| 316 | + reg = <0 0xe6540000 0 0x60>; |
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| 317 | + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
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| 318 | + clocks = <&cpg CPG_MOD 520>, |
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| 319 | + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, |
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| 320 | + <&scif_clk>; |
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| 321 | + clock-names = "fck", "brg_int", "scif_clk"; |
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| 322 | + dmas = <&dmac1 0x31>, <&dmac1 0x30>, |
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| 323 | + <&dmac2 0x31>, <&dmac2 0x30>; |
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| 324 | + dma-names = "tx", "rx", "tx", "rx"; |
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| 325 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 326 | + resets = <&cpg 520>; |
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| 327 | + status = "disabled"; |
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| 328 | + }; |
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| 329 | + |
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| 330 | + hscif3: serial@e66a0000 { |
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| 331 | + compatible = "renesas,hscif-r8a77995", |
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| 332 | + "renesas,rcar-gen3-hscif", |
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| 333 | + "renesas,hscif"; |
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| 334 | + reg = <0 0xe66a0000 0 0x60>; |
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| 335 | + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
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| 336 | + clocks = <&cpg CPG_MOD 517>, |
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| 337 | + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, |
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| 338 | + <&scif_clk>; |
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| 339 | + clock-names = "fck", "brg_int", "scif_clk"; |
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| 340 | + dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
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| 341 | + dma-names = "tx", "rx"; |
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| 342 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 343 | + resets = <&cpg 517>; |
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| 344 | + status = "disabled"; |
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| 345 | + }; |
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| 346 | + |
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| 347 | + hsusb: usb@e6590000 { |
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| 348 | + compatible = "renesas,usbhs-r8a77995", |
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| 349 | + "renesas,rcar-gen3-usbhs"; |
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| 350 | + reg = <0 0xe6590000 0 0x200>; |
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| 351 | + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
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| 352 | + clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; |
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| 353 | + dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
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| 354 | + <&usb_dmac1 0>, <&usb_dmac1 1>; |
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| 355 | + dma-names = "ch0", "ch1", "ch2", "ch3"; |
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| 356 | + renesas,buswait = <11>; |
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| 357 | + phys = <&usb2_phy0 3>; |
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| 358 | + phy-names = "usb"; |
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| 359 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 360 | + resets = <&cpg 704>, <&cpg 703>; |
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| 361 | + status = "disabled"; |
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| 362 | + }; |
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| 363 | + |
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| 364 | + usb_dmac0: dma-controller@e65a0000 { |
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| 365 | + compatible = "renesas,r8a77995-usb-dmac", |
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| 366 | + "renesas,usb-dmac"; |
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| 367 | + reg = <0 0xe65a0000 0 0x100>; |
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| 368 | + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
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| 369 | + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |
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| 370 | + interrupt-names = "ch0", "ch1"; |
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| 371 | + clocks = <&cpg CPG_MOD 330>; |
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| 372 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 373 | + resets = <&cpg 330>; |
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| 374 | + #dma-cells = <1>; |
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| 375 | + dma-channels = <2>; |
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| 376 | + }; |
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| 377 | + |
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| 378 | + usb_dmac1: dma-controller@e65b0000 { |
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| 379 | + compatible = "renesas,r8a77995-usb-dmac", |
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| 380 | + "renesas,usb-dmac"; |
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| 381 | + reg = <0 0xe65b0000 0 0x100>; |
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| 382 | + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
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| 383 | + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; |
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| 384 | + interrupt-names = "ch0", "ch1"; |
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| 385 | + clocks = <&cpg CPG_MOD 331>; |
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| 386 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 387 | + resets = <&cpg 331>; |
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| 388 | + #dma-cells = <1>; |
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| 389 | + dma-channels = <2>; |
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| 390 | + }; |
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| 391 | + |
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| 392 | + arm_cc630p: crypto@e6601000 { |
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| 393 | + compatible = "arm,cryptocell-630p-ree"; |
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| 394 | + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; |
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| 395 | + reg = <0x0 0xe6601000 0 0x1000>; |
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| 396 | + clocks = <&cpg CPG_MOD 229>; |
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| 397 | + resets = <&cpg 229>; |
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| 398 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
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| 399 | + }; |
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| 400 | + |
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| 347 | 401 | canfd: can@e66c0000 { |
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| 348 | 402 | compatible = "renesas,r8a77995-canfd", |
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| 349 | 403 | "renesas,rcar-gen3-canfd"; |
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| .. | .. |
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| 373 | 427 | compatible = "renesas,dmac-r8a77995", |
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| 374 | 428 | "renesas,rcar-dmac"; |
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| 375 | 429 | reg = <0 0xe6700000 0 0x10000>; |
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| 376 | | - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH |
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| 377 | | - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH |
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| 378 | | - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH |
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| 379 | | - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH |
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| 380 | | - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH |
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| 381 | | - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH |
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| 382 | | - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH |
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| 383 | | - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH |
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| 384 | | - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; |
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| 430 | + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, |
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| 431 | + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, |
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| 432 | + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, |
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| 433 | + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, |
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| 434 | + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, |
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| 435 | + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, |
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| 436 | + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, |
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| 437 | + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, |
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| 438 | + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; |
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| 385 | 439 | interrupt-names = "error", |
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| 386 | 440 | "ch0", "ch1", "ch2", "ch3", |
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| 387 | 441 | "ch4", "ch5", "ch6", "ch7"; |
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| .. | .. |
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| 391 | 445 | resets = <&cpg 219>; |
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| 392 | 446 | #dma-cells = <1>; |
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| 393 | 447 | dma-channels = <8>; |
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| 448 | + iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, |
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| 449 | + <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, |
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| 450 | + <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, |
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| 451 | + <&ipmmu_ds0 6>, <&ipmmu_ds0 7>; |
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| 394 | 452 | }; |
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| 395 | 453 | |
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| 396 | 454 | dmac1: dma-controller@e7300000 { |
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| 397 | 455 | compatible = "renesas,dmac-r8a77995", |
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| 398 | 456 | "renesas,rcar-dmac"; |
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| 399 | 457 | reg = <0 0xe7300000 0 0x10000>; |
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| 400 | | - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
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| 401 | | - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH |
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| 402 | | - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH |
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| 403 | | - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH |
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| 404 | | - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH |
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| 405 | | - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH |
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| 406 | | - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH |
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| 407 | | - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH |
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| 408 | | - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; |
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| 458 | + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, |
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| 459 | + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, |
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| 460 | + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, |
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| 461 | + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, |
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| 462 | + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, |
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| 463 | + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, |
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| 464 | + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, |
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| 465 | + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, |
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| 466 | + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; |
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| 409 | 467 | interrupt-names = "error", |
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| 410 | 468 | "ch0", "ch1", "ch2", "ch3", |
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| 411 | 469 | "ch4", "ch5", "ch6", "ch7"; |
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| .. | .. |
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| 415 | 473 | resets = <&cpg 218>; |
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| 416 | 474 | #dma-cells = <1>; |
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| 417 | 475 | dma-channels = <8>; |
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| 476 | + iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, |
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| 477 | + <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, |
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| 478 | + <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, |
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| 479 | + <&ipmmu_ds1 6>, <&ipmmu_ds1 7>; |
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| 418 | 480 | }; |
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| 419 | 481 | |
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| 420 | 482 | dmac2: dma-controller@e7310000 { |
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| 421 | 483 | compatible = "renesas,dmac-r8a77995", |
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| 422 | 484 | "renesas,rcar-dmac"; |
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| 423 | 485 | reg = <0 0xe7310000 0 0x10000>; |
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| 424 | | - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH |
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| 425 | | - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH |
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| 426 | | - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH |
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| 427 | | - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH |
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| 428 | | - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH |
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| 429 | | - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH |
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| 430 | | - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH |
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| 431 | | - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH |
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| 432 | | - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; |
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| 486 | + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, |
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| 487 | + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, |
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| 488 | + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, |
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| 489 | + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, |
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| 490 | + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, |
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| 491 | + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, |
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| 492 | + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, |
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| 493 | + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, |
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| 494 | + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; |
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| 433 | 495 | interrupt-names = "error", |
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| 434 | 496 | "ch0", "ch1", "ch2", "ch3", |
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| 435 | 497 | "ch4", "ch5", "ch6", "ch7"; |
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| .. | .. |
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| 439 | 501 | resets = <&cpg 217>; |
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| 440 | 502 | #dma-cells = <1>; |
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| 441 | 503 | dma-channels = <8>; |
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| 504 | + iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, |
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| 505 | + <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, |
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| 506 | + <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, |
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| 507 | + <&ipmmu_ds1 22>, <&ipmmu_ds1 23>; |
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| 442 | 508 | }; |
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| 443 | 509 | |
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| 444 | | - ipmmu_ds0: mmu@e6740000 { |
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| 510 | + ipmmu_ds0: iommu@e6740000 { |
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| 445 | 511 | compatible = "renesas,ipmmu-r8a77995"; |
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| 446 | 512 | reg = <0 0xe6740000 0 0x1000>; |
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| 447 | 513 | renesas,ipmmu-main = <&ipmmu_mm 0>; |
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| .. | .. |
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| 449 | 515 | #iommu-cells = <1>; |
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| 450 | 516 | }; |
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| 451 | 517 | |
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| 452 | | - ipmmu_ds1: mmu@e7740000 { |
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| 518 | + ipmmu_ds1: iommu@e7740000 { |
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| 453 | 519 | compatible = "renesas,ipmmu-r8a77995"; |
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| 454 | 520 | reg = <0 0xe7740000 0 0x1000>; |
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| 455 | 521 | renesas,ipmmu-main = <&ipmmu_mm 1>; |
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| .. | .. |
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| 457 | 523 | #iommu-cells = <1>; |
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| 458 | 524 | }; |
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| 459 | 525 | |
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| 460 | | - ipmmu_hc: mmu@e6570000 { |
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| 526 | + ipmmu_hc: iommu@e6570000 { |
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| 461 | 527 | compatible = "renesas,ipmmu-r8a77995"; |
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| 462 | 528 | reg = <0 0xe6570000 0 0x1000>; |
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| 463 | 529 | renesas,ipmmu-main = <&ipmmu_mm 2>; |
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| .. | .. |
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| 465 | 531 | #iommu-cells = <1>; |
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| 466 | 532 | }; |
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| 467 | 533 | |
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| 468 | | - ipmmu_mm: mmu@e67b0000 { |
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| 534 | + ipmmu_mm: iommu@e67b0000 { |
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| 469 | 535 | compatible = "renesas,ipmmu-r8a77995"; |
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| 470 | 536 | reg = <0 0xe67b0000 0 0x1000>; |
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| 471 | 537 | interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, |
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| .. | .. |
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| 474 | 540 | #iommu-cells = <1>; |
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| 475 | 541 | }; |
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| 476 | 542 | |
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| 477 | | - ipmmu_mp: mmu@ec670000 { |
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| 543 | + ipmmu_mp: iommu@ec670000 { |
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| 478 | 544 | compatible = "renesas,ipmmu-r8a77995"; |
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| 479 | 545 | reg = <0 0xec670000 0 0x1000>; |
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| 480 | 546 | renesas,ipmmu-main = <&ipmmu_mm 4>; |
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| .. | .. |
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| 482 | 548 | #iommu-cells = <1>; |
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| 483 | 549 | }; |
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| 484 | 550 | |
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| 485 | | - ipmmu_pv0: mmu@fd800000 { |
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| 551 | + ipmmu_pv0: iommu@fd800000 { |
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| 486 | 552 | compatible = "renesas,ipmmu-r8a77995"; |
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| 487 | 553 | reg = <0 0xfd800000 0 0x1000>; |
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| 488 | 554 | renesas,ipmmu-main = <&ipmmu_mm 6>; |
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| .. | .. |
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| 490 | 556 | #iommu-cells = <1>; |
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| 491 | 557 | }; |
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| 492 | 558 | |
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| 493 | | - ipmmu_rt: mmu@ffc80000 { |
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| 559 | + ipmmu_rt: iommu@ffc80000 { |
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| 494 | 560 | compatible = "renesas,ipmmu-r8a77995"; |
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| 495 | 561 | reg = <0 0xffc80000 0 0x1000>; |
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| 496 | 562 | renesas,ipmmu-main = <&ipmmu_mm 10>; |
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| .. | .. |
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| 498 | 564 | #iommu-cells = <1>; |
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| 499 | 565 | }; |
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| 500 | 566 | |
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| 501 | | - ipmmu_vc0: mmu@fe6b0000 { |
|---|
| 567 | + ipmmu_vc0: iommu@fe6b0000 { |
|---|
| 502 | 568 | compatible = "renesas,ipmmu-r8a77995"; |
|---|
| 503 | 569 | reg = <0 0xfe6b0000 0 0x1000>; |
|---|
| 504 | 570 | renesas,ipmmu-main = <&ipmmu_mm 12>; |
|---|
| .. | .. |
|---|
| 506 | 572 | #iommu-cells = <1>; |
|---|
| 507 | 573 | }; |
|---|
| 508 | 574 | |
|---|
| 509 | | - ipmmu_vi0: mmu@febd0000 { |
|---|
| 575 | + ipmmu_vi0: iommu@febd0000 { |
|---|
| 510 | 576 | compatible = "renesas,ipmmu-r8a77995"; |
|---|
| 511 | 577 | reg = <0 0xfebd0000 0 0x1000>; |
|---|
| 512 | 578 | renesas,ipmmu-main = <&ipmmu_mm 14>; |
|---|
| .. | .. |
|---|
| 514 | 580 | #iommu-cells = <1>; |
|---|
| 515 | 581 | }; |
|---|
| 516 | 582 | |
|---|
| 517 | | - ipmmu_vp0: mmu@fe990000 { |
|---|
| 583 | + ipmmu_vp0: iommu@fe990000 { |
|---|
| 518 | 584 | compatible = "renesas,ipmmu-r8a77995"; |
|---|
| 519 | 585 | reg = <0 0xfe990000 0 0x1000>; |
|---|
| 520 | 586 | renesas,ipmmu-main = <&ipmmu_mm 16>; |
|---|
| .. | .. |
|---|
| 817 | 883 | compatible = "generic-ohci"; |
|---|
| 818 | 884 | reg = <0 0xee080000 0 0x100>; |
|---|
| 819 | 885 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| 820 | | - clocks = <&cpg CPG_MOD 703>; |
|---|
| 821 | | - phys = <&usb2_phy0>; |
|---|
| 886 | + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
|---|
| 887 | + phys = <&usb2_phy0 1>; |
|---|
| 822 | 888 | phy-names = "usb"; |
|---|
| 823 | 889 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 824 | | - resets = <&cpg 703>; |
|---|
| 890 | + resets = <&cpg 703>, <&cpg 704>; |
|---|
| 825 | 891 | status = "disabled"; |
|---|
| 826 | 892 | }; |
|---|
| 827 | 893 | |
|---|
| .. | .. |
|---|
| 829 | 895 | compatible = "generic-ehci"; |
|---|
| 830 | 896 | reg = <0 0xee080100 0 0x100>; |
|---|
| 831 | 897 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| 832 | | - clocks = <&cpg CPG_MOD 703>; |
|---|
| 833 | | - phys = <&usb2_phy0>; |
|---|
| 898 | + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
|---|
| 899 | + phys = <&usb2_phy0 2>; |
|---|
| 834 | 900 | phy-names = "usb"; |
|---|
| 835 | 901 | companion = <&ohci0>; |
|---|
| 836 | 902 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 837 | | - resets = <&cpg 703>; |
|---|
| 903 | + resets = <&cpg 703>, <&cpg 704>; |
|---|
| 838 | 904 | status = "disabled"; |
|---|
| 839 | 905 | }; |
|---|
| 840 | 906 | |
|---|
| .. | .. |
|---|
| 843 | 909 | "renesas,rcar-gen3-usb2-phy"; |
|---|
| 844 | 910 | reg = <0 0xee080200 0 0x700>; |
|---|
| 845 | 911 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| 846 | | - clocks = <&cpg CPG_MOD 703>; |
|---|
| 912 | + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
|---|
| 847 | 913 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 848 | | - resets = <&cpg 703>; |
|---|
| 849 | | - #phy-cells = <0>; |
|---|
| 914 | + resets = <&cpg 703>, <&cpg 704>; |
|---|
| 915 | + #phy-cells = <1>; |
|---|
| 850 | 916 | status = "disabled"; |
|---|
| 851 | 917 | }; |
|---|
| 852 | 918 | |
|---|
| 853 | | - sdhi2: sd@ee140000 { |
|---|
| 919 | + sdhi2: mmc@ee140000 { |
|---|
| 854 | 920 | compatible = "renesas,sdhi-r8a77995", |
|---|
| 855 | 921 | "renesas,rcar-gen3-sdhi"; |
|---|
| 856 | 922 | reg = <0 0xee140000 0 0x2000>; |
|---|
| .. | .. |
|---|
| 859 | 925 | max-frequency = <200000000>; |
|---|
| 860 | 926 | power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 861 | 927 | resets = <&cpg 312>; |
|---|
| 928 | + iommus = <&ipmmu_ds1 34>; |
|---|
| 862 | 929 | status = "disabled"; |
|---|
| 863 | 930 | }; |
|---|
| 864 | 931 | |
|---|
| .. | .. |
|---|
| 936 | 1003 | iommus = <&ipmmu_vi0 9>; |
|---|
| 937 | 1004 | }; |
|---|
| 938 | 1005 | |
|---|
| 1006 | + cmm0: cmm@fea40000 { |
|---|
| 1007 | + compatible = "renesas,r8a77995-cmm", |
|---|
| 1008 | + "renesas,rcar-gen3-cmm"; |
|---|
| 1009 | + reg = <0 0xfea40000 0 0x1000>; |
|---|
| 1010 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 1011 | + clocks = <&cpg CPG_MOD 711>; |
|---|
| 1012 | + resets = <&cpg 711>; |
|---|
| 1013 | + }; |
|---|
| 1014 | + |
|---|
| 1015 | + cmm1: cmm@fea50000 { |
|---|
| 1016 | + compatible = "renesas,r8a77995-cmm", |
|---|
| 1017 | + "renesas,rcar-gen3-cmm"; |
|---|
| 1018 | + reg = <0 0xfea50000 0 0x1000>; |
|---|
| 1019 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 1020 | + clocks = <&cpg CPG_MOD 710>; |
|---|
| 1021 | + resets = <&cpg 710>; |
|---|
| 1022 | + }; |
|---|
| 1023 | + |
|---|
| 939 | 1024 | du: display@feb00000 { |
|---|
| 940 | 1025 | compatible = "renesas,du-r8a77995"; |
|---|
| 941 | 1026 | reg = <0 0xfeb00000 0 0x40000>; |
|---|
| 942 | 1027 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
|---|
| 943 | 1028 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; |
|---|
| 944 | | - clocks = <&cpg CPG_MOD 724>, |
|---|
| 945 | | - <&cpg CPG_MOD 723>; |
|---|
| 1029 | + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; |
|---|
| 946 | 1030 | clock-names = "du.0", "du.1"; |
|---|
| 947 | | - vsps = <&vspd0 0 &vspd1 0>; |
|---|
| 1031 | + resets = <&cpg 724>; |
|---|
| 1032 | + reset-names = "du.0"; |
|---|
| 1033 | + |
|---|
| 1034 | + renesas,cmms = <&cmm0>, <&cmm1>; |
|---|
| 1035 | + renesas,vsps = <&vspd0 0>, <&vspd1 0>; |
|---|
| 1036 | + |
|---|
| 948 | 1037 | status = "disabled"; |
|---|
| 949 | 1038 | |
|---|
| 950 | 1039 | ports { |
|---|
| .. | .. |
|---|
| 960 | 1049 | port@1 { |
|---|
| 961 | 1050 | reg = <1>; |
|---|
| 962 | 1051 | du_out_lvds0: endpoint { |
|---|
| 1052 | + remote-endpoint = <&lvds0_in>; |
|---|
| 963 | 1053 | }; |
|---|
| 964 | 1054 | }; |
|---|
| 965 | 1055 | |
|---|
| 966 | 1056 | port@2 { |
|---|
| 967 | 1057 | reg = <2>; |
|---|
| 968 | 1058 | du_out_lvds1: endpoint { |
|---|
| 1059 | + remote-endpoint = <&lvds1_in>; |
|---|
| 1060 | + }; |
|---|
| 1061 | + }; |
|---|
| 1062 | + }; |
|---|
| 1063 | + }; |
|---|
| 1064 | + |
|---|
| 1065 | + lvds0: lvds-encoder@feb90000 { |
|---|
| 1066 | + compatible = "renesas,r8a77995-lvds"; |
|---|
| 1067 | + reg = <0 0xfeb90000 0 0x20>; |
|---|
| 1068 | + clocks = <&cpg CPG_MOD 727>; |
|---|
| 1069 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 1070 | + resets = <&cpg 727>; |
|---|
| 1071 | + status = "disabled"; |
|---|
| 1072 | + |
|---|
| 1073 | + renesas,companion = <&lvds1>; |
|---|
| 1074 | + |
|---|
| 1075 | + ports { |
|---|
| 1076 | + #address-cells = <1>; |
|---|
| 1077 | + #size-cells = <0>; |
|---|
| 1078 | + |
|---|
| 1079 | + port@0 { |
|---|
| 1080 | + reg = <0>; |
|---|
| 1081 | + lvds0_in: endpoint { |
|---|
| 1082 | + remote-endpoint = <&du_out_lvds0>; |
|---|
| 1083 | + }; |
|---|
| 1084 | + }; |
|---|
| 1085 | + |
|---|
| 1086 | + port@1 { |
|---|
| 1087 | + reg = <1>; |
|---|
| 1088 | + lvds0_out: endpoint { |
|---|
| 1089 | + }; |
|---|
| 1090 | + }; |
|---|
| 1091 | + }; |
|---|
| 1092 | + }; |
|---|
| 1093 | + |
|---|
| 1094 | + lvds1: lvds-encoder@feb90100 { |
|---|
| 1095 | + compatible = "renesas,r8a77995-lvds"; |
|---|
| 1096 | + reg = <0 0xfeb90100 0 0x20>; |
|---|
| 1097 | + clocks = <&cpg CPG_MOD 727>; |
|---|
| 1098 | + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; |
|---|
| 1099 | + resets = <&cpg 726>; |
|---|
| 1100 | + status = "disabled"; |
|---|
| 1101 | + |
|---|
| 1102 | + ports { |
|---|
| 1103 | + #address-cells = <1>; |
|---|
| 1104 | + #size-cells = <0>; |
|---|
| 1105 | + |
|---|
| 1106 | + port@0 { |
|---|
| 1107 | + reg = <0>; |
|---|
| 1108 | + lvds1_in: endpoint { |
|---|
| 1109 | + remote-endpoint = <&du_out_lvds1>; |
|---|
| 1110 | + }; |
|---|
| 1111 | + }; |
|---|
| 1112 | + |
|---|
| 1113 | + port@1 { |
|---|
| 1114 | + reg = <1>; |
|---|
| 1115 | + lvds1_out: endpoint { |
|---|
| 969 | 1116 | }; |
|---|
| 970 | 1117 | }; |
|---|
| 971 | 1118 | }; |
|---|
| .. | .. |
|---|
| 983 | 1130 | polling-delay = <1000>; |
|---|
| 984 | 1131 | thermal-sensors = <&thermal>; |
|---|
| 985 | 1132 | |
|---|
| 1133 | + cooling-maps { |
|---|
| 1134 | + }; |
|---|
| 1135 | + |
|---|
| 986 | 1136 | trips { |
|---|
| 987 | 1137 | cpu-crit { |
|---|
| 988 | 1138 | temperature = <120000>; |
|---|
| 989 | 1139 | hysteresis = <2000>; |
|---|
| 990 | 1140 | type = "critical"; |
|---|
| 991 | 1141 | }; |
|---|
| 992 | | - }; |
|---|
| 993 | | - |
|---|
| 994 | | - cooling-maps { |
|---|
| 995 | 1142 | }; |
|---|
| 996 | 1143 | }; |
|---|
| 997 | 1144 | }; |
|---|