forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f 
 kernel/arch/arm64/boot/dts/renesas/r8a77980.dtsi
....@@ -1,6 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0
22 /*
3
- * Device Tree Source for the r8a77980 SoC
3
+ * Device Tree Source for the R-Car V3H (R8A77980) SoC
44  *
55  * Copyright (C) 2018 Renesas Electronics Corp.
66  * Copyright (C) 2018 Cogent Embedded, Inc.
....@@ -25,13 +25,20 @@
2525 		i2c5 = &i2c5;
2626 	};
2727 
28
+	/* External CAN clock - to be overridden by boards that provide it */
29
+	can_clk: can {
30
+		compatible = "fixed-clock";
31
+		#clock-cells = <0>;
32
+		clock-frequency = <0>;
33
+	};
34
+
2835 	cpus {
2936 		#address-cells = <1>;
3037 		#size-cells = <0>;
3138 
3239 		a53_0: cpu@0 {
3340 			device_type = "cpu";
34
-			compatible = "arm,cortex-a53", "arm,armv8";
41
+			compatible = "arm,cortex-a53";
3542 			reg = <0>;
3643 			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
3744 			power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
....@@ -41,7 +48,7 @@
4148 
4249 		a53_1: cpu@1 {
4350 			device_type = "cpu";
44
-			compatible = "arm,cortex-a53", "arm,armv8";
51
+			compatible = "arm,cortex-a53";
4552 			reg = <1>;
4653 			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
4754 			power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
....@@ -51,7 +58,7 @@
5158 
5259 		a53_2: cpu@2 {
5360 			device_type = "cpu";
54
-			compatible = "arm,cortex-a53", "arm,armv8";
61
+			compatible = "arm,cortex-a53";
5562 			reg = <2>;
5663 			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
5764 			power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
....@@ -61,7 +68,7 @@
6168 
6269 		a53_3: cpu@3 {
6370 			device_type = "cpu";
64
-			compatible = "arm,cortex-a53", "arm,armv8";
71
+			compatible = "arm,cortex-a53";
6572 			reg = <3>;
6673 			clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
6774 			power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
....@@ -77,13 +84,6 @@
7784 		};
7885 	};
7986 
80
-	/* External CAN clock - to be overridden by boards that provide it */
81
-	can_clk: can {
82
-		compatible = "fixed-clock";
83
-		#clock-cells = <0>;
84
-		clock-frequency = <0>;
85
-	};
86
-
8787 	extal_clk: extal {
8888 		compatible = "fixed-clock";
8989 		#clock-cells = <0>;
....@@ -96,6 +96,22 @@
9696 		#clock-cells = <0>;
9797 		/* This value must be overridden by the board */
9898 		clock-frequency = <0>;
99
+	};
100
+
101
+	/* External PCIe clock - can be overridden by the board */
102
+	pcie_bus_clk: pcie_bus {
103
+		compatible = "fixed-clock";
104
+		#clock-cells = <0>;
105
+		clock-frequency = <0>;
106
+	};
107
+
108
+	pmu_a53 {
109
+		compatible = "arm,cortex-a53-pmu";
110
+		interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
111
+				      <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
112
+				      <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
113
+				      <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
114
+		interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
99115 	};
100116 
101117 	psci {
....@@ -117,6 +133,16 @@
117133 		#address-cells = <2>;
118134 		#size-cells = <2>;
119135 		ranges;
136
+
137
+		rwdt: watchdog@e6020000 {
138
+			compatible = "renesas,r8a77980-wdt",
139
+				     "renesas,rcar-gen3-wdt";
140
+			reg = <0 0xe6020000 0 0x0c>;
141
+			clocks = <&cpg CPG_MOD 402>;
142
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
143
+			resets = <&cpg 402>;
144
+			status = "disabled";
145
+		};
120146 
121147 		gpio0: gpio@e6050000 {
122148 			compatible = "renesas,gpio-r8a77980",
....@@ -208,9 +234,79 @@
208234 			resets = <&cpg 907>;
209235 		};
210236 
211
-		pfc: pin-controller@e6060000 {
237
+		pfc: pinctrl@e6060000 {
212238 			compatible = "renesas,pfc-r8a77980";
213239 			reg = <0 0xe6060000 0 0x50c>;
240
+		};
241
+
242
+		cmt0: timer@e60f0000 {
243
+			compatible = "renesas,r8a77980-cmt0",
244
+				     "renesas,rcar-gen3-cmt0";
245
+			reg = <0 0xe60f0000 0 0x1004>;
246
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
247
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
248
+			clocks = <&cpg CPG_MOD 303>;
249
+			clock-names = "fck";
250
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
251
+			resets = <&cpg 303>;
252
+			status = "disabled";
253
+		};
254
+
255
+		cmt1: timer@e6130000 {
256
+			compatible = "renesas,r8a77980-cmt1",
257
+				     "renesas,rcar-gen3-cmt1";
258
+			reg = <0 0xe6130000 0 0x1004>;
259
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
260
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
261
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
262
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
263
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
264
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
265
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
266
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
267
+			clocks = <&cpg CPG_MOD 302>;
268
+			clock-names = "fck";
269
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
270
+			resets = <&cpg 302>;
271
+			status = "disabled";
272
+		};
273
+
274
+		cmt2: timer@e6140000 {
275
+			compatible = "renesas,r8a77980-cmt1",
276
+				     "renesas,rcar-gen3-cmt1";
277
+			reg = <0 0xe6140000 0 0x1004>;
278
+			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
279
+				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
280
+				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
281
+				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
282
+				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
283
+				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
284
+				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
285
+				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
286
+			clocks = <&cpg CPG_MOD 301>;
287
+			clock-names = "fck";
288
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
289
+			resets = <&cpg 301>;
290
+			status = "disabled";
291
+		};
292
+
293
+		cmt3: timer@e6148000 {
294
+			compatible = "renesas,r8a77980-cmt1",
295
+				     "renesas,rcar-gen3-cmt1";
296
+			reg = <0 0xe6148000 0 0x1004>;
297
+			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
298
+				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
299
+				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
300
+				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
301
+				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
302
+				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
303
+				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
304
+				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
305
+			clocks = <&cpg CPG_MOD 300>;
306
+			clock-names = "fck";
307
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
308
+			resets = <&cpg 300>;
309
+			status = "disabled";
214310 		};
215311 
216312 		cpg: clock-controller@e6150000 {
....@@ -234,20 +330,98 @@
234330 			#power-domain-cells = <1>;
235331 		};
236332 
333
+		tsc: thermal@e6198000 {
334
+			compatible = "renesas,r8a77980-thermal";
335
+			reg = <0 0xe6198000 0 0x100>,
336
+			      <0 0xe61a0000 0 0x100>;
337
+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
338
+				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
339
+				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
340
+			clocks = <&cpg CPG_MOD 522>;
341
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
342
+			resets = <&cpg 522>;
343
+			#thermal-sensor-cells = <1>;
344
+		};
345
+
237346 		intc_ex: interrupt-controller@e61c0000 {
238347 			compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
239348 			#interrupt-cells = <2>;
240349 			interrupt-controller;
241350 			reg = <0 0xe61c0000 0 0x200>;
242
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
243
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
244
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
245
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
246
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
247
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
351
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
352
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
353
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
354
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
355
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
356
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
248357 			clocks = <&cpg CPG_MOD 407>;
249358 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
250359 			resets = <&cpg 407>;
360
+		};
361
+
362
+		tmu0: timer@e61e0000 {
363
+			compatible = "renesas,tmu-r8a77980", "renesas,tmu";
364
+			reg = <0 0xe61e0000 0 0x30>;
365
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
366
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
367
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
368
+			clocks = <&cpg CPG_MOD 125>;
369
+			clock-names = "fck";
370
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
371
+			resets = <&cpg 125>;
372
+			status = "disabled";
373
+		};
374
+
375
+		tmu1: timer@e6fc0000 {
376
+			compatible = "renesas,tmu-r8a77980", "renesas,tmu";
377
+			reg = <0 0xe6fc0000 0 0x30>;
378
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
379
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
380
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
381
+			clocks = <&cpg CPG_MOD 124>;
382
+			clock-names = "fck";
383
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
384
+			resets = <&cpg 124>;
385
+			status = "disabled";
386
+		};
387
+
388
+		tmu2: timer@e6fd0000 {
389
+			compatible = "renesas,tmu-r8a77980", "renesas,tmu";
390
+			reg = <0 0xe6fd0000 0 0x30>;
391
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
392
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
393
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
394
+			clocks = <&cpg CPG_MOD 123>;
395
+			clock-names = "fck";
396
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
397
+			resets = <&cpg 123>;
398
+			status = "disabled";
399
+		};
400
+
401
+		tmu3: timer@e6fe0000 {
402
+			compatible = "renesas,tmu-r8a77980", "renesas,tmu";
403
+			reg = <0 0xe6fe0000 0 0x30>;
404
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
405
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
406
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
407
+			clocks = <&cpg CPG_MOD 122>;
408
+			clock-names = "fck";
409
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
410
+			resets = <&cpg 122>;
411
+			status = "disabled";
412
+		};
413
+
414
+		tmu4: timer@ffc00000 {
415
+			compatible = "renesas,tmu-r8a77980", "renesas,tmu";
416
+			reg = <0 0xffc00000 0 0x30>;
417
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
418
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
419
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
420
+			clocks = <&cpg CPG_MOD 121>;
421
+			clock-names = "fck";
422
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
423
+			resets = <&cpg 121>;
424
+			status = "disabled";
251425 		};
252426 
253427 		i2c0: i2c@e6500000 {
....@@ -418,6 +592,16 @@
418592 			status = "disabled";
419593 		};
420594 
595
+		pcie_phy: pcie-phy@e65d0000 {
596
+			compatible = "renesas,r8a77980-pcie-phy";
597
+			reg = <0 0xe65d0000 0 0x8000>;
598
+			#phy-cells = <0>;
599
+			clocks = <&cpg CPG_MOD 319>;
600
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
601
+			resets = <&cpg 319>;
602
+			status = "disabled";
603
+		};
604
+
421605 		canfd: can@e66c0000 {
422606 			compatible = "renesas,r8a77980-canfd",
423607 				     "renesas,rcar-gen3-canfd";
....@@ -441,71 +625,6 @@
441625 			channel1 {
442626 				status = "disabled";
443627 			};
444
-		};
445
-
446
-		ipmmu_ds1: mmu@e7740000 {
447
-			compatible = "renesas,ipmmu-r8a77980";
448
-			reg = <0 0xe7740000 0 0x1000>;
449
-			renesas,ipmmu-main = <&ipmmu_mm 0>;
450
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
451
-			#iommu-cells = <1>;
452
-		};
453
-
454
-		ipmmu_vip0: mmu@e7b00000 {
455
-			compatible = "renesas,ipmmu-r8a77980";
456
-			reg = <0 0xe7b00000 0 0x1000>;
457
-			renesas,ipmmu-main = <&ipmmu_mm 4>;
458
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
459
-			#iommu-cells = <1>;
460
-		};
461
-
462
-		ipmmu_vip1: mmu@e7960000 {
463
-			compatible = "renesas,ipmmu-r8a77980";
464
-			reg = <0 0xe7960000 0 0x1000>;
465
-			renesas,ipmmu-main = <&ipmmu_mm 11>;
466
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
467
-			#iommu-cells = <1>;
468
-		};
469
-
470
-		ipmmu_ir: mmu@ff8b0000 {
471
-			compatible = "renesas,ipmmu-r8a77980";
472
-			reg = <0 0xff8b0000 0 0x1000>;
473
-			renesas,ipmmu-main = <&ipmmu_mm 3>;
474
-			power-domains = <&sysc R8A77980_PD_A3IR>;
475
-			#iommu-cells = <1>;
476
-		};
477
-
478
-		ipmmu_mm: mmu@e67b0000 {
479
-			compatible = "renesas,ipmmu-r8a77980";
480
-			reg = <0 0xe67b0000 0 0x1000>;
481
-			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
482
-				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
483
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
484
-			#iommu-cells = <1>;
485
-		};
486
-
487
-		ipmmu_rt: mmu@ffc80000 {
488
-			compatible = "renesas,ipmmu-r8a77980";
489
-			reg = <0 0xffc80000 0 0x1000>;
490
-			renesas,ipmmu-main = <&ipmmu_mm 10>;
491
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
492
-			#iommu-cells = <1>;
493
-		};
494
-
495
-		ipmmu_vc0: mmu@fe6b0000 {
496
-			compatible = "renesas,ipmmu-r8a77980";
497
-			reg = <0 0xfe6b0000 0 0x1000>;
498
-			renesas,ipmmu-main = <&ipmmu_mm 12>;
499
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
500
-			#iommu-cells = <1>;
501
-		};
502
-
503
-		ipmmu_vi0: mmu@febd0000 {
504
-			compatible = "renesas,ipmmu-r8a77980";
505
-			reg = <0 0xfebd0000 0 0x1000>;
506
-			renesas,ipmmu-main = <&ipmmu_mm 14>;
507
-			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
508
-			#iommu-cells = <1>;
509628 		};
510629 
511630 		avb: ethernet@e6800000 {
....@@ -548,8 +667,59 @@
548667 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
549668 			resets = <&cpg 812>;
550669 			phy-mode = "rgmii";
670
+			iommus = <&ipmmu_ds1 33>;
551671 			#address-cells = <1>;
552672 			#size-cells = <0>;
673
+			status = "disabled";
674
+		};
675
+
676
+		pwm0: pwm@e6e30000 {
677
+			compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
678
+			reg = <0 0xe6e30000 0 0x10>;
679
+			#pwm-cells = <2>;
680
+			clocks = <&cpg CPG_MOD 523>;
681
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
682
+			resets = <&cpg 523>;
683
+			status = "disabled";
684
+		};
685
+
686
+		pwm1: pwm@e6e31000 {
687
+			compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
688
+			reg = <0 0xe6e31000 0 0x10>;
689
+			#pwm-cells = <2>;
690
+			clocks = <&cpg CPG_MOD 523>;
691
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
692
+			resets = <&cpg 523>;
693
+			status = "disabled";
694
+		};
695
+
696
+		pwm2: pwm@e6e32000 {
697
+			compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
698
+			reg = <0 0xe6e32000 0 0x10>;
699
+			#pwm-cells = <2>;
700
+			clocks = <&cpg CPG_MOD 523>;
701
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
702
+			resets = <&cpg 523>;
703
+			status = "disabled";
704
+		};
705
+
706
+		pwm3: pwm@e6e33000 {
707
+			compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
708
+			reg = <0 0xe6e33000 0 0x10>;
709
+			#pwm-cells = <2>;
710
+			clocks = <&cpg CPG_MOD 523>;
711
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
712
+			resets = <&cpg 523>;
713
+			status = "disabled";
714
+		};
715
+
716
+		pwm4: pwm@e6e34000 {
717
+			compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
718
+			reg = <0 0xe6e34000 0 0x10>;
719
+			#pwm-cells = <2>;
720
+			clocks = <&cpg CPG_MOD 523>;
721
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
722
+			resets = <&cpg 523>;
553723 			status = "disabled";
554724 		};
555725 
....@@ -625,27 +795,402 @@
625795 			status = "disabled";
626796 		};
627797 
798
+		tpu: pwm@e6e80000 {
799
+			compatible = "renesas,tpu-r8a77980", "renesas,tpu";
800
+			reg = <0 0xe6e80000 0 0x148>;
801
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
802
+			clocks = <&cpg CPG_MOD 304>;
803
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
804
+			resets = <&cpg 304>;
805
+			#pwm-cells = <3>;
806
+			status = "disabled";
807
+		};
808
+
809
+		msiof0: spi@e6e90000 {
810
+			compatible = "renesas,msiof-r8a77980",
811
+				     "renesas,rcar-gen3-msiof";
812
+			reg = <0 0xe6e90000 0 0x64>;
813
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
814
+			clocks = <&cpg CPG_MOD 211>;
815
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
816
+			resets = <&cpg 211>;
817
+			#address-cells = <1>;
818
+			#size-cells = <0>;
819
+			status = "disabled";
820
+		};
821
+
822
+		msiof1: spi@e6ea0000 {
823
+			compatible = "renesas,msiof-r8a77980",
824
+				     "renesas,rcar-gen3-msiof";
825
+			reg = <0 0xe6ea0000 0 0x0064>;
826
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
827
+			clocks = <&cpg CPG_MOD 210>;
828
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
829
+			resets = <&cpg 210>;
830
+			#address-cells = <1>;
831
+			#size-cells = <0>;
832
+			status = "disabled";
833
+		};
834
+
835
+		msiof2: spi@e6c00000 {
836
+			compatible = "renesas,msiof-r8a77980",
837
+				     "renesas,rcar-gen3-msiof";
838
+			reg = <0 0xe6c00000 0 0x0064>;
839
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
840
+			clocks = <&cpg CPG_MOD 209>;
841
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
842
+			resets = <&cpg 209>;
843
+			#address-cells = <1>;
844
+			#size-cells = <0>;
845
+			status = "disabled";
846
+		};
847
+
848
+		msiof3: spi@e6c10000 {
849
+			compatible = "renesas,msiof-r8a77980",
850
+				     "renesas,rcar-gen3-msiof";
851
+			reg = <0 0xe6c10000 0 0x0064>;
852
+			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
853
+			clocks = <&cpg CPG_MOD 208>;
854
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
855
+			resets = <&cpg 208>;
856
+			#address-cells = <1>;
857
+			#size-cells = <0>;
858
+			status = "disabled";
859
+		};
860
+
861
+		vin0: video@e6ef0000 {
862
+			compatible = "renesas,vin-r8a77980";
863
+			reg = <0 0xe6ef0000 0 0x1000>;
864
+			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
865
+			clocks = <&cpg CPG_MOD 811>;
866
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
867
+			resets = <&cpg 811>;
868
+			renesas,id = <0>;
869
+			status = "disabled";
870
+
871
+			ports {
872
+				#address-cells = <1>;
873
+				#size-cells = <0>;
874
+
875
+				port@1 {
876
+					#address-cells = <1>;
877
+					#size-cells = <0>;
878
+
879
+					reg = <1>;
880
+
881
+					vin0csi40: endpoint@2 {
882
+						reg = <2>;
883
+						remote-endpoint = <&csi40vin0>;
884
+					};
885
+				};
886
+			};
887
+		};
888
+
889
+		vin1: video@e6ef1000 {
890
+			compatible = "renesas,vin-r8a77980";
891
+			reg = <0 0xe6ef1000 0 0x1000>;
892
+			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
893
+			clocks = <&cpg CPG_MOD 810>;
894
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
895
+			status = "disabled";
896
+			renesas,id = <1>;
897
+			resets = <&cpg 810>;
898
+
899
+			ports {
900
+				#address-cells = <1>;
901
+				#size-cells = <0>;
902
+
903
+				port@1 {
904
+					#address-cells = <1>;
905
+					#size-cells = <0>;
906
+
907
+					reg = <1>;
908
+
909
+					vin1csi40: endpoint@2 {
910
+						reg = <2>;
911
+						remote-endpoint = <&csi40vin1>;
912
+					};
913
+				};
914
+			};
915
+		};
916
+
917
+		vin2: video@e6ef2000 {
918
+			compatible = "renesas,vin-r8a77980";
919
+			reg = <0 0xe6ef2000 0 0x1000>;
920
+			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
921
+			clocks = <&cpg CPG_MOD 809>;
922
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
923
+			resets = <&cpg 809>;
924
+			renesas,id = <2>;
925
+			status = "disabled";
926
+
927
+			ports {
928
+				#address-cells = <1>;
929
+				#size-cells = <0>;
930
+
931
+				port@1 {
932
+					#address-cells = <1>;
933
+					#size-cells = <0>;
934
+
935
+					reg = <1>;
936
+
937
+					vin2csi40: endpoint@2 {
938
+						reg = <2>;
939
+						remote-endpoint = <&csi40vin2>;
940
+					};
941
+				};
942
+			};
943
+		};
944
+
945
+		vin3: video@e6ef3000 {
946
+			compatible = "renesas,vin-r8a77980";
947
+			reg = <0 0xe6ef3000 0 0x1000>;
948
+			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
949
+			clocks = <&cpg CPG_MOD 808>;
950
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
951
+			resets = <&cpg 808>;
952
+			renesas,id = <3>;
953
+			status = "disabled";
954
+
955
+			ports {
956
+				#address-cells = <1>;
957
+				#size-cells = <0>;
958
+
959
+				port@1 {
960
+					#address-cells = <1>;
961
+					#size-cells = <0>;
962
+
963
+					reg = <1>;
964
+
965
+					vin3csi40: endpoint@2 {
966
+						reg = <2>;
967
+						remote-endpoint = <&csi40vin3>;
968
+					};
969
+				};
970
+			};
971
+		};
972
+
973
+		vin4: video@e6ef4000 {
974
+			compatible = "renesas,vin-r8a77980";
975
+			reg = <0 0xe6ef4000 0 0x1000>;
976
+			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
977
+			clocks = <&cpg CPG_MOD 807>;
978
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
979
+			resets = <&cpg 807>;
980
+			renesas,id = <4>;
981
+			status = "disabled";
982
+
983
+			ports {
984
+				#address-cells = <1>;
985
+				#size-cells = <0>;
986
+
987
+				port@1 {
988
+					#address-cells = <1>;
989
+					#size-cells = <0>;
990
+
991
+					reg = <1>;
992
+
993
+					vin4csi41: endpoint@3 {
994
+						reg = <3>;
995
+						remote-endpoint = <&csi41vin4>;
996
+					};
997
+				};
998
+			};
999
+		};
1000
+
1001
+		vin5: video@e6ef5000 {
1002
+			compatible = "renesas,vin-r8a77980";
1003
+			reg = <0 0xe6ef5000 0 0x1000>;
1004
+			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1005
+			clocks = <&cpg CPG_MOD 806>;
1006
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1007
+			resets = <&cpg 806>;
1008
+			renesas,id = <5>;
1009
+			status = "disabled";
1010
+
1011
+			ports {
1012
+				#address-cells = <1>;
1013
+				#size-cells = <0>;
1014
+
1015
+				port@1 {
1016
+					#address-cells = <1>;
1017
+					#size-cells = <0>;
1018
+
1019
+					reg = <1>;
1020
+
1021
+					vin5csi41: endpoint@3 {
1022
+						reg = <3>;
1023
+						remote-endpoint = <&csi41vin5>;
1024
+					};
1025
+				};
1026
+			};
1027
+		};
1028
+
1029
+		vin6: video@e6ef6000 {
1030
+			compatible = "renesas,vin-r8a77980";
1031
+			reg = <0 0xe6ef6000 0 0x1000>;
1032
+			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1033
+			clocks = <&cpg CPG_MOD 805>;
1034
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1035
+			resets = <&cpg 805>;
1036
+			renesas,id = <6>;
1037
+			status = "disabled";
1038
+
1039
+			ports {
1040
+				#address-cells = <1>;
1041
+				#size-cells = <0>;
1042
+
1043
+				port@1 {
1044
+					#address-cells = <1>;
1045
+					#size-cells = <0>;
1046
+
1047
+					reg = <1>;
1048
+
1049
+					vin6csi41: endpoint@3 {
1050
+						reg = <3>;
1051
+						remote-endpoint = <&csi41vin6>;
1052
+					};
1053
+				};
1054
+			};
1055
+		};
1056
+
1057
+		vin7: video@e6ef7000 {
1058
+			compatible = "renesas,vin-r8a77980";
1059
+			reg = <0 0xe6ef7000 0 0x1000>;
1060
+			interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1061
+			clocks = <&cpg CPG_MOD 804>;
1062
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1063
+			resets = <&cpg 804>;
1064
+			renesas,id = <7>;
1065
+			status = "disabled";
1066
+
1067
+			ports {
1068
+				#address-cells = <1>;
1069
+				#size-cells = <0>;
1070
+
1071
+				port@1 {
1072
+					#address-cells = <1>;
1073
+					#size-cells = <0>;
1074
+
1075
+					reg = <1>;
1076
+
1077
+					vin7csi41: endpoint@3 {
1078
+						reg = <3>;
1079
+						remote-endpoint = <&csi41vin7>;
1080
+					};
1081
+				};
1082
+			};
1083
+		};
1084
+
1085
+		vin8: video@e6ef8000 {
1086
+			compatible = "renesas,vin-r8a77980";
1087
+			reg = <0 0xe6ef8000 0 0x1000>;
1088
+			interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1089
+			clocks = <&cpg CPG_MOD 628>;
1090
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1091
+			resets = <&cpg 628>;
1092
+			renesas,id = <8>;
1093
+			status = "disabled";
1094
+		};
1095
+
1096
+		vin9: video@e6ef9000 {
1097
+			compatible = "renesas,vin-r8a77980";
1098
+			reg = <0 0xe6ef9000 0 0x1000>;
1099
+			interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1100
+			clocks = <&cpg CPG_MOD 627>;
1101
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1102
+			resets = <&cpg 627>;
1103
+			renesas,id = <9>;
1104
+			status = "disabled";
1105
+		};
1106
+
1107
+		vin10: video@e6efa000 {
1108
+			compatible = "renesas,vin-r8a77980";
1109
+			reg = <0 0xe6efa000 0 0x1000>;
1110
+			interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1111
+			clocks = <&cpg CPG_MOD 625>;
1112
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1113
+			resets = <&cpg 625>;
1114
+			renesas,id = <10>;
1115
+			status = "disabled";
1116
+		};
1117
+
1118
+		vin11: video@e6efb000 {
1119
+			compatible = "renesas,vin-r8a77980";
1120
+			reg = <0 0xe6efb000 0 0x1000>;
1121
+			interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1122
+			clocks = <&cpg CPG_MOD 618>;
1123
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1124
+			resets = <&cpg 618>;
1125
+			renesas,id = <11>;
1126
+			status = "disabled";
1127
+		};
1128
+
1129
+		vin12: video@e6efc000 {
1130
+			compatible = "renesas,vin-r8a77980";
1131
+			reg = <0 0xe6efc000 0 0x1000>;
1132
+			interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1133
+			clocks = <&cpg CPG_MOD 612>;
1134
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1135
+			resets = <&cpg 612>;
1136
+			renesas,id = <12>;
1137
+			status = "disabled";
1138
+		};
1139
+
1140
+		vin13: video@e6efd000 {
1141
+			compatible = "renesas,vin-r8a77980";
1142
+			reg = <0 0xe6efd000 0 0x1000>;
1143
+			interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1144
+			clocks = <&cpg CPG_MOD 608>;
1145
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1146
+			resets = <&cpg 608>;
1147
+			renesas,id = <13>;
1148
+			status = "disabled";
1149
+		};
1150
+
1151
+		vin14: video@e6efe000 {
1152
+			compatible = "renesas,vin-r8a77980";
1153
+			reg = <0 0xe6efe000 0 0x1000>;
1154
+			interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1155
+			clocks = <&cpg CPG_MOD 605>;
1156
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1157
+			resets = <&cpg 605>;
1158
+			renesas,id = <14>;
1159
+			status = "disabled";
1160
+		};
1161
+
1162
+		vin15: video@e6eff000 {
1163
+			compatible = "renesas,vin-r8a77980";
1164
+			reg = <0 0xe6eff000 0 0x1000>;
1165
+			interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1166
+			clocks = <&cpg CPG_MOD 604>;
1167
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1168
+			resets = <&cpg 604>;
1169
+			renesas,id = <15>;
1170
+			status = "disabled";
1171
+		};
1172
+
6281173 		dmac1: dma-controller@e7300000 {
6291174 			compatible = "renesas,dmac-r8a77980",
6301175 				     "renesas,rcar-dmac";
6311176 			reg = <0 0xe7300000 0 0x10000>;
632
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
633
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
634
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
635
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
636
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
637
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
638
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
639
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
640
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
641
-				      GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
642
-				      GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
643
-				      GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
644
-				      GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
645
-				      GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
646
-				      GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
647
-				      GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
648
-				      GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1177
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1178
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1179
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1180
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1181
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1182
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1183
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1184
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1185
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1186
+				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
1187
+				     <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
1188
+				     <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
1189
+				     <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
1190
+				     <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
1191
+				     <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
1192
+				     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
1193
+				     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
6491194 			interrupt-names = "error",
6501195 					  "ch0", "ch1", "ch2", "ch3",
6511196 					  "ch4", "ch5", "ch6", "ch7",
....@@ -657,29 +1202,37 @@
6571202 			resets = <&cpg 218>;
6581203 			#dma-cells = <1>;
6591204 			dma-channels = <16>;
1205
+			iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1206
+			       <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1207
+			       <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1208
+			       <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1209
+			       <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1210
+			       <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1211
+			       <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1212
+			       <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
6601213 		};
6611214 
6621215 		dmac2: dma-controller@e7310000 {
6631216 			compatible = "renesas,dmac-r8a77980",
6641217 				     "renesas,rcar-dmac";
6651218 			reg = <0 0xe7310000 0 0x10000>;
666
-			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
667
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
668
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
669
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
670
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
671
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
672
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
673
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
674
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
675
-				      GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
676
-				      GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
677
-				      GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
678
-				      GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
679
-				      GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
680
-				      GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
681
-				      GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
682
-				      GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1219
+			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
1220
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1221
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1222
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1223
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1224
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1225
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1226
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1227
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
1228
+				     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
1229
+				     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
1230
+				     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
1231
+				     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
1232
+				     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
1233
+				     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
1234
+				     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
1235
+				     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
6831236 			interrupt-names = "error",
6841237 					  "ch0", "ch1", "ch2", "ch3",
6851238 					  "ch4", "ch5", "ch6", "ch7",
....@@ -691,6 +1244,14 @@
6911244 			resets = <&cpg 217>;
6921245 			#dma-cells = <1>;
6931246 			dma-channels = <16>;
1247
+			iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1248
+			       <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1249
+			       <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1250
+			       <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1251
+			       <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1252
+			       <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1253
+			       <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1254
+			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
6941255 		};
6951256 
6961257 		gether: ethernet@e7400000 {
....@@ -705,6 +1266,71 @@
7051266 			status = "disabled";
7061267 		};
7071268 
1269
+		ipmmu_ds1: iommu@e7740000 {
1270
+			compatible = "renesas,ipmmu-r8a77980";
1271
+			reg = <0 0xe7740000 0 0x1000>;
1272
+			renesas,ipmmu-main = <&ipmmu_mm 0>;
1273
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1274
+			#iommu-cells = <1>;
1275
+		};
1276
+
1277
+		ipmmu_ir: iommu@ff8b0000 {
1278
+			compatible = "renesas,ipmmu-r8a77980";
1279
+			reg = <0 0xff8b0000 0 0x1000>;
1280
+			renesas,ipmmu-main = <&ipmmu_mm 3>;
1281
+			power-domains = <&sysc R8A77980_PD_A3IR>;
1282
+			#iommu-cells = <1>;
1283
+		};
1284
+
1285
+		ipmmu_mm: iommu@e67b0000 {
1286
+			compatible = "renesas,ipmmu-r8a77980";
1287
+			reg = <0 0xe67b0000 0 0x1000>;
1288
+			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1289
+				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1290
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1291
+			#iommu-cells = <1>;
1292
+		};
1293
+
1294
+		ipmmu_rt: iommu@ffc80000 {
1295
+			compatible = "renesas,ipmmu-r8a77980";
1296
+			reg = <0 0xffc80000 0 0x1000>;
1297
+			renesas,ipmmu-main = <&ipmmu_mm 10>;
1298
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1299
+			#iommu-cells = <1>;
1300
+		};
1301
+
1302
+		ipmmu_vc0: iommu@fe990000 {
1303
+			compatible = "renesas,ipmmu-r8a77980";
1304
+			reg = <0 0xfe990000 0 0x1000>;
1305
+			renesas,ipmmu-main = <&ipmmu_mm 12>;
1306
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1307
+			#iommu-cells = <1>;
1308
+		};
1309
+
1310
+		ipmmu_vi0: iommu@febd0000 {
1311
+			compatible = "renesas,ipmmu-r8a77980";
1312
+			reg = <0 0xfebd0000 0 0x1000>;
1313
+			renesas,ipmmu-main = <&ipmmu_mm 14>;
1314
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1315
+			#iommu-cells = <1>;
1316
+		};
1317
+
1318
+		ipmmu_vip0: iommu@e7b00000 {
1319
+			compatible = "renesas,ipmmu-r8a77980";
1320
+			reg = <0 0xe7b00000 0 0x1000>;
1321
+			renesas,ipmmu-main = <&ipmmu_mm 4>;
1322
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1323
+			#iommu-cells = <1>;
1324
+		};
1325
+
1326
+		ipmmu_vip1: iommu@e7960000 {
1327
+			compatible = "renesas,ipmmu-r8a77980";
1328
+			reg = <0 0xe7960000 0 0x1000>;
1329
+			renesas,ipmmu-main = <&ipmmu_mm 11>;
1330
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1331
+			#iommu-cells = <1>;
1332
+		};
1333
+
7081334 		mmc0: mmc@ee140000 {
7091335 			compatible = "renesas,sdhi-r8a77980",
7101336 				     "renesas,rcar-gen3-sdhi";
....@@ -714,6 +1340,24 @@
7141340 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
7151341 			resets = <&cpg 314>;
7161342 			max-frequency = <200000000>;
1343
+			iommus = <&ipmmu_ds1 32>;
1344
+			status = "disabled";
1345
+		};
1346
+
1347
+		rpc: spi@ee200000 {
1348
+			compatible = "renesas,r8a77980-rpc-if",
1349
+				     "renesas,rcar-gen3-rpc-if";
1350
+			reg = <0 0xee200000 0 0x200>,
1351
+			      <0 0x08000000 0 0x4000000>,
1352
+			      <0 0xee208000 0 0x100>;
1353
+			reg-names = "regs", "dirmap", "wbuf";
1354
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1355
+			clocks = <&cpg CPG_MOD 917>;
1356
+			clock-names = "rpc";
1357
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1358
+			resets = <&cpg 917>;
1359
+			#address-cells = <1>;
1360
+			#size-cells = <0>;
7171361 			status = "disabled";
7181362 		};
7191363 
....@@ -734,6 +1378,34 @@
7341378 			resets = <&cpg 408>;
7351379 		};
7361380 
1381
+		pciec: pcie@fe000000 {
1382
+			compatible = "renesas,pcie-r8a77980",
1383
+				     "renesas,pcie-rcar-gen3";
1384
+			reg = <0 0xfe000000 0 0x80000>;
1385
+			#address-cells = <3>;
1386
+			#size-cells = <2>;
1387
+			bus-range = <0x00 0xff>;
1388
+			device_type = "pci";
1389
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1390
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1391
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1392
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1393
+			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1394
+			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1395
+				     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1396
+				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1397
+			#interrupt-cells = <1>;
1398
+			interrupt-map-mask = <0 0 0 0>;
1399
+			interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1400
+			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1401
+			clock-names = "pcie", "pcie_bus";
1402
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1403
+			resets = <&cpg 319>;
1404
+			phys = <&pcie_phy>;
1405
+			phy-names = "pcie";
1406
+			status = "disabled";
1407
+		};
1408
+
7371409 		vspd0: vsp@fea20000 {
7381410 			compatible = "renesas,vsp2";
7391411 			reg = <0 0xfea20000 0 0x5000>;
....@@ -752,16 +1424,95 @@
7521424 			resets = <&cpg 603>;
7531425 		};
7541426 
1427
+		csi40: csi2@feaa0000 {
1428
+			compatible = "renesas,r8a77980-csi2";
1429
+			reg = <0 0xfeaa0000 0 0x10000>;
1430
+			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1431
+			clocks = <&cpg CPG_MOD 716>;
1432
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1433
+			resets = <&cpg 716>;
1434
+			status = "disabled";
1435
+
1436
+			ports {
1437
+				#address-cells = <1>;
1438
+				#size-cells = <0>;
1439
+
1440
+				port@1 {
1441
+					#address-cells = <1>;
1442
+					#size-cells = <0>;
1443
+
1444
+					reg = <1>;
1445
+
1446
+					csi40vin0: endpoint@0 {
1447
+						reg = <0>;
1448
+						remote-endpoint = <&vin0csi40>;
1449
+					};
1450
+					csi40vin1: endpoint@1 {
1451
+						reg = <1>;
1452
+						remote-endpoint = <&vin1csi40>;
1453
+					};
1454
+					csi40vin2: endpoint@2 {
1455
+						reg = <2>;
1456
+						remote-endpoint = <&vin2csi40>;
1457
+					};
1458
+					csi40vin3: endpoint@3 {
1459
+						reg = <3>;
1460
+						remote-endpoint = <&vin3csi40>;
1461
+					};
1462
+				};
1463
+			};
1464
+		};
1465
+
1466
+		csi41: csi2@feab0000 {
1467
+			compatible = "renesas,r8a77980-csi2";
1468
+			reg = <0 0xfeab0000 0 0x10000>;
1469
+			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1470
+			clocks = <&cpg CPG_MOD 715>;
1471
+			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1472
+			resets = <&cpg 715>;
1473
+			status = "disabled";
1474
+
1475
+			ports {
1476
+				#address-cells = <1>;
1477
+				#size-cells = <0>;
1478
+
1479
+				port@1 {
1480
+					#address-cells = <1>;
1481
+					#size-cells = <0>;
1482
+
1483
+					reg = <1>;
1484
+
1485
+					csi41vin4: endpoint@0 {
1486
+						reg = <0>;
1487
+						remote-endpoint = <&vin4csi41>;
1488
+					};
1489
+					csi41vin5: endpoint@1 {
1490
+						reg = <1>;
1491
+						remote-endpoint = <&vin5csi41>;
1492
+					};
1493
+					csi41vin6: endpoint@2 {
1494
+						reg = <2>;
1495
+						remote-endpoint = <&vin6csi41>;
1496
+					};
1497
+					csi41vin7: endpoint@3 {
1498
+						reg = <3>;
1499
+						remote-endpoint = <&vin7csi41>;
1500
+					};
1501
+				};
1502
+			};
1503
+		};
1504
+
7551505 		du: display@feb00000 {
756
-			compatible = "renesas,du-r8a77980",
757
-				     "renesas,du-r8a77970";
1506
+			compatible = "renesas,du-r8a77980";
7581507 			reg = <0 0xfeb00000 0 0x80000>;
7591508 			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
7601509 			clocks = <&cpg CPG_MOD 724>;
7611510 			clock-names = "du.0";
7621511 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
7631512 			resets = <&cpg 724>;
764
-			vsps = <&vspd0>;
1513
+			reset-names = "du.0";
1514
+			renesas,vsps = <&vspd0 0>;
1515
+
7651516 			status = "disabled";
7661517 
7671518 			ports {
....@@ -817,6 +1568,46 @@
8171568 		};
8181569 	};
8191570 
1571
+	thermal-zones {
1572
+		thermal-sensor-1 {
1573
+			polling-delay-passive = <250>;
1574
+			polling-delay = <1000>;
1575
+			thermal-sensors = <&tsc 0>;
1576
+
1577
+			trips {
1578
+				sensor1-passive {
1579
+					temperature = <95000>;
1580
+					hysteresis = <1000>;
1581
+					type = "passive";
1582
+				};
1583
+				sensor1-critical {
1584
+					temperature = <120000>;
1585
+					hysteresis = <1000>;
1586
+					type = "critical";
1587
+				};
1588
+			};
1589
+		};
1590
+
1591
+		thermal-sensor-2 {
1592
+			polling-delay-passive = <250>;
1593
+			polling-delay = <1000>;
1594
+			thermal-sensors = <&tsc 1>;
1595
+
1596
+			trips {
1597
+				sensor2-passive {
1598
+					temperature = <95000>;
1599
+					hysteresis = <1000>;
1600
+					type = "passive";
1601
+				};
1602
+				sensor2-critical {
1603
+					temperature = <120000>;
1604
+					hysteresis = <1000>;
1605
+					type = "critical";
1606
+				};
1607
+			};
1608
+		};
1609
+	};
1610
+
8201611 	timer {
8211612 		compatible = "arm,armv8-timer";
8221613 		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |