| .. | .. |
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| 43 | 43 | |
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| 44 | 44 | cpu@0 { |
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| 45 | 45 | device_type = "cpu"; |
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| 46 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 46 | + compatible = "arm,cortex-a53"; |
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| 47 | 47 | reg = <0 0>; |
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| 48 | 48 | next-level-cache = <&L2_0>; |
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| 49 | 49 | }; |
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| 50 | 50 | |
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| 51 | 51 | cpu@1 { |
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| 52 | 52 | device_type = "cpu"; |
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| 53 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 53 | + compatible = "arm,cortex-a53"; |
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| 54 | 54 | reg = <0 1>; |
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| 55 | 55 | next-level-cache = <&L2_0>; |
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| 56 | 56 | }; |
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| .. | .. |
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| 63 | 63 | memory@80000000 { |
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| 64 | 64 | device_type = "memory"; |
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| 65 | 65 | reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */ |
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| 66 | + }; |
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| 67 | + |
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| 68 | + reserved-memory { |
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| 69 | + #address-cells = <2>; |
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| 70 | + #size-cells = <2>; |
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| 71 | + ranges; |
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| 72 | + |
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| 73 | + /* Chipselect 2 is physically at 0x18000000 */ |
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| 74 | + vram: vram@18000000 { |
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| 75 | + /* 8 MB of designated video RAM */ |
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| 76 | + compatible = "shared-dma-pool"; |
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| 77 | + reg = <0 0x18000000 0 0x00800000>; |
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| 78 | + no-map; |
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| 79 | + }; |
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| 66 | 80 | }; |
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| 67 | 81 | |
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| 68 | 82 | gic: interrupt-controller@2c001000 { |
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| .. | .. |
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| 130 | 144 | }; |
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| 131 | 145 | }; |
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| 132 | 146 | |
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| 133 | | - smb: smb@8000000 { |
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| 147 | + smb: bus@8000000 { |
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| 134 | 148 | compatible = "simple-bus"; |
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| 135 | 149 | |
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| 136 | 150 | #address-cells = <2>; |
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