kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
..
..
@@ -8,8 +8,76 @@
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  * VEMotherBoard.lisa
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  */
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 / {
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-	smb@8000000 {
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-		motherboard {
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+	v2m_clk24mhz: clk24mhz {
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+		compatible = "fixed-clock";
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+		#clock-cells = <0>;
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+		clock-frequency = <24000000>;
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+		clock-output-names = "v2m:clk24mhz";
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+	};
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+
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+	v2m_refclk1mhz: refclk1mhz {
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+		compatible = "fixed-clock";
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+		#clock-cells = <0>;
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+		clock-frequency = <1000000>;
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+		clock-output-names = "v2m:refclk1mhz";
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+	};
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+
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+	v2m_refclk32khz: refclk32khz {
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+		compatible = "fixed-clock";
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+		#clock-cells = <0>;
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+		clock-frequency = <32768>;
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+		clock-output-names = "v2m:refclk32khz";
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+	};
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+
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+	v2m_fixed_3v3: v2m-3v3 {
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+		compatible = "regulator-fixed";
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+		regulator-name = "3V3";
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+		regulator-min-microvolt = <3300000>;
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+		regulator-max-microvolt = <3300000>;
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+		regulator-always-on;
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+	};
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+
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+	mcc {
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+		compatible = "arm,vexpress,config-bus";
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+		arm,vexpress,config-bridge = <&v2m_sysreg>;
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+
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+		v2m_oscclk1: oscclk1 {
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+			/* CLCD clock */
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+			compatible = "arm,vexpress-osc";
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+			arm,vexpress-sysreg,func = <1 1>;
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+			freq-range = <23750000 63500000>;
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+			#clock-cells = <0>;
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+			clock-output-names = "v2m:oscclk1";
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+		};
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+
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+		reset {
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+			compatible = "arm,vexpress-reset";
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+			arm,vexpress-sysreg,func = <5 0>;
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+		};
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+
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+		muxfpga {
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+			compatible = "arm,vexpress-muxfpga";
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+			arm,vexpress-sysreg,func = <7 0>;
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+		};
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+
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+		shutdown {
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+			compatible = "arm,vexpress-shutdown";
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+			arm,vexpress-sysreg,func = <8 0>;
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+		};
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+
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+		reboot {
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+			compatible = "arm,vexpress-reboot";
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+			arm,vexpress-sysreg,func = <9 0>;
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+		};
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+
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+		dvimode {
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+			compatible = "arm,vexpress-dvimode";
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+			arm,vexpress-sysreg,func = <11 0>;
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+		};
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+	};
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+
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+	bus@8000000 {
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+		motherboard-bus {
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 			arm,v2m-memory-map = "rs1";
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 			compatible = "arm,vexpress,v2m-p1", "simple-bus";
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 			#address-cells = <2>; /* SMB chipselect number and offset */
..
..
@@ -17,46 +85,20 @@
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 			#interrupt-cells = <1>;
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 			ranges;
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-			flash@0,00000000 {
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+			flash@0 {
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 				compatible = "arm,vexpress-flash", "cfi-flash";
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 				reg = <0 0x00000000 0x04000000>,
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 				      <4 0x00000000 0x04000000>;
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 				bank-width = <4>;
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 			};
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-			v2m_video_ram: vram@2,00000000 {
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-				compatible = "arm,vexpress-vram";
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-				reg = <2 0x00000000 0x00800000>;
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-			};
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-
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-			ethernet@2,02000000 {
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+			ethernet@202000000 {
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 				compatible = "smsc,lan91c111";
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 				reg = <2 0x02000000 0x10000>;
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 				interrupts = <15>;
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 			};
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-			v2m_clk24mhz: clk24mhz {
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-				compatible = "fixed-clock";
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-				#clock-cells = <0>;
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-				clock-frequency = <24000000>;
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-				clock-output-names = "v2m:clk24mhz";
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-			};
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-
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-			v2m_refclk1mhz: refclk1mhz {
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-				compatible = "fixed-clock";
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-				#clock-cells = <0>;
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-				clock-frequency = <1000000>;
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-				clock-output-names = "v2m:refclk1mhz";
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-			};
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-
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-			v2m_refclk32khz: refclk32khz {
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-				compatible = "fixed-clock";
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-				#clock-cells = <0>;
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-				clock-frequency = <32768>;
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-				clock-output-names = "v2m:refclk32khz";
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-			};
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-
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-			iofpga@3,00000000 {
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+			iofpga-bus@300000000 {
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 				compatible = "simple-bus";
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 				#address-cells = <1>;
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 				#size-cells = <1>;
..
..
@@ -91,7 +133,7 @@
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 				mmci@50000 {
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 					compatible = "arm,pl180", "arm,primecell";
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 					reg = <0x050000 0x1000>;
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-					interrupts = <9 10>;
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+					interrupts = <9>, <10>;
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 					cd-gpios = <&v2m_sysreg 0 0>;
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 					wp-gpios = <&v2m_sysreg 1 0>;
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 					max-frequency = <12000000>;
..
..
@@ -116,7 +158,7 @@
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 					clock-names = "KMIREFCLK", "apb_pclk";
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 				};
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-				v2m_serial0: uart@90000 {
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+				v2m_serial0: serial@90000 {
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 					compatible = "arm,pl011", "arm,primecell";
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 					reg = <0x090000 0x1000>;
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 					interrupts = <5>;
..
..
@@ -124,7 +166,7 @@
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 					clock-names = "uartclk", "apb_pclk";
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 				};
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-				v2m_serial1: uart@a0000 {
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+				v2m_serial1: serial@a0000 {
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 					compatible = "arm,pl011", "arm,primecell";
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 					reg = <0x0a0000 0x1000>;
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 					interrupts = <6>;
..
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@@ -132,7 +174,7 @@
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 					clock-names = "uartclk", "apb_pclk";
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 				};
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-				v2m_serial2: uart@b0000 {
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+				v2m_serial2: serial@b0000 {
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 					compatible = "arm,pl011", "arm,primecell";
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 					reg = <0x0b0000 0x1000>;
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 					interrupts = <7>;
..
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@@ -140,7 +182,7 @@
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 					clock-names = "uartclk", "apb_pclk";
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 				};
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-				v2m_serial3: uart@c0000 {
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+				v2m_serial3: serial@c0000 {
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 					compatible = "arm,pl011", "arm,primecell";
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 					reg = <0x0c0000 0x1000>;
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 					interrupts = <8>;
..
..
@@ -153,7 +195,7 @@
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 					reg = <0x0f0000 0x1000>;
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 					interrupts = <0>;
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 					clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
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-					clock-names = "wdogclk", "apb_pclk";
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+					clock-names = "wdog_clk", "apb_pclk";
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 				};
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 				v2m_timer01: timer@110000 {
..
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@@ -172,6 +214,12 @@
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 					clock-names = "timclken1", "timclken2", "apb_pclk";
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 				};
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+				virtio-block@130000 {
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+					compatible = "virtio,mmio";
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+					reg = <0x130000 0x200>;
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+					interrupts = <42>;
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+				};
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+
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 				rtc@170000 {
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 					compatible = "arm,pl031", "arm,primecell";
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 					reg = <0x170000 0x1000>;
..
..
@@ -187,91 +235,14 @@
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 					interrupts = <14>;
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 					clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
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 					clock-names = "clcdclk", "apb_pclk";
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-					arm,pl11x,framebuffer = <0x18000000 0x00180000>;
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-					memory-region = <&v2m_video_ram>;
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-					max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
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+					memory-region = <&vram>;
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 					port {
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-						v2m_clcd_pads: endpoint {
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-							remote-endpoint = <&v2m_clcd_panel>;
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+						clcd_pads: endpoint {
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+							remote-endpoint = <&panel_in>;
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 							arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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 						};
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 					};
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-
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-					panel {
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-						compatible = "panel-dpi";
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-
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-						port {
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-							v2m_clcd_panel: endpoint {
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-								remote-endpoint = <&v2m_clcd_pads>;
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-							};
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-						};
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-
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-						panel-timing {
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-							clock-frequency = <63500127>;
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-							hactive = <1024>;
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-							hback-porch = <152>;
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-							hfront-porch = <48>;
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-							hsync-len = <104>;
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-							vactive = <768>;
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-							vback-porch = <23>;
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-							vfront-porch = <3>;
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-							vsync-len = <4>;
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-						};
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-					};
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-				};
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-
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-				virtio-block@130000 {
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-					compatible = "virtio,mmio";
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-					reg = <0x130000 0x200>;
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-					interrupts = <42>;
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-				};
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-			};
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-
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-			v2m_fixed_3v3: v2m-3v3 {
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-				compatible = "regulator-fixed";
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-				regulator-name = "3V3";
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-				regulator-min-microvolt = <3300000>;
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-				regulator-max-microvolt = <3300000>;
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-				regulator-always-on;
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-			};
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-
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-			mcc {
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-				compatible = "arm,vexpress,config-bus";
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-				arm,vexpress,config-bridge = <&v2m_sysreg>;
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-
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-				v2m_oscclk1: oscclk1 {
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-					/* CLCD clock */
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-					compatible = "arm,vexpress-osc";
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-					arm,vexpress-sysreg,func = <1 1>;
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-					freq-range = <23750000 63500000>;
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-					#clock-cells = <0>;
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-					clock-output-names = "v2m:oscclk1";
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-				};
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-
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-				reset {
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-					compatible = "arm,vexpress-reset";
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-					arm,vexpress-sysreg,func = <5 0>;
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-				};
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-
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-				muxfpga {
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-					compatible = "arm,vexpress-muxfpga";
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-					arm,vexpress-sysreg,func = <7 0>;
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-				};
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-
262
-				shutdown {
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-					compatible = "arm,vexpress-shutdown";
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-					arm,vexpress-sysreg,func = <8 0>;
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-				};
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-
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-				reboot {
268
-					compatible = "arm,vexpress-reboot";
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-					arm,vexpress-sysreg,func = <9 0>;
270
-				};
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-
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-				dvimode {
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-					compatible = "arm,vexpress-dvimode";
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-					arm,vexpress-sysreg,func = <11 0>;
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 				};
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 			};
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 		};