.. | .. |
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50 | 50 | int ret; |
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51 | 51 | u32 val; |
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52 | 52 | |
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53 | | - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) |
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| 53 | + if (!access_ok(uaddr, sizeof(u32))) |
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54 | 54 | return -EFAULT; |
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55 | 55 | |
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56 | 56 | smp_mb(); |
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.. | .. |
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104 | 104 | int ret = 0; |
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105 | 105 | u32 val; |
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106 | 106 | |
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107 | | - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) |
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| 107 | + if (!access_ok(uaddr, sizeof(u32))) |
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108 | 108 | return -EFAULT; |
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109 | 109 | |
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110 | 110 | preempt_disable(); |
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111 | 111 | __ua_flags = uaccess_save_and_enable(); |
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112 | 112 | __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" |
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| 113 | + " .syntax unified\n" |
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113 | 114 | "1: " TUSER(ldr) " %1, [%4]\n" |
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114 | 115 | " teq %1, %2\n" |
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115 | 116 | " it eq @ explicit IT needed for the 2b label\n" |
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116 | | - "2: " TUSER(streq) " %3, [%4]\n" |
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| 117 | + "2: " TUSERCOND(str, eq) " %3, [%4]\n" |
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117 | 118 | __futex_atomic_ex_table("%5") |
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118 | 119 | : "+r" (ret), "=&r" (val) |
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119 | 120 | : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT) |
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.. | .. |
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133 | 134 | { |
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134 | 135 | int oldval = 0, ret, tmp; |
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135 | 136 | |
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| 137 | + if (!access_ok(uaddr, sizeof(u32))) |
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| 138 | + return -EFAULT; |
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| 139 | + |
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136 | 140 | #ifndef CONFIG_SMP |
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137 | 141 | preempt_disable(); |
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138 | 142 | #endif |
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139 | | - pagefault_disable(); |
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140 | 143 | |
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141 | 144 | switch (op) { |
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142 | 145 | case FUTEX_OP_SET: |
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.. | .. |
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158 | 161 | ret = -ENOSYS; |
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159 | 162 | } |
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160 | 163 | |
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161 | | - pagefault_enable(); |
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162 | 164 | #ifndef CONFIG_SMP |
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163 | 165 | preempt_enable(); |
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164 | 166 | #endif |
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