.. | .. |
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8 | 8 | #include <dt-bindings/gpio/gpio.h> |
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9 | 9 | #include <dt-bindings/input/input.h> |
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10 | 10 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
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| 11 | +#include <dt-bindings/reset/imx7-reset.h> |
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11 | 12 | #include "imx7d-pinfunc.h" |
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12 | 13 | |
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13 | 14 | / { |
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.. | .. |
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52 | 53 | #address-cells = <1>; |
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53 | 54 | #size-cells = <0>; |
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54 | 55 | |
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| 56 | + idle-states { |
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| 57 | + entry-method = "psci"; |
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| 58 | + |
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| 59 | + cpu_sleep_wait: cpu-sleep-wait { |
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| 60 | + compatible = "arm,idle-state"; |
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| 61 | + arm,psci-suspend-param = <0x0010000>; |
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| 62 | + local-timer-stop; |
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| 63 | + entry-latency-us = <100>; |
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| 64 | + exit-latency-us = <50>; |
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| 65 | + min-residency-us = <1000>; |
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| 66 | + }; |
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| 67 | + }; |
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| 68 | + |
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55 | 69 | cpu0: cpu@0 { |
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56 | 70 | compatible = "arm,cortex-a7"; |
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57 | 71 | device_type = "cpu"; |
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.. | .. |
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59 | 73 | clock-frequency = <792000000>; |
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60 | 74 | clock-latency = <61036>; /* two CLK32 periods */ |
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61 | 75 | clocks = <&clks IMX7D_CLK_ARM>; |
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| 76 | + cpu-idle-states = <&cpu_sleep_wait>; |
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62 | 77 | }; |
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63 | 78 | }; |
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64 | 79 | |
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.. | .. |
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87 | 102 | compatible = "usb-nop-xceiv"; |
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88 | 103 | clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>; |
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89 | 104 | clock-names = "main_clk"; |
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| 105 | + power-domains = <&pgc_hsic_phy>; |
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90 | 106 | #phy-cells = <0>; |
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91 | 107 | }; |
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92 | 108 | |
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.. | .. |
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102 | 118 | * non-configurable replicators don't show up on the |
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103 | 119 | * AMBA bus. As such no need to add "arm,primecell" |
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104 | 120 | */ |
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105 | | - compatible = "arm,coresight-replicator"; |
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| 121 | + compatible = "arm,coresight-static-replicator"; |
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106 | 122 | |
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107 | | - ports { |
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| 123 | + out-ports { |
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108 | 124 | #address-cells = <1>; |
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109 | 125 | #size-cells = <0>; |
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110 | 126 | /* replicator output ports */ |
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.. | .. |
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121 | 137 | remote-endpoint = <&etr_in_port>; |
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122 | 138 | }; |
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123 | 139 | }; |
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| 140 | + }; |
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124 | 141 | |
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125 | | - /* replicator input port */ |
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126 | | - port@2 { |
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127 | | - reg = <0>; |
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| 142 | + in-ports { |
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| 143 | + port { |
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128 | 144 | replicator_in_port0: endpoint { |
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129 | | - slave-mode; |
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130 | 145 | remote-endpoint = <&etf_out_port>; |
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131 | 146 | }; |
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132 | 147 | }; |
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133 | 148 | }; |
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134 | 149 | }; |
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135 | 150 | |
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136 | | - tempmon: tempmon { |
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137 | | - compatible = "fsl,imx7d-tempmon"; |
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138 | | - interrupt-parent = <&gpc>; |
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139 | | - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
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140 | | - fsl,tempmon =<&anatop>; |
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141 | | - nvmem-cells = <&tempmon_calib>, |
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142 | | - <&tempmon_temp_grade>; |
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143 | | - nvmem-cell-names = "calib", "temp_grade"; |
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144 | | - clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>; |
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145 | | - }; |
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146 | | - |
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147 | 151 | timer { |
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148 | 152 | compatible = "arm,armv7-timer"; |
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149 | 153 | interrupt-parent = <&intc>; |
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150 | | - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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151 | | - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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152 | | - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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153 | | - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
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| 154 | + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, |
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| 155 | + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, |
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| 156 | + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, |
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| 157 | + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; |
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154 | 158 | }; |
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155 | 159 | |
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156 | 160 | soc { |
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.. | .. |
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161 | 165 | ranges; |
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162 | 166 | |
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163 | 167 | funnel@30041000 { |
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164 | | - compatible = "arm,coresight-funnel", "arm,primecell"; |
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| 168 | + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; |
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165 | 169 | reg = <0x30041000 0x1000>; |
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166 | 170 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
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167 | 171 | clock-names = "apb_pclk"; |
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168 | 172 | |
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169 | | - ca_funnel_ports: ports { |
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170 | | - #address-cells = <1>; |
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171 | | - #size-cells = <0>; |
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172 | | - |
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173 | | - /* funnel input ports */ |
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174 | | - port@0 { |
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175 | | - reg = <0>; |
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| 173 | + ca_funnel_in_ports: in-ports { |
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| 174 | + port { |
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176 | 175 | ca_funnel_in_port0: endpoint { |
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177 | | - slave-mode; |
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178 | 176 | remote-endpoint = <&etm0_out_port>; |
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179 | 177 | }; |
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180 | 178 | }; |
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181 | 179 | |
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182 | | - /* funnel output port */ |
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183 | | - port@2 { |
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184 | | - reg = <0>; |
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| 180 | + /* the other input ports are not connect to anything */ |
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| 181 | + }; |
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| 182 | + |
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| 183 | + out-ports { |
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| 184 | + port { |
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185 | 185 | ca_funnel_out_port0: endpoint { |
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186 | 186 | remote-endpoint = <&hugo_funnel_in_port0>; |
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187 | 187 | }; |
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188 | 188 | }; |
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189 | 189 | |
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190 | | - /* the other input ports are not connect to anything */ |
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191 | 190 | }; |
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192 | 191 | }; |
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193 | 192 | |
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.. | .. |
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198 | 197 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
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199 | 198 | clock-names = "apb_pclk"; |
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200 | 199 | |
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201 | | - port { |
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202 | | - etm0_out_port: endpoint { |
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203 | | - remote-endpoint = <&ca_funnel_in_port0>; |
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| 200 | + out-ports { |
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| 201 | + port { |
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| 202 | + etm0_out_port: endpoint { |
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| 203 | + remote-endpoint = <&ca_funnel_in_port0>; |
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| 204 | + }; |
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204 | 205 | }; |
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205 | 206 | }; |
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206 | 207 | }; |
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207 | 208 | |
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208 | 209 | funnel@30083000 { |
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209 | | - compatible = "arm,coresight-funnel", "arm,primecell"; |
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| 210 | + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; |
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210 | 211 | reg = <0x30083000 0x1000>; |
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211 | 212 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
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212 | 213 | clock-names = "apb_pclk"; |
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213 | 214 | |
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214 | | - ports { |
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| 215 | + in-ports { |
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215 | 216 | #address-cells = <1>; |
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216 | 217 | #size-cells = <0>; |
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217 | 218 | |
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218 | | - /* funnel input ports */ |
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219 | 219 | port@0 { |
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220 | 220 | reg = <0>; |
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221 | 221 | hugo_funnel_in_port0: endpoint { |
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222 | | - slave-mode; |
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223 | 222 | remote-endpoint = <&ca_funnel_out_port0>; |
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224 | 223 | }; |
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225 | 224 | }; |
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.. | .. |
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227 | 226 | port@1 { |
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228 | 227 | reg = <1>; |
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229 | 228 | hugo_funnel_in_port1: endpoint { |
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230 | | - slave-mode; /* M4 input */ |
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| 229 | + /* M4 input */ |
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231 | 230 | }; |
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232 | 231 | }; |
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| 232 | + /* the other input ports are not connect to anything */ |
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| 233 | + }; |
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233 | 234 | |
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234 | | - port@2 { |
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235 | | - reg = <0>; |
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| 235 | + out-ports { |
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| 236 | + port { |
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236 | 237 | hugo_funnel_out_port0: endpoint { |
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237 | 238 | remote-endpoint = <&etf_in_port>; |
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238 | 239 | }; |
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239 | 240 | }; |
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240 | | - |
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241 | | - /* the other input ports are not connect to anything */ |
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242 | 241 | }; |
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243 | 242 | }; |
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244 | 243 | |
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.. | .. |
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248 | 247 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
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249 | 248 | clock-names = "apb_pclk"; |
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250 | 249 | |
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251 | | - ports { |
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252 | | - #address-cells = <1>; |
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253 | | - #size-cells = <0>; |
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254 | | - |
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255 | | - port@0 { |
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256 | | - reg = <0>; |
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| 250 | + in-ports { |
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| 251 | + port { |
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257 | 252 | etf_in_port: endpoint { |
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258 | | - slave-mode; |
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259 | 253 | remote-endpoint = <&hugo_funnel_out_port0>; |
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260 | 254 | }; |
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261 | 255 | }; |
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| 256 | + }; |
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262 | 257 | |
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263 | | - port@1 { |
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264 | | - reg = <0>; |
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| 258 | + out-ports { |
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| 259 | + port { |
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265 | 260 | etf_out_port: endpoint { |
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266 | 261 | remote-endpoint = <&replicator_in_port0>; |
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267 | 262 | }; |
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.. | .. |
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275 | 270 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
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276 | 271 | clock-names = "apb_pclk"; |
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277 | 272 | |
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278 | | - port { |
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279 | | - etr_in_port: endpoint { |
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280 | | - slave-mode; |
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281 | | - remote-endpoint = <&replicator_out_port1>; |
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| 273 | + in-ports { |
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| 274 | + port { |
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| 275 | + etr_in_port: endpoint { |
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| 276 | + remote-endpoint = <&replicator_out_port1>; |
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| 277 | + }; |
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282 | 278 | }; |
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283 | 279 | }; |
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284 | 280 | }; |
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.. | .. |
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289 | 285 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
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290 | 286 | clock-names = "apb_pclk"; |
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291 | 287 | |
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292 | | - port { |
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293 | | - tpiu_in_port: endpoint { |
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294 | | - slave-mode; |
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295 | | - remote-endpoint = <&replicator_out_port0>; |
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| 288 | + in-ports { |
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| 289 | + port { |
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| 290 | + tpiu_in_port: endpoint { |
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| 291 | + remote-endpoint = <&replicator_out_port0>; |
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| 292 | + }; |
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296 | 293 | }; |
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297 | 294 | }; |
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298 | 295 | }; |
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299 | 296 | |
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300 | 297 | intc: interrupt-controller@31001000 { |
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301 | 298 | compatible = "arm,cortex-a7-gic"; |
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302 | | - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
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| 299 | + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; |
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303 | 300 | #interrupt-cells = <3>; |
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304 | 301 | interrupt-controller; |
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305 | 302 | interrupt-parent = <&intc>; |
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.. | .. |
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309 | 306 | <0x31006000 0x2000>; |
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310 | 307 | }; |
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311 | 308 | |
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312 | | - aips1: aips-bus@30000000 { |
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| 309 | + aips1: bus@30000000 { |
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313 | 310 | compatible = "fsl,aips-bus", "simple-bus"; |
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314 | 311 | #address-cells = <1>; |
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315 | 312 | #size-cells = <1>; |
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.. | .. |
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400 | 397 | gpio-ranges = <&iomuxc 0 139 16>; |
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401 | 398 | }; |
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402 | 399 | |
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403 | | - wdog1: wdog@30280000 { |
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| 400 | + wdog1: watchdog@30280000 { |
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404 | 401 | compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt"; |
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405 | 402 | reg = <0x30280000 0x10000>; |
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406 | 403 | interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; |
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407 | 404 | clocks = <&clks IMX7D_WDOG1_ROOT_CLK>; |
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408 | 405 | }; |
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409 | 406 | |
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410 | | - wdog2: wdog@30290000 { |
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| 407 | + wdog2: watchdog@30290000 { |
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411 | 408 | compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt"; |
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412 | 409 | reg = <0x30290000 0x10000>; |
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413 | 410 | interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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415 | 412 | status = "disabled"; |
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416 | 413 | }; |
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417 | 414 | |
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418 | | - wdog3: wdog@302a0000 { |
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| 415 | + wdog3: watchdog@302a0000 { |
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419 | 416 | compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt"; |
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420 | 417 | reg = <0x302a0000 0x10000>; |
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421 | 418 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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423 | 420 | status = "disabled"; |
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424 | 421 | }; |
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425 | 422 | |
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426 | | - wdog4: wdog@302b0000 { |
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| 423 | + wdog4: watchdog@302b0000 { |
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427 | 424 | compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt"; |
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428 | 425 | reg = <0x302b0000 0x10000>; |
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429 | 426 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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437 | 434 | fsl,input-sel = <&iomuxc>; |
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438 | 435 | }; |
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439 | 436 | |
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440 | | - gpt1: gpt@302d0000 { |
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| 437 | + gpt1: timer@302d0000 { |
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441 | 438 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
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442 | 439 | reg = <0x302d0000 0x10000>; |
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443 | 440 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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446 | 443 | clock-names = "ipg", "per"; |
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447 | 444 | }; |
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448 | 445 | |
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449 | | - gpt2: gpt@302e0000 { |
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| 446 | + gpt2: timer@302e0000 { |
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450 | 447 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
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451 | 448 | reg = <0x302e0000 0x10000>; |
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452 | 449 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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456 | 453 | status = "disabled"; |
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457 | 454 | }; |
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458 | 455 | |
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459 | | - gpt3: gpt@302f0000 { |
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| 456 | + gpt3: timer@302f0000 { |
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460 | 457 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
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461 | 458 | reg = <0x302f0000 0x10000>; |
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462 | 459 | interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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466 | 463 | status = "disabled"; |
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467 | 464 | }; |
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468 | 465 | |
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469 | | - gpt4: gpt@30300000 { |
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| 466 | + gpt4: timer@30300000 { |
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470 | 467 | compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
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471 | 468 | reg = <0x30300000 0x10000>; |
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472 | 469 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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476 | 473 | status = "disabled"; |
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477 | 474 | }; |
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478 | 475 | |
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479 | | - kpp: kpp@30320000 { |
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| 476 | + kpp: keypad@30320000 { |
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480 | 477 | compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp"; |
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481 | 478 | reg = <0x30320000 0x10000>; |
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482 | 479 | interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; |
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.. | .. |
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484 | 481 | status = "disabled"; |
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485 | 482 | }; |
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486 | 483 | |
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487 | | - iomuxc: iomuxc@30330000 { |
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| 484 | + iomuxc: pinctrl@30330000 { |
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488 | 485 | compatible = "fsl,imx7d-iomuxc"; |
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489 | 486 | reg = <0x30330000 0x10000>; |
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490 | 487 | }; |
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491 | 488 | |
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492 | 489 | gpr: iomuxc-gpr@30340000 { |
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493 | 490 | compatible = "fsl,imx7d-iomuxc-gpr", |
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494 | | - "fsl,imx6q-iomuxc-gpr", "syscon"; |
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| 491 | + "fsl,imx6q-iomuxc-gpr", "syscon", |
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| 492 | + "simple-mfd"; |
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495 | 493 | reg = <0x30340000 0x10000>; |
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| 494 | + |
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| 495 | + mux: mux-controller { |
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| 496 | + compatible = "mmio-mux"; |
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| 497 | + #mux-control-cells = <0>; |
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| 498 | + mux-reg-masks = <0x14 0x00000010>; |
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| 499 | + }; |
---|
| 500 | + |
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| 501 | + video_mux: csi-mux { |
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| 502 | + compatible = "video-mux"; |
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| 503 | + mux-controls = <&mux 0>; |
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| 504 | + #address-cells = <1>; |
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| 505 | + #size-cells = <0>; |
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| 506 | + status = "disabled"; |
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| 507 | + |
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| 508 | + port@0 { |
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| 509 | + reg = <0>; |
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| 510 | + }; |
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| 511 | + |
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| 512 | + port@1 { |
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| 513 | + reg = <1>; |
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| 514 | + |
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| 515 | + csi_mux_from_mipi_vc0: endpoint { |
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| 516 | + remote-endpoint = <&mipi_vc0_to_csi_mux>; |
---|
| 517 | + }; |
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| 518 | + }; |
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| 519 | + |
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| 520 | + port@2 { |
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| 521 | + reg = <2>; |
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| 522 | + |
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| 523 | + csi_mux_to_csi: endpoint { |
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| 524 | + remote-endpoint = <&csi_from_csi_mux>; |
---|
| 525 | + }; |
---|
| 526 | + }; |
---|
| 527 | + }; |
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496 | 528 | }; |
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497 | 529 | |
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498 | | - ocotp: ocotp-ctrl@30350000 { |
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| 530 | + ocotp: efuse@30350000 { |
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499 | 531 | #address-cells = <1>; |
---|
500 | 532 | #size-cells = <1>; |
---|
501 | 533 | compatible = "fsl,imx7d-ocotp", "syscon"; |
---|
.. | .. |
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506 | 538 | reg = <0x3c 0x4>; |
---|
507 | 539 | }; |
---|
508 | 540 | |
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509 | | - tempmon_temp_grade: temp-grade@10 { |
---|
| 541 | + fuse_grade: fuse-grade@10 { |
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510 | 542 | reg = <0x10 0x4>; |
---|
511 | 543 | }; |
---|
512 | 544 | }; |
---|
513 | 545 | |
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514 | 546 | anatop: anatop@30360000 { |
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515 | 547 | compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop", |
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516 | | - "syscon", "simple-bus"; |
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| 548 | + "syscon", "simple-mfd"; |
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517 | 549 | reg = <0x30360000 0x10000>; |
---|
518 | 550 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, |
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519 | 551 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; |
---|
.. | .. |
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545 | 577 | anatop-max-voltage = <1300000>; |
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546 | 578 | anatop-enable-bit = <0>; |
---|
547 | 579 | }; |
---|
| 580 | + |
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| 581 | + tempmon: tempmon { |
---|
| 582 | + compatible = "fsl,imx7d-tempmon"; |
---|
| 583 | + interrupt-parent = <&gpc>; |
---|
| 584 | + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 585 | + fsl,tempmon = <&anatop>; |
---|
| 586 | + nvmem-cells = <&tempmon_calib>, <&fuse_grade>; |
---|
| 587 | + nvmem-cell-names = "calib", "temp_grade"; |
---|
| 588 | + clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>; |
---|
| 589 | + }; |
---|
548 | 590 | }; |
---|
549 | 591 | |
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550 | 592 | snvs: snvs@30370000 { |
---|
.. | .. |
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561 | 603 | clock-names = "snvs-rtc"; |
---|
562 | 604 | }; |
---|
563 | 605 | |
---|
564 | | - snvs_poweroff: snvs-poweroff { |
---|
565 | | - compatible = "syscon-poweroff"; |
---|
566 | | - regmap = <&snvs>; |
---|
567 | | - offset = <0x38>; |
---|
568 | | - value = <0x60>; |
---|
569 | | - mask = <0x60>; |
---|
570 | | - }; |
---|
571 | | - |
---|
572 | 606 | snvs_pwrkey: snvs-powerkey { |
---|
573 | 607 | compatible = "fsl,sec-v4.0-pwrkey"; |
---|
574 | 608 | regmap = <&snvs>; |
---|
575 | 609 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 610 | + clocks = <&clks IMX7D_SNVS_CLK>; |
---|
| 611 | + clock-names = "snvs-pwrkey"; |
---|
576 | 612 | linux,keycode = <KEY_POWER>; |
---|
577 | 613 | wakeup-source; |
---|
| 614 | + status = "disabled"; |
---|
578 | 615 | }; |
---|
579 | 616 | }; |
---|
580 | 617 | |
---|
581 | | - clks: ccm@30380000 { |
---|
| 618 | + clks: clock-controller@30380000 { |
---|
582 | 619 | compatible = "fsl,imx7d-ccm"; |
---|
583 | 620 | reg = <0x30380000 0x10000>; |
---|
584 | 621 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, |
---|
.. | .. |
---|
588 | 625 | clock-names = "ckil", "osc"; |
---|
589 | 626 | }; |
---|
590 | 627 | |
---|
591 | | - src: src@30390000 { |
---|
| 628 | + src: reset-controller@30390000 { |
---|
592 | 629 | compatible = "fsl,imx7d-src", "syscon"; |
---|
593 | 630 | reg = <0x30390000 0x10000>; |
---|
594 | 631 | interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; |
---|
.. | .. |
---|
608 | 645 | #address-cells = <1>; |
---|
609 | 646 | #size-cells = <0>; |
---|
610 | 647 | |
---|
611 | | - pgc_pcie_phy: pgc-power-domain@1 { |
---|
| 648 | + pgc_mipi_phy: power-domain@0 { |
---|
| 649 | + #power-domain-cells = <0>; |
---|
| 650 | + reg = <0>; |
---|
| 651 | + power-supply = <®_1p0d>; |
---|
| 652 | + }; |
---|
| 653 | + |
---|
| 654 | + pgc_pcie_phy: power-domain@1 { |
---|
612 | 655 | #power-domain-cells = <0>; |
---|
613 | 656 | reg = <1>; |
---|
614 | 657 | power-supply = <®_1p0d>; |
---|
| 658 | + }; |
---|
| 659 | + |
---|
| 660 | + pgc_hsic_phy: power-domain@2 { |
---|
| 661 | + #power-domain-cells = <0>; |
---|
| 662 | + reg = <2>; |
---|
| 663 | + power-supply = <®_1p2>; |
---|
615 | 664 | }; |
---|
616 | 665 | }; |
---|
617 | 666 | }; |
---|
618 | 667 | }; |
---|
619 | 668 | |
---|
620 | | - aips2: aips-bus@30400000 { |
---|
| 669 | + aips2: bus@30400000 { |
---|
621 | 670 | compatible = "fsl,aips-bus", "simple-bus"; |
---|
622 | 671 | #address-cells = <1>; |
---|
623 | 672 | #size-cells = <1>; |
---|
.. | .. |
---|
630 | 679 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; |
---|
631 | 680 | clocks = <&clks IMX7D_ADC_ROOT_CLK>; |
---|
632 | 681 | clock-names = "adc"; |
---|
| 682 | + #io-channel-cells = <1>; |
---|
633 | 683 | status = "disabled"; |
---|
634 | 684 | }; |
---|
635 | 685 | |
---|
.. | .. |
---|
639 | 689 | interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; |
---|
640 | 690 | clocks = <&clks IMX7D_ADC_ROOT_CLK>; |
---|
641 | 691 | clock-names = "adc"; |
---|
| 692 | + #io-channel-cells = <1>; |
---|
642 | 693 | status = "disabled"; |
---|
643 | 694 | }; |
---|
644 | 695 | |
---|
645 | | - ecspi4: ecspi@30630000 { |
---|
| 696 | + ecspi4: spi@30630000 { |
---|
646 | 697 | #address-cells = <1>; |
---|
647 | 698 | #size-cells = <0>; |
---|
648 | 699 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
---|
.. | .. |
---|
698 | 749 | status = "disabled"; |
---|
699 | 750 | }; |
---|
700 | 751 | |
---|
| 752 | + csi: csi@30710000 { |
---|
| 753 | + compatible = "fsl,imx7-csi"; |
---|
| 754 | + reg = <0x30710000 0x10000>; |
---|
| 755 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 756 | + clocks = <&clks IMX7D_CLK_DUMMY>, |
---|
| 757 | + <&clks IMX7D_CSI_MCLK_ROOT_CLK>, |
---|
| 758 | + <&clks IMX7D_CLK_DUMMY>; |
---|
| 759 | + clock-names = "axi", "mclk", "dcic"; |
---|
| 760 | + status = "disabled"; |
---|
| 761 | + |
---|
| 762 | + port { |
---|
| 763 | + csi_from_csi_mux: endpoint { |
---|
| 764 | + remote-endpoint = <&csi_mux_to_csi>; |
---|
| 765 | + }; |
---|
| 766 | + }; |
---|
| 767 | + }; |
---|
| 768 | + |
---|
701 | 769 | lcdif: lcdif@30730000 { |
---|
702 | 770 | compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif"; |
---|
703 | 771 | reg = <0x30730000 0x10000>; |
---|
.. | .. |
---|
707 | 775 | clock-names = "pix", "axi"; |
---|
708 | 776 | status = "disabled"; |
---|
709 | 777 | }; |
---|
| 778 | + |
---|
| 779 | + mipi_csi: mipi-csi@30750000 { |
---|
| 780 | + compatible = "fsl,imx7-mipi-csi2"; |
---|
| 781 | + reg = <0x30750000 0x10000>; |
---|
| 782 | + #address-cells = <1>; |
---|
| 783 | + #size-cells = <0>; |
---|
| 784 | + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 785 | + clocks = <&clks IMX7D_IPG_ROOT_CLK>, |
---|
| 786 | + <&clks IMX7D_MIPI_CSI_ROOT_CLK>, |
---|
| 787 | + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; |
---|
| 788 | + clock-names = "pclk", "wrap", "phy"; |
---|
| 789 | + power-domains = <&pgc_mipi_phy>; |
---|
| 790 | + phy-supply = <®_1p0d>; |
---|
| 791 | + resets = <&src IMX7_RESET_MIPI_PHY_MRST>; |
---|
| 792 | + reset-names = "mrst"; |
---|
| 793 | + status = "disabled"; |
---|
| 794 | + |
---|
| 795 | + port@0 { |
---|
| 796 | + reg = <0>; |
---|
| 797 | + }; |
---|
| 798 | + |
---|
| 799 | + port@1 { |
---|
| 800 | + reg = <1>; |
---|
| 801 | + |
---|
| 802 | + mipi_vc0_to_csi_mux: endpoint { |
---|
| 803 | + remote-endpoint = <&csi_mux_from_mipi_vc0>; |
---|
| 804 | + }; |
---|
| 805 | + }; |
---|
| 806 | + }; |
---|
710 | 807 | }; |
---|
711 | 808 | |
---|
712 | | - aips3: aips-bus@30800000 { |
---|
| 809 | + aips3: bus@30800000 { |
---|
713 | 810 | compatible = "fsl,aips-bus", "simple-bus"; |
---|
714 | 811 | #address-cells = <1>; |
---|
715 | 812 | #size-cells = <1>; |
---|
.. | .. |
---|
723 | 820 | reg = <0x30800000 0x100000>; |
---|
724 | 821 | ranges; |
---|
725 | 822 | |
---|
726 | | - ecspi1: ecspi@30820000 { |
---|
| 823 | + ecspi1: spi@30820000 { |
---|
727 | 824 | #address-cells = <1>; |
---|
728 | 825 | #size-cells = <0>; |
---|
729 | 826 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
---|
.. | .. |
---|
735 | 832 | status = "disabled"; |
---|
736 | 833 | }; |
---|
737 | 834 | |
---|
738 | | - ecspi2: ecspi@30830000 { |
---|
| 835 | + ecspi2: spi@30830000 { |
---|
739 | 836 | #address-cells = <1>; |
---|
740 | 837 | #size-cells = <0>; |
---|
741 | 838 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
---|
.. | .. |
---|
747 | 844 | status = "disabled"; |
---|
748 | 845 | }; |
---|
749 | 846 | |
---|
750 | | - ecspi3: ecspi@30840000 { |
---|
| 847 | + ecspi3: spi@30840000 { |
---|
751 | 848 | #address-cells = <1>; |
---|
752 | 849 | #size-cells = <0>; |
---|
753 | 850 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
---|
.. | .. |
---|
838 | 935 | }; |
---|
839 | 936 | }; |
---|
840 | 937 | |
---|
841 | | - crypto: caam@30900000 { |
---|
| 938 | + crypto: crypto@30900000 { |
---|
842 | 939 | compatible = "fsl,sec-v4.0"; |
---|
843 | 940 | #address-cells = <1>; |
---|
844 | 941 | #size-cells = <1>; |
---|
.. | .. |
---|
849 | 946 | <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>; |
---|
850 | 947 | clock-names = "ipg", "aclk"; |
---|
851 | 948 | |
---|
852 | | - sec_jr0: jr0@1000 { |
---|
| 949 | + sec_jr0: jr@1000 { |
---|
853 | 950 | compatible = "fsl,sec-v4.0-job-ring"; |
---|
854 | 951 | reg = <0x1000 0x1000>; |
---|
855 | 952 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
---|
856 | 953 | }; |
---|
857 | 954 | |
---|
858 | | - sec_jr1: jr1@2000 { |
---|
| 955 | + sec_jr1: jr@2000 { |
---|
859 | 956 | compatible = "fsl,sec-v4.0-job-ring"; |
---|
860 | 957 | reg = <0x2000 0x1000>; |
---|
861 | 958 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
---|
862 | 959 | }; |
---|
863 | 960 | |
---|
864 | | - sec_jr2: jr1@3000 { |
---|
| 961 | + sec_jr2: jr@3000 { |
---|
865 | 962 | compatible = "fsl,sec-v4.0-job-ring"; |
---|
866 | 963 | reg = <0x3000 0x1000>; |
---|
867 | 964 | interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; |
---|
.. | .. |
---|
875 | 972 | clocks = <&clks IMX7D_CLK_DUMMY>, |
---|
876 | 973 | <&clks IMX7D_CAN1_ROOT_CLK>; |
---|
877 | 974 | clock-names = "ipg", "per"; |
---|
| 975 | + fsl,stop-mode = <&gpr 0x10 1 0x10 17>; |
---|
878 | 976 | status = "disabled"; |
---|
879 | 977 | }; |
---|
880 | 978 | |
---|
.. | .. |
---|
885 | 983 | clocks = <&clks IMX7D_CLK_DUMMY>, |
---|
886 | 984 | <&clks IMX7D_CAN2_ROOT_CLK>; |
---|
887 | 985 | clock-names = "ipg", "per"; |
---|
| 986 | + fsl,stop-mode = <&gpr 0x10 2 0x10 18>; |
---|
888 | 987 | status = "disabled"; |
---|
889 | 988 | }; |
---|
890 | 989 | |
---|
.. | .. |
---|
972 | 1071 | status = "disabled"; |
---|
973 | 1072 | }; |
---|
974 | 1073 | |
---|
| 1074 | + mu0a: mailbox@30aa0000 { |
---|
| 1075 | + compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu"; |
---|
| 1076 | + reg = <0x30aa0000 0x10000>; |
---|
| 1077 | + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 1078 | + clocks = <&clks IMX7D_MU_ROOT_CLK>; |
---|
| 1079 | + #mbox-cells = <2>; |
---|
| 1080 | + status = "disabled"; |
---|
| 1081 | + }; |
---|
| 1082 | + |
---|
| 1083 | + mu0b: mailbox@30ab0000 { |
---|
| 1084 | + compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu"; |
---|
| 1085 | + reg = <0x30ab0000 0x10000>; |
---|
| 1086 | + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 1087 | + clocks = <&clks IMX7D_MU_ROOT_CLK>; |
---|
| 1088 | + #mbox-cells = <2>; |
---|
| 1089 | + fsl,mu-side-b; |
---|
| 1090 | + status = "disabled"; |
---|
| 1091 | + }; |
---|
| 1092 | + |
---|
975 | 1093 | usbotg1: usb@30b10000 { |
---|
976 | 1094 | compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; |
---|
977 | 1095 | reg = <0x30b10000 0x200>; |
---|
.. | .. |
---|
1008 | 1126 | reg = <0x30b30200 0x200>; |
---|
1009 | 1127 | }; |
---|
1010 | 1128 | |
---|
1011 | | - usdhc1: usdhc@30b40000 { |
---|
| 1129 | + usdhc1: mmc@30b40000 { |
---|
1012 | 1130 | compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; |
---|
1013 | 1131 | reg = <0x30b40000 0x10000>; |
---|
1014 | 1132 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
---|
.. | .. |
---|
1020 | 1138 | status = "disabled"; |
---|
1021 | 1139 | }; |
---|
1022 | 1140 | |
---|
1023 | | - usdhc2: usdhc@30b50000 { |
---|
| 1141 | + usdhc2: mmc@30b50000 { |
---|
1024 | 1142 | compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; |
---|
1025 | 1143 | reg = <0x30b50000 0x10000>; |
---|
1026 | 1144 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
---|
.. | .. |
---|
1032 | 1150 | status = "disabled"; |
---|
1033 | 1151 | }; |
---|
1034 | 1152 | |
---|
1035 | | - usdhc3: usdhc@30b60000 { |
---|
| 1153 | + usdhc3: mmc@30b60000 { |
---|
1036 | 1154 | compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; |
---|
1037 | 1155 | reg = <0x30b60000 0x10000>; |
---|
1038 | 1156 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
---|
.. | .. |
---|
1041 | 1159 | <&clks IMX7D_USDHC3_ROOT_CLK>; |
---|
1042 | 1160 | clock-names = "ipg", "ahb", "per"; |
---|
1043 | 1161 | bus-width = <4>; |
---|
| 1162 | + status = "disabled"; |
---|
| 1163 | + }; |
---|
| 1164 | + |
---|
| 1165 | + qspi: spi@30bb0000 { |
---|
| 1166 | + compatible = "fsl,imx7d-qspi"; |
---|
| 1167 | + reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>; |
---|
| 1168 | + reg-names = "QuadSPI", "QuadSPI-memory"; |
---|
| 1169 | + #address-cells = <1>; |
---|
| 1170 | + #size-cells = <0>; |
---|
| 1171 | + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
---|
| 1172 | + clocks = <&clks IMX7D_QSPI_ROOT_CLK>, |
---|
| 1173 | + <&clks IMX7D_QSPI_ROOT_CLK>; |
---|
| 1174 | + clock-names = "qspi_en", "qspi"; |
---|
1044 | 1175 | status = "disabled"; |
---|
1045 | 1176 | }; |
---|
1046 | 1177 | |
---|
.. | .. |
---|
1070 | 1201 | <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>; |
---|
1071 | 1202 | clock-names = "ipg", "ahb", "ptp", |
---|
1072 | 1203 | "enet_clk_ref", "enet_out"; |
---|
1073 | | - fsl,num-tx-queues=<3>; |
---|
1074 | | - fsl,num-rx-queues=<3>; |
---|
| 1204 | + fsl,num-tx-queues = <3>; |
---|
| 1205 | + fsl,num-rx-queues = <3>; |
---|
| 1206 | + fsl,stop-mode = <&gpr 0x10 3>; |
---|
1075 | 1207 | status = "disabled"; |
---|
1076 | 1208 | }; |
---|
1077 | 1209 | }; |
---|
.. | .. |
---|
1089 | 1221 | clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>; |
---|
1090 | 1222 | }; |
---|
1091 | 1223 | |
---|
1092 | | - gpmi: gpmi-nand@33002000{ |
---|
| 1224 | + gpmi: nand-controller@33002000{ |
---|
1093 | 1225 | compatible = "fsl,imx7d-gpmi-nand"; |
---|
1094 | 1226 | #address-cells = <1>; |
---|
1095 | 1227 | #size-cells = <1>; |
---|