forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/arch/arm/boot/dts/imx7s.dtsi
....@@ -8,6 +8,7 @@
88 #include <dt-bindings/gpio/gpio.h>
99 #include <dt-bindings/input/input.h>
1010 #include <dt-bindings/interrupt-controller/arm-gic.h>
11
+#include <dt-bindings/reset/imx7-reset.h>
1112 #include "imx7d-pinfunc.h"
1213
1314 / {
....@@ -52,6 +53,19 @@
5253 #address-cells = <1>;
5354 #size-cells = <0>;
5455
56
+ idle-states {
57
+ entry-method = "psci";
58
+
59
+ cpu_sleep_wait: cpu-sleep-wait {
60
+ compatible = "arm,idle-state";
61
+ arm,psci-suspend-param = <0x0010000>;
62
+ local-timer-stop;
63
+ entry-latency-us = <100>;
64
+ exit-latency-us = <50>;
65
+ min-residency-us = <1000>;
66
+ };
67
+ };
68
+
5569 cpu0: cpu@0 {
5670 compatible = "arm,cortex-a7";
5771 device_type = "cpu";
....@@ -59,6 +73,7 @@
5973 clock-frequency = <792000000>;
6074 clock-latency = <61036>; /* two CLK32 periods */
6175 clocks = <&clks IMX7D_CLK_ARM>;
76
+ cpu-idle-states = <&cpu_sleep_wait>;
6277 };
6378 };
6479
....@@ -87,6 +102,7 @@
87102 compatible = "usb-nop-xceiv";
88103 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
89104 clock-names = "main_clk";
105
+ power-domains = <&pgc_hsic_phy>;
90106 #phy-cells = <0>;
91107 };
92108
....@@ -102,9 +118,9 @@
102118 * non-configurable replicators don't show up on the
103119 * AMBA bus. As such no need to add "arm,primecell"
104120 */
105
- compatible = "arm,coresight-replicator";
121
+ compatible = "arm,coresight-static-replicator";
106122
107
- ports {
123
+ out-ports {
108124 #address-cells = <1>;
109125 #size-cells = <0>;
110126 /* replicator output ports */
....@@ -121,36 +137,24 @@
121137 remote-endpoint = <&etr_in_port>;
122138 };
123139 };
140
+ };
124141
125
- /* replicator input port */
126
- port@2 {
127
- reg = <0>;
142
+ in-ports {
143
+ port {
128144 replicator_in_port0: endpoint {
129
- slave-mode;
130145 remote-endpoint = <&etf_out_port>;
131146 };
132147 };
133148 };
134149 };
135150
136
- tempmon: tempmon {
137
- compatible = "fsl,imx7d-tempmon";
138
- interrupt-parent = <&gpc>;
139
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
140
- fsl,tempmon =<&anatop>;
141
- nvmem-cells = <&tempmon_calib>,
142
- <&tempmon_temp_grade>;
143
- nvmem-cell-names = "calib", "temp_grade";
144
- clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
145
- };
146
-
147151 timer {
148152 compatible = "arm,armv7-timer";
149153 interrupt-parent = <&intc>;
150
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
151
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
152
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
153
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
154
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
155
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
156
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
157
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
154158 };
155159
156160 soc {
....@@ -161,33 +165,28 @@
161165 ranges;
162166
163167 funnel@30041000 {
164
- compatible = "arm,coresight-funnel", "arm,primecell";
168
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
165169 reg = <0x30041000 0x1000>;
166170 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
167171 clock-names = "apb_pclk";
168172
169
- ca_funnel_ports: ports {
170
- #address-cells = <1>;
171
- #size-cells = <0>;
172
-
173
- /* funnel input ports */
174
- port@0 {
175
- reg = <0>;
173
+ ca_funnel_in_ports: in-ports {
174
+ port {
176175 ca_funnel_in_port0: endpoint {
177
- slave-mode;
178176 remote-endpoint = <&etm0_out_port>;
179177 };
180178 };
181179
182
- /* funnel output port */
183
- port@2 {
184
- reg = <0>;
180
+ /* the other input ports are not connect to anything */
181
+ };
182
+
183
+ out-ports {
184
+ port {
185185 ca_funnel_out_port0: endpoint {
186186 remote-endpoint = <&hugo_funnel_in_port0>;
187187 };
188188 };
189189
190
- /* the other input ports are not connect to anything */
191190 };
192191 };
193192
....@@ -198,28 +197,28 @@
198197 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
199198 clock-names = "apb_pclk";
200199
201
- port {
202
- etm0_out_port: endpoint {
203
- remote-endpoint = <&ca_funnel_in_port0>;
200
+ out-ports {
201
+ port {
202
+ etm0_out_port: endpoint {
203
+ remote-endpoint = <&ca_funnel_in_port0>;
204
+ };
204205 };
205206 };
206207 };
207208
208209 funnel@30083000 {
209
- compatible = "arm,coresight-funnel", "arm,primecell";
210
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
210211 reg = <0x30083000 0x1000>;
211212 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
212213 clock-names = "apb_pclk";
213214
214
- ports {
215
+ in-ports {
215216 #address-cells = <1>;
216217 #size-cells = <0>;
217218
218
- /* funnel input ports */
219219 port@0 {
220220 reg = <0>;
221221 hugo_funnel_in_port0: endpoint {
222
- slave-mode;
223222 remote-endpoint = <&ca_funnel_out_port0>;
224223 };
225224 };
....@@ -227,18 +226,18 @@
227226 port@1 {
228227 reg = <1>;
229228 hugo_funnel_in_port1: endpoint {
230
- slave-mode; /* M4 input */
229
+ /* M4 input */
231230 };
232231 };
232
+ /* the other input ports are not connect to anything */
233
+ };
233234
234
- port@2 {
235
- reg = <0>;
235
+ out-ports {
236
+ port {
236237 hugo_funnel_out_port0: endpoint {
237238 remote-endpoint = <&etf_in_port>;
238239 };
239240 };
240
-
241
- /* the other input ports are not connect to anything */
242241 };
243242 };
244243
....@@ -248,20 +247,16 @@
248247 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
249248 clock-names = "apb_pclk";
250249
251
- ports {
252
- #address-cells = <1>;
253
- #size-cells = <0>;
254
-
255
- port@0 {
256
- reg = <0>;
250
+ in-ports {
251
+ port {
257252 etf_in_port: endpoint {
258
- slave-mode;
259253 remote-endpoint = <&hugo_funnel_out_port0>;
260254 };
261255 };
256
+ };
262257
263
- port@1 {
264
- reg = <0>;
258
+ out-ports {
259
+ port {
265260 etf_out_port: endpoint {
266261 remote-endpoint = <&replicator_in_port0>;
267262 };
....@@ -275,10 +270,11 @@
275270 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
276271 clock-names = "apb_pclk";
277272
278
- port {
279
- etr_in_port: endpoint {
280
- slave-mode;
281
- remote-endpoint = <&replicator_out_port1>;
273
+ in-ports {
274
+ port {
275
+ etr_in_port: endpoint {
276
+ remote-endpoint = <&replicator_out_port1>;
277
+ };
282278 };
283279 };
284280 };
....@@ -289,17 +285,18 @@
289285 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
290286 clock-names = "apb_pclk";
291287
292
- port {
293
- tpiu_in_port: endpoint {
294
- slave-mode;
295
- remote-endpoint = <&replicator_out_port0>;
288
+ in-ports {
289
+ port {
290
+ tpiu_in_port: endpoint {
291
+ remote-endpoint = <&replicator_out_port0>;
292
+ };
296293 };
297294 };
298295 };
299296
300297 intc: interrupt-controller@31001000 {
301298 compatible = "arm,cortex-a7-gic";
302
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
299
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
303300 #interrupt-cells = <3>;
304301 interrupt-controller;
305302 interrupt-parent = <&intc>;
....@@ -309,7 +306,7 @@
309306 <0x31006000 0x2000>;
310307 };
311308
312
- aips1: aips-bus@30000000 {
309
+ aips1: bus@30000000 {
313310 compatible = "fsl,aips-bus", "simple-bus";
314311 #address-cells = <1>;
315312 #size-cells = <1>;
....@@ -400,14 +397,14 @@
400397 gpio-ranges = <&iomuxc 0 139 16>;
401398 };
402399
403
- wdog1: wdog@30280000 {
400
+ wdog1: watchdog@30280000 {
404401 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
405402 reg = <0x30280000 0x10000>;
406403 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
407404 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
408405 };
409406
410
- wdog2: wdog@30290000 {
407
+ wdog2: watchdog@30290000 {
411408 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
412409 reg = <0x30290000 0x10000>;
413410 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
....@@ -415,7 +412,7 @@
415412 status = "disabled";
416413 };
417414
418
- wdog3: wdog@302a0000 {
415
+ wdog3: watchdog@302a0000 {
419416 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
420417 reg = <0x302a0000 0x10000>;
421418 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
....@@ -423,7 +420,7 @@
423420 status = "disabled";
424421 };
425422
426
- wdog4: wdog@302b0000 {
423
+ wdog4: watchdog@302b0000 {
427424 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
428425 reg = <0x302b0000 0x10000>;
429426 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
....@@ -437,7 +434,7 @@
437434 fsl,input-sel = <&iomuxc>;
438435 };
439436
440
- gpt1: gpt@302d0000 {
437
+ gpt1: timer@302d0000 {
441438 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
442439 reg = <0x302d0000 0x10000>;
443440 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
....@@ -446,7 +443,7 @@
446443 clock-names = "ipg", "per";
447444 };
448445
449
- gpt2: gpt@302e0000 {
446
+ gpt2: timer@302e0000 {
450447 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
451448 reg = <0x302e0000 0x10000>;
452449 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
....@@ -456,7 +453,7 @@
456453 status = "disabled";
457454 };
458455
459
- gpt3: gpt@302f0000 {
456
+ gpt3: timer@302f0000 {
460457 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
461458 reg = <0x302f0000 0x10000>;
462459 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
....@@ -466,7 +463,7 @@
466463 status = "disabled";
467464 };
468465
469
- gpt4: gpt@30300000 {
466
+ gpt4: timer@30300000 {
470467 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
471468 reg = <0x30300000 0x10000>;
472469 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
....@@ -476,7 +473,7 @@
476473 status = "disabled";
477474 };
478475
479
- kpp: kpp@30320000 {
476
+ kpp: keypad@30320000 {
480477 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
481478 reg = <0x30320000 0x10000>;
482479 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
....@@ -484,18 +481,53 @@
484481 status = "disabled";
485482 };
486483
487
- iomuxc: iomuxc@30330000 {
484
+ iomuxc: pinctrl@30330000 {
488485 compatible = "fsl,imx7d-iomuxc";
489486 reg = <0x30330000 0x10000>;
490487 };
491488
492489 gpr: iomuxc-gpr@30340000 {
493490 compatible = "fsl,imx7d-iomuxc-gpr",
494
- "fsl,imx6q-iomuxc-gpr", "syscon";
491
+ "fsl,imx6q-iomuxc-gpr", "syscon",
492
+ "simple-mfd";
495493 reg = <0x30340000 0x10000>;
494
+
495
+ mux: mux-controller {
496
+ compatible = "mmio-mux";
497
+ #mux-control-cells = <0>;
498
+ mux-reg-masks = <0x14 0x00000010>;
499
+ };
500
+
501
+ video_mux: csi-mux {
502
+ compatible = "video-mux";
503
+ mux-controls = <&mux 0>;
504
+ #address-cells = <1>;
505
+ #size-cells = <0>;
506
+ status = "disabled";
507
+
508
+ port@0 {
509
+ reg = <0>;
510
+ };
511
+
512
+ port@1 {
513
+ reg = <1>;
514
+
515
+ csi_mux_from_mipi_vc0: endpoint {
516
+ remote-endpoint = <&mipi_vc0_to_csi_mux>;
517
+ };
518
+ };
519
+
520
+ port@2 {
521
+ reg = <2>;
522
+
523
+ csi_mux_to_csi: endpoint {
524
+ remote-endpoint = <&csi_from_csi_mux>;
525
+ };
526
+ };
527
+ };
496528 };
497529
498
- ocotp: ocotp-ctrl@30350000 {
530
+ ocotp: efuse@30350000 {
499531 #address-cells = <1>;
500532 #size-cells = <1>;
501533 compatible = "fsl,imx7d-ocotp", "syscon";
....@@ -506,14 +538,14 @@
506538 reg = <0x3c 0x4>;
507539 };
508540
509
- tempmon_temp_grade: temp-grade@10 {
541
+ fuse_grade: fuse-grade@10 {
510542 reg = <0x10 0x4>;
511543 };
512544 };
513545
514546 anatop: anatop@30360000 {
515547 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
516
- "syscon", "simple-bus";
548
+ "syscon", "simple-mfd";
517549 reg = <0x30360000 0x10000>;
518550 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
519551 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
....@@ -545,6 +577,16 @@
545577 anatop-max-voltage = <1300000>;
546578 anatop-enable-bit = <0>;
547579 };
580
+
581
+ tempmon: tempmon {
582
+ compatible = "fsl,imx7d-tempmon";
583
+ interrupt-parent = <&gpc>;
584
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
585
+ fsl,tempmon = <&anatop>;
586
+ nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
587
+ nvmem-cell-names = "calib", "temp_grade";
588
+ clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
589
+ };
548590 };
549591
550592 snvs: snvs@30370000 {
....@@ -561,24 +603,19 @@
561603 clock-names = "snvs-rtc";
562604 };
563605
564
- snvs_poweroff: snvs-poweroff {
565
- compatible = "syscon-poweroff";
566
- regmap = <&snvs>;
567
- offset = <0x38>;
568
- value = <0x60>;
569
- mask = <0x60>;
570
- };
571
-
572606 snvs_pwrkey: snvs-powerkey {
573607 compatible = "fsl,sec-v4.0-pwrkey";
574608 regmap = <&snvs>;
575609 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
610
+ clocks = <&clks IMX7D_SNVS_CLK>;
611
+ clock-names = "snvs-pwrkey";
576612 linux,keycode = <KEY_POWER>;
577613 wakeup-source;
614
+ status = "disabled";
578615 };
579616 };
580617
581
- clks: ccm@30380000 {
618
+ clks: clock-controller@30380000 {
582619 compatible = "fsl,imx7d-ccm";
583620 reg = <0x30380000 0x10000>;
584621 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
....@@ -588,7 +625,7 @@
588625 clock-names = "ckil", "osc";
589626 };
590627
591
- src: src@30390000 {
628
+ src: reset-controller@30390000 {
592629 compatible = "fsl,imx7d-src", "syscon";
593630 reg = <0x30390000 0x10000>;
594631 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
....@@ -608,16 +645,28 @@
608645 #address-cells = <1>;
609646 #size-cells = <0>;
610647
611
- pgc_pcie_phy: pgc-power-domain@1 {
648
+ pgc_mipi_phy: power-domain@0 {
649
+ #power-domain-cells = <0>;
650
+ reg = <0>;
651
+ power-supply = <&reg_1p0d>;
652
+ };
653
+
654
+ pgc_pcie_phy: power-domain@1 {
612655 #power-domain-cells = <0>;
613656 reg = <1>;
614657 power-supply = <&reg_1p0d>;
658
+ };
659
+
660
+ pgc_hsic_phy: power-domain@2 {
661
+ #power-domain-cells = <0>;
662
+ reg = <2>;
663
+ power-supply = <&reg_1p2>;
615664 };
616665 };
617666 };
618667 };
619668
620
- aips2: aips-bus@30400000 {
669
+ aips2: bus@30400000 {
621670 compatible = "fsl,aips-bus", "simple-bus";
622671 #address-cells = <1>;
623672 #size-cells = <1>;
....@@ -630,6 +679,7 @@
630679 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
631680 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
632681 clock-names = "adc";
682
+ #io-channel-cells = <1>;
633683 status = "disabled";
634684 };
635685
....@@ -639,10 +689,11 @@
639689 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
640690 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
641691 clock-names = "adc";
692
+ #io-channel-cells = <1>;
642693 status = "disabled";
643694 };
644695
645
- ecspi4: ecspi@30630000 {
696
+ ecspi4: spi@30630000 {
646697 #address-cells = <1>;
647698 #size-cells = <0>;
648699 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
....@@ -698,6 +749,23 @@
698749 status = "disabled";
699750 };
700751
752
+ csi: csi@30710000 {
753
+ compatible = "fsl,imx7-csi";
754
+ reg = <0x30710000 0x10000>;
755
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
756
+ clocks = <&clks IMX7D_CLK_DUMMY>,
757
+ <&clks IMX7D_CSI_MCLK_ROOT_CLK>,
758
+ <&clks IMX7D_CLK_DUMMY>;
759
+ clock-names = "axi", "mclk", "dcic";
760
+ status = "disabled";
761
+
762
+ port {
763
+ csi_from_csi_mux: endpoint {
764
+ remote-endpoint = <&csi_mux_to_csi>;
765
+ };
766
+ };
767
+ };
768
+
701769 lcdif: lcdif@30730000 {
702770 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
703771 reg = <0x30730000 0x10000>;
....@@ -707,9 +775,38 @@
707775 clock-names = "pix", "axi";
708776 status = "disabled";
709777 };
778
+
779
+ mipi_csi: mipi-csi@30750000 {
780
+ compatible = "fsl,imx7-mipi-csi2";
781
+ reg = <0x30750000 0x10000>;
782
+ #address-cells = <1>;
783
+ #size-cells = <0>;
784
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
785
+ clocks = <&clks IMX7D_IPG_ROOT_CLK>,
786
+ <&clks IMX7D_MIPI_CSI_ROOT_CLK>,
787
+ <&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
788
+ clock-names = "pclk", "wrap", "phy";
789
+ power-domains = <&pgc_mipi_phy>;
790
+ phy-supply = <&reg_1p0d>;
791
+ resets = <&src IMX7_RESET_MIPI_PHY_MRST>;
792
+ reset-names = "mrst";
793
+ status = "disabled";
794
+
795
+ port@0 {
796
+ reg = <0>;
797
+ };
798
+
799
+ port@1 {
800
+ reg = <1>;
801
+
802
+ mipi_vc0_to_csi_mux: endpoint {
803
+ remote-endpoint = <&csi_mux_from_mipi_vc0>;
804
+ };
805
+ };
806
+ };
710807 };
711808
712
- aips3: aips-bus@30800000 {
809
+ aips3: bus@30800000 {
713810 compatible = "fsl,aips-bus", "simple-bus";
714811 #address-cells = <1>;
715812 #size-cells = <1>;
....@@ -723,7 +820,7 @@
723820 reg = <0x30800000 0x100000>;
724821 ranges;
725822
726
- ecspi1: ecspi@30820000 {
823
+ ecspi1: spi@30820000 {
727824 #address-cells = <1>;
728825 #size-cells = <0>;
729826 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
....@@ -735,7 +832,7 @@
735832 status = "disabled";
736833 };
737834
738
- ecspi2: ecspi@30830000 {
835
+ ecspi2: spi@30830000 {
739836 #address-cells = <1>;
740837 #size-cells = <0>;
741838 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
....@@ -747,7 +844,7 @@
747844 status = "disabled";
748845 };
749846
750
- ecspi3: ecspi@30840000 {
847
+ ecspi3: spi@30840000 {
751848 #address-cells = <1>;
752849 #size-cells = <0>;
753850 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
....@@ -838,7 +935,7 @@
838935 };
839936 };
840937
841
- crypto: caam@30900000 {
938
+ crypto: crypto@30900000 {
842939 compatible = "fsl,sec-v4.0";
843940 #address-cells = <1>;
844941 #size-cells = <1>;
....@@ -849,19 +946,19 @@
849946 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
850947 clock-names = "ipg", "aclk";
851948
852
- sec_jr0: jr0@1000 {
949
+ sec_jr0: jr@1000 {
853950 compatible = "fsl,sec-v4.0-job-ring";
854951 reg = <0x1000 0x1000>;
855952 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
856953 };
857954
858
- sec_jr1: jr1@2000 {
955
+ sec_jr1: jr@2000 {
859956 compatible = "fsl,sec-v4.0-job-ring";
860957 reg = <0x2000 0x1000>;
861958 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
862959 };
863960
864
- sec_jr2: jr1@3000 {
961
+ sec_jr2: jr@3000 {
865962 compatible = "fsl,sec-v4.0-job-ring";
866963 reg = <0x3000 0x1000>;
867964 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
....@@ -875,6 +972,7 @@
875972 clocks = <&clks IMX7D_CLK_DUMMY>,
876973 <&clks IMX7D_CAN1_ROOT_CLK>;
877974 clock-names = "ipg", "per";
975
+ fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
878976 status = "disabled";
879977 };
880978
....@@ -885,6 +983,7 @@
885983 clocks = <&clks IMX7D_CLK_DUMMY>,
886984 <&clks IMX7D_CAN2_ROOT_CLK>;
887985 clock-names = "ipg", "per";
986
+ fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
888987 status = "disabled";
889988 };
890989
....@@ -972,6 +1071,25 @@
9721071 status = "disabled";
9731072 };
9741073
1074
+ mu0a: mailbox@30aa0000 {
1075
+ compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1076
+ reg = <0x30aa0000 0x10000>;
1077
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
1078
+ clocks = <&clks IMX7D_MU_ROOT_CLK>;
1079
+ #mbox-cells = <2>;
1080
+ status = "disabled";
1081
+ };
1082
+
1083
+ mu0b: mailbox@30ab0000 {
1084
+ compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1085
+ reg = <0x30ab0000 0x10000>;
1086
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1087
+ clocks = <&clks IMX7D_MU_ROOT_CLK>;
1088
+ #mbox-cells = <2>;
1089
+ fsl,mu-side-b;
1090
+ status = "disabled";
1091
+ };
1092
+
9751093 usbotg1: usb@30b10000 {
9761094 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
9771095 reg = <0x30b10000 0x200>;
....@@ -1008,7 +1126,7 @@
10081126 reg = <0x30b30200 0x200>;
10091127 };
10101128
1011
- usdhc1: usdhc@30b40000 {
1129
+ usdhc1: mmc@30b40000 {
10121130 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
10131131 reg = <0x30b40000 0x10000>;
10141132 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1020,7 +1138,7 @@
10201138 status = "disabled";
10211139 };
10221140
1023
- usdhc2: usdhc@30b50000 {
1141
+ usdhc2: mmc@30b50000 {
10241142 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
10251143 reg = <0x30b50000 0x10000>;
10261144 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1032,7 +1150,7 @@
10321150 status = "disabled";
10331151 };
10341152
1035
- usdhc3: usdhc@30b60000 {
1153
+ usdhc3: mmc@30b60000 {
10361154 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
10371155 reg = <0x30b60000 0x10000>;
10381156 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1041,6 +1159,19 @@
10411159 <&clks IMX7D_USDHC3_ROOT_CLK>;
10421160 clock-names = "ipg", "ahb", "per";
10431161 bus-width = <4>;
1162
+ status = "disabled";
1163
+ };
1164
+
1165
+ qspi: spi@30bb0000 {
1166
+ compatible = "fsl,imx7d-qspi";
1167
+ reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1168
+ reg-names = "QuadSPI", "QuadSPI-memory";
1169
+ #address-cells = <1>;
1170
+ #size-cells = <0>;
1171
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1172
+ clocks = <&clks IMX7D_QSPI_ROOT_CLK>,
1173
+ <&clks IMX7D_QSPI_ROOT_CLK>;
1174
+ clock-names = "qspi_en", "qspi";
10441175 status = "disabled";
10451176 };
10461177
....@@ -1070,8 +1201,9 @@
10701201 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
10711202 clock-names = "ipg", "ahb", "ptp",
10721203 "enet_clk_ref", "enet_out";
1073
- fsl,num-tx-queues=<3>;
1074
- fsl,num-rx-queues=<3>;
1204
+ fsl,num-tx-queues = <3>;
1205
+ fsl,num-rx-queues = <3>;
1206
+ fsl,stop-mode = <&gpr 0x10 3>;
10751207 status = "disabled";
10761208 };
10771209 };
....@@ -1089,7 +1221,7 @@
10891221 clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
10901222 };
10911223
1092
- gpmi: gpmi-nand@33002000{
1224
+ gpmi: nand-controller@33002000{
10931225 compatible = "fsl,imx7d-gpmi-nand";
10941226 #address-cells = <1>;
10951227 #size-cells = <1>;