kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/arm/boot/dts/imx7d.dtsi
..
..
@@ -12,6 +12,8 @@
12
12
 			clock-frequency = <996000000>;
13
13
 			operating-points-v2 = <&cpu0_opp_table>;
14
14
 			#cooling-cells = <2>;
15
+			nvmem-cells = <&fuse_grade>;
16
+			nvmem-cell-names = "speed_grade";
15
17
 		};
16
18
 
17
19
 		cpu1: cpu@1 {
..
..
@@ -20,7 +22,18 @@
20
22
 			reg = <1>;
21
23
 			clock-frequency = <996000000>;
22
24
 			operating-points-v2 = <&cpu0_opp_table>;
25
+			#cooling-cells = <2>;
26
+			cpu-idle-states = <&cpu_sleep_wait>;
23
27
 		};
28
+	};
29
+
30
+	timer {
31
+		compatible = "arm,armv7-timer";
32
+		interrupt-parent = <&intc>;
33
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
34
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
35
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
36
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
24
37
 	};
25
38
 
26
39
 	cpu0_opp_table: opp-table {
..
..
@@ -29,14 +42,25 @@
29
42
 
30
43
 		opp-792000000 {
31
44
 			opp-hz = /bits/ 64 <792000000>;
32
-			opp-microvolt = <975000>;
45
+			opp-microvolt = <1000000>;
33
46
 			clock-latency-ns = <150000>;
47
+			opp-supported-hw = <0xd>, <0x7>;
48
+			opp-suspend;
34
49
 		};
35
50
 
36
51
 		opp-996000000 {
37
52
 			opp-hz = /bits/ 64 <996000000>;
38
-			opp-microvolt = <1075000>;
53
+			opp-microvolt = <1100000>;
39
54
 			clock-latency-ns = <150000>;
55
+			opp-supported-hw = <0xc>, <0x7>;
56
+			opp-suspend;
57
+		};
58
+
59
+		opp-1200000000 {
60
+			opp-hz = /bits/ 64 <1200000000>;
61
+			opp-microvolt = <1225000>;
62
+			clock-latency-ns = <150000>;
63
+			opp-supported-hw = <0x8>, <0x3>;
40
64
 			opp-suspend;
41
65
 		};
42
66
 	};
..
..
@@ -63,12 +87,34 @@
63
87
 			clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
64
88
 			clock-names = "apb_pclk";
65
89
 
66
-			port {
67
-				etm1_out_port: endpoint {
68
-					remote-endpoint = <&ca_funnel_in_port1>;
90
+			out-ports {
91
+				port {
92
+					etm1_out_port: endpoint {
93
+						remote-endpoint = <&ca_funnel_in_port1>;
94
+					};
69
95
 				};
70
96
 			};
71
97
 		};
98
+
99
+		intc: interrupt-controller@31001000 {
100
+			compatible = "arm,cortex-a7-gic";
101
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
102
+			#interrupt-cells = <3>;
103
+			interrupt-controller;
104
+			interrupt-parent = <&intc>;
105
+			reg = <0x31001000 0x1000>,
106
+			      <0x31002000 0x2000>,
107
+			      <0x31004000 0x2000>,
108
+			      <0x31006000 0x2000>;
109
+		};
110
+	};
111
+};
112
+
113
+&aips2 {
114
+	pcie_phy: pcie-phy@306d0000 {
115
+		  compatible = "fsl,imx7d-pcie-phy";
116
+		  reg = <0x306d0000 0x10000>;
117
+		  status = "disabled";
72
118
 	};
73
119
 };
74
120
 
..
..
@@ -105,8 +151,9 @@
105
151
 			<&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
106
152
 		clock-names = "ipg", "ahb", "ptp",
107
153
 			"enet_clk_ref", "enet_out";
108
-		fsl,num-tx-queues=<3>;
109
-		fsl,num-rx-queues=<3>;
154
+		fsl,num-tx-queues = <3>;
155
+		fsl,num-rx-queues = <3>;
156
+		fsl,stop-mode = <&gpr 0x10 4>;
110
157
 		status = "disabled";
111
158
 	};
112
159
 
..
..
@@ -122,6 +169,7 @@
122
169
 		ranges = <0x81000000 0 0          0x4ff80000 0 0x00010000   /* downstream I/O */
123
170
 			  0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
124
171
 		num-lanes = <1>;
172
+		num-viewport = <4>;
125
173
 		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
126
174
 		interrupt-names = "msi";
127
175
 		#interrupt-cells = <1>;
..
..
@@ -146,17 +194,21 @@
146
194
 		fsl,max-link-speed = <2>;
147
195
 		power-domains = <&pgc_pcie_phy>;
148
196
 		resets = <&src IMX7_RESET_PCIEPHY>,
149
-			 <&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
150
-		reset-names = "pciephy", "apps";
197
+			 <&src IMX7_RESET_PCIE_CTRL_APPS_EN>,
198
+			 <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;
199
+		reset-names = "pciephy", "apps", "turnoff";
200
+		fsl,imx7d-pcie-phy = <&pcie_phy>;
151
201
 		status = "disabled";
152
202
 	};
153
203
 };
154
204
 
155
-&ca_funnel_ports {
205
+&ca_funnel_in_ports {
206
+	#address-cells = <1>;
207
+	#size-cells = <0>;
208
+
156
209
 	port@1 {
157
210
 		reg = <1>;
158
211
 		ca_funnel_in_port1: endpoint {
159
-			slave-mode;
160
212
 			remote-endpoint = <&etm1_out_port>;
161
213
 		};
162
214
 	};