.. | .. |
---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
---|
1 | 2 | /* |
---|
2 | | - * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/ |
---|
3 | | - * |
---|
4 | | - * This program is free software; you can redistribute it and/or modify |
---|
5 | | - * it under the terms of the GNU General Public License version 2 as |
---|
6 | | - * published by the Free Software Foundation. |
---|
| 3 | + * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ |
---|
7 | 4 | */ |
---|
8 | 5 | /dts-v1/; |
---|
9 | 6 | |
---|
10 | 7 | #include "dra72x.dtsi" |
---|
| 8 | +#include "dra7-ipu-dsp-common.dtsi" |
---|
11 | 9 | #include <dt-bindings/gpio/gpio.h> |
---|
12 | | -#include <dt-bindings/clk/ti-dra7-atl.h> |
---|
| 10 | +#include <dt-bindings/clock/ti-dra7-atl.h> |
---|
13 | 11 | |
---|
14 | 12 | / { |
---|
15 | 13 | compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7"; |
---|
.. | .. |
---|
190 | 188 | gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>; |
---|
191 | 189 | enable-active-high; |
---|
192 | 190 | }; |
---|
| 191 | + |
---|
| 192 | + clk_ov5640_fixed: clock { |
---|
| 193 | + compatible = "fixed-clock"; |
---|
| 194 | + #clock-cells = <0>; |
---|
| 195 | + clock-frequency = <24000000>; |
---|
| 196 | + }; |
---|
193 | 197 | }; |
---|
194 | 198 | |
---|
195 | 199 | &dra7_pmx_core { |
---|
.. | .. |
---|
272 | 276 | line-name = "vin6_sel_s0"; |
---|
273 | 277 | }; |
---|
274 | 278 | }; |
---|
| 279 | + |
---|
| 280 | + ov5640@3c { |
---|
| 281 | + compatible = "ovti,ov5640"; |
---|
| 282 | + reg = <0x3c>; |
---|
| 283 | + |
---|
| 284 | + clocks = <&clk_ov5640_fixed>; |
---|
| 285 | + clock-names = "xclk"; |
---|
| 286 | + |
---|
| 287 | + port { |
---|
| 288 | + csi2_cam0: endpoint { |
---|
| 289 | + remote-endpoint = <&csi2_phy0>; |
---|
| 290 | + clock-lanes = <0>; |
---|
| 291 | + data-lanes = <1 2>; |
---|
| 292 | + }; |
---|
| 293 | + }; |
---|
| 294 | + }; |
---|
| 295 | + |
---|
275 | 296 | }; |
---|
276 | 297 | |
---|
277 | 298 | &uart1 { |
---|
.. | .. |
---|
441 | 462 | }; |
---|
442 | 463 | }; |
---|
443 | 464 | |
---|
444 | | -&mac { |
---|
445 | | - status = "okay"; |
---|
446 | | -}; |
---|
447 | | - |
---|
448 | 465 | &dcan1 { |
---|
449 | | - status = "ok"; |
---|
| 466 | + status = "okay"; |
---|
450 | 467 | pinctrl-names = "default", "sleep", "active"; |
---|
451 | 468 | pinctrl-0 = <&dcan1_pins_sleep>; |
---|
452 | 469 | pinctrl-1 = <&dcan1_pins_sleep>; |
---|
.. | .. |
---|
515 | 532 | }; |
---|
516 | 533 | |
---|
517 | 534 | &dss { |
---|
518 | | - status = "ok"; |
---|
| 535 | + status = "okay"; |
---|
519 | 536 | }; |
---|
520 | 537 | |
---|
521 | 538 | &hdmi { |
---|
522 | | - status = "ok"; |
---|
| 539 | + status = "okay"; |
---|
523 | 540 | |
---|
524 | 541 | port { |
---|
525 | 542 | hdmi_out: endpoint { |
---|
.. | .. |
---|
530 | 547 | |
---|
531 | 548 | &atl { |
---|
532 | 549 | assigned-clocks = <&abe_dpll_sys_clk_mux>, |
---|
533 | | - <&atl_clkctrl DRA7_ATL_CLKCTRL 26>, |
---|
| 550 | + <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>, |
---|
534 | 551 | <&dpll_abe_ck>, |
---|
535 | 552 | <&dpll_abe_m2x2_ck>, |
---|
536 | 553 | <&atl_clkin2_ck>; |
---|
.. | .. |
---|
548 | 565 | &mcasp3 { |
---|
549 | 566 | #sound-dai-cells = <0>; |
---|
550 | 567 | |
---|
551 | | - assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>; |
---|
| 568 | + assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>; |
---|
552 | 569 | assigned-clock-parents = <&atl_clkin2_ck>; |
---|
553 | 570 | |
---|
554 | 571 | status = "okay"; |
---|
.. | .. |
---|
563 | 580 | rx-num-evt = <32>; |
---|
564 | 581 | }; |
---|
565 | 582 | |
---|
566 | | -&mailbox5 { |
---|
567 | | - status = "okay"; |
---|
568 | | - mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { |
---|
569 | | - status = "okay"; |
---|
570 | | - }; |
---|
571 | | - mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { |
---|
572 | | - status = "okay"; |
---|
573 | | - }; |
---|
574 | | -}; |
---|
575 | | - |
---|
576 | | -&mailbox6 { |
---|
577 | | - status = "okay"; |
---|
578 | | - mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { |
---|
579 | | - status = "okay"; |
---|
580 | | - }; |
---|
581 | | -}; |
---|
582 | | - |
---|
583 | 583 | &pcie1_rc { |
---|
584 | 584 | status = "okay"; |
---|
585 | 585 | }; |
---|
| 586 | + |
---|
| 587 | +&csi2_0 { |
---|
| 588 | + csi2_phy0: endpoint { |
---|
| 589 | + remote-endpoint = <&csi2_cam0>; |
---|
| 590 | + clock-lanes = <0>; |
---|
| 591 | + data-lanes = <1 2>; |
---|
| 592 | + }; |
---|
| 593 | +}; |
---|