forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/arch/arm/boot/dts/dra72-evm-common.dtsi
....@@ -1,15 +1,13 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
2
- * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
3
+ * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
74 */
85 /dts-v1/;
96
107 #include "dra72x.dtsi"
8
+#include "dra7-ipu-dsp-common.dtsi"
119 #include <dt-bindings/gpio/gpio.h>
12
-#include <dt-bindings/clk/ti-dra7-atl.h>
10
+#include <dt-bindings/clock/ti-dra7-atl.h>
1311
1412 / {
1513 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
....@@ -190,6 +188,12 @@
190188 gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>;
191189 enable-active-high;
192190 };
191
+
192
+ clk_ov5640_fixed: clock {
193
+ compatible = "fixed-clock";
194
+ #clock-cells = <0>;
195
+ clock-frequency = <24000000>;
196
+ };
193197 };
194198
195199 &dra7_pmx_core {
....@@ -272,6 +276,23 @@
272276 line-name = "vin6_sel_s0";
273277 };
274278 };
279
+
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+ ov5640@3c {
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+ compatible = "ovti,ov5640";
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+ reg = <0x3c>;
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+
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+ clocks = <&clk_ov5640_fixed>;
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+ clock-names = "xclk";
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+
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+ port {
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+ csi2_cam0: endpoint {
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+ remote-endpoint = <&csi2_phy0>;
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+ clock-lanes = <0>;
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+ data-lanes = <1 2>;
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+ };
293
+ };
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+ };
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+
275296 };
276297
277298 &uart1 {
....@@ -441,12 +462,8 @@
441462 };
442463 };
443464
444
-&mac {
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- status = "okay";
446
-};
447
-
448465 &dcan1 {
449
- status = "ok";
466
+ status = "okay";
450467 pinctrl-names = "default", "sleep", "active";
451468 pinctrl-0 = <&dcan1_pins_sleep>;
452469 pinctrl-1 = <&dcan1_pins_sleep>;
....@@ -515,11 +532,11 @@
515532 };
516533
517534 &dss {
518
- status = "ok";
535
+ status = "okay";
519536 };
520537
521538 &hdmi {
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- status = "ok";
539
+ status = "okay";
523540
524541 port {
525542 hdmi_out: endpoint {
....@@ -530,7 +547,7 @@
530547
531548 &atl {
532549 assigned-clocks = <&abe_dpll_sys_clk_mux>,
533
- <&atl_clkctrl DRA7_ATL_CLKCTRL 26>,
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+ <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>,
534551 <&dpll_abe_ck>,
535552 <&dpll_abe_m2x2_ck>,
536553 <&atl_clkin2_ck>;
....@@ -548,7 +565,7 @@
548565 &mcasp3 {
549566 #sound-dai-cells = <0>;
550567
551
- assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
568
+ assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
552569 assigned-clock-parents = <&atl_clkin2_ck>;
553570
554571 status = "okay";
....@@ -563,23 +580,14 @@
563580 rx-num-evt = <32>;
564581 };
565582
566
-&mailbox5 {
567
- status = "okay";
568
- mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
569
- status = "okay";
570
- };
571
- mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
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- status = "okay";
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- };
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-};
575
-
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-&mailbox6 {
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- status = "okay";
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- mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
579
- status = "okay";
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- };
581
-};
582
-
583583 &pcie1_rc {
584584 status = "okay";
585585 };
586
+
587
+&csi2_0 {
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+ csi2_phy0: endpoint {
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+ remote-endpoint = <&csi2_cam0>;
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+ clock-lanes = <0>;
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+ data-lanes = <1 2>;
592
+ };
593
+};