forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f
kernel/arch/arm/boot/dts/am335x-cm-t335.dts
....@@ -1,11 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
34 *
45 * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
5
- *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License version 2 as
8
- * published by the Free Software Foundation.
96 */
107
118 /dts-v1/;
....@@ -47,7 +44,6 @@
4744 regulator-name = "vwlan_fixed";
4845 gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
4946 enable-active-high;
50
- regulator-boot-off;
5147 };
5248
5349 backlight {
....@@ -94,108 +90,85 @@
9490
9591 i2c0_pins: pinmux_i2c0_pins {
9692 pinctrl-single,pins = <
97
- /* i2c0_sda.i2c0_sda */
98
- AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
99
- /* i2c0_scl.i2c0_scl */
100
- AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
93
+ AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
94
+ AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
10195 >;
10296 };
10397
10498 i2c1_pins: pinmux_i2c1_pins {
10599 pinctrl-single,pins = <
106100 /* uart0_ctsn.i2c1_sda */
107
- AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE2)
101
+ AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2)
108102 /* uart0_rtsn.i2c1_scl */
109
- AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2)
103
+ AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
110104 >;
111105 };
112106
113107 gpio_led_pins: pinmux_gpio_led_pins {
114108 pinctrl-single,pins = <
115109 /* gpmc_csn3.gpio2_0 */
116
- AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE7)
110
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7)
117111 >;
118112 };
119113
120114 nandflash_pins: pinmux_nandflash_pins {
121115 pinctrl-single,pins = <
122
- /* gpmc_ad0.gpmc_ad0 */
123
- AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)
124
- /* gpmc_ad1.gpmc_ad1 */
125
- AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)
126
- /* gpmc_ad2.gpmc_ad2 */
127
- AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)
128
- /* gpmc_ad3.gpmc_ad3 */
129
- AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)
130
- /* gpmc_ad4.gpmc_ad4 */
131
- AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)
132
- /* gpmc_ad5.gpmc_ad5 */
133
- AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)
134
- /* gpmc_ad6.gpmc_ad6 */
135
- AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)
136
- /* gpmc_ad7.gpmc_ad7 */
137
- AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)
138
- /* gpmc_wait0.gpmc_wait0 */
139
- AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
116
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
117
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
118
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
119
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
120
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
121
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
122
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
123
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
124
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
140125 /* gpmc_wpn.gpio0_30 */
141
- AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)
142
- /* gpmc_csn0.gpmc_csn0 */
143
- AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
144
- /* gpmc_advn_ale.gpmc_advn_ale */
145
- AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
146
- /* gpmc_oen_ren.gpmc_oen_ren */
147
- AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
148
- /* gpmc_wen.gpmc_wen */
149
- AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
150
- /* gpmc_ben0_cle.gpmc_ben0_cle */
151
- AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
126
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
127
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
128
+ AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
129
+ AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
130
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
131
+ AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
152132 >;
153133 };
154134
155135 uart0_pins: pinmux_uart0_pins {
156136 pinctrl-single,pins = <
157
- /* uart0_rxd.uart0_rxd */
158
- AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
159
- /* uart0_txd.uart0_txd */
160
- AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
137
+ AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
138
+ AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
161139 >;
162140 };
163141
164142 uart1_pins: pinmux_uart1_pins {
165143 pinctrl-single,pins = <
166
- /* uart1_ctsn.uart1_ctsn */
167
- AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)
168
- /* uart1_rtsn.uart1_rtsn */
169
- AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
170
- /* uart1_rxd.uart1_rxd */
171
- AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)
172
- /* uart1_txd.uart1_txd */
173
- AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
144
+ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
145
+ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
146
+ AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
147
+ AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
174148 >;
175149 };
176150
177151 dcan0_pins: pinmux_dcan0_pins {
178152 pinctrl-single,pins = <
179153 /* uart1_ctsn.dcan0_tx */
180
- AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)
154
+ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)
181155 /* uart1_rtsn.dcan0_rx */
182
- AM33XX_IOPAD(0x97C, PIN_INPUT | MUX_MODE2)
156
+ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2)
183157 >;
184158 };
185159
186160 dcan1_pins: pinmux_dcan1_pins {
187161 pinctrl-single,pins = <
188162 /* uart1_rxd.dcan1_tx */
189
- AM33XX_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)
163
+ AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2)
190164 /* uart1_txd.dcan1_rx */
191
- AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE2)
165
+ AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2)
192166 >;
193167 };
194168
195169 ecap0_pins: pinmux_ecap0_pins {
196170 pinctrl-single,pins = <
197
- /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
198
- AM33XX_IOPAD(0x964, 0x0)
171
+ AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
199172 >;
200173 };
201174
....@@ -203,96 +176,83 @@
203176 pinctrl-single,pins = <
204177 /* Slave 1 */
205178 /* mii1_tx_en.rgmii1_tctl */
206
- AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
179
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
207180 /* mii1_rxdv.rgmii1_rctl */
208
- AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)
181
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
209182 /* mii1_txd3.rgmii1_td3 */
210
- AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
183
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
211184 /* mii1_txd2.rgmii1_td2 */
212
- AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
185
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
213186 /* mii1_txd1.rgmii1_td1 */
214
- AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
187
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
215188 /* mii1_txd0.rgmii1_td0 */
216
- AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
189
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
217190 /* mii1_txclk.rgmii1_tclk */
218
- AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)
191
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
219192 /* mii1_rxclk.rgmii1_rclk */
220
- AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)
193
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
221194 /* mii1_rxd3.rgmii1_rd3 */
222
- AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)
195
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
223196 /* mii1_rxd2.rgmii1_rd2 */
224
- AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)
197
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
225198 /* mii1_rxd1.rgmii1_rd1 */
226
- AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)
199
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
227200 /* mii1_rxd0.rgmii1_rd0 */
228
- AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)
201
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
229202 >;
230203 };
231204
232205 cpsw_sleep: cpsw_sleep {
233206 pinctrl-single,pins = <
234207 /* Slave 1 reset value */
235
- AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
236
- AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
237
- AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
238
- AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
239
- AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
240
- AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
241
- AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
242
- AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
243
- AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
244
- AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
245
- AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
246
- AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
208
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
209
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
210
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
211
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
212
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
213
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
214
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
215
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
216
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
217
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
218
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
219
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
247220 >;
248221 };
249222
250223 davinci_mdio_default: davinci_mdio_default {
251224 pinctrl-single,pins = <
252
- /* mdio_data.mdio_data */
253
- AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
254
- /* mdio_clk.mdio_clk */
255
- AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
225
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
226
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
256227 >;
257228 };
258229
259230 davinci_mdio_sleep: davinci_mdio_sleep {
260231 pinctrl-single,pins = <
261232 /* MDIO reset value */
262
- AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
263
- AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
233
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
234
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
264235 >;
265236 };
266237
267238 mmc1_pins: pinmux_mmc1_pins {
268239 pinctrl-single,pins = <
269
- /* mmc0_dat3.mmc0_dat3 */
270
- AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
271
- /* mmc0_dat2.mmc0_dat2 */
272
- AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
273
- /* mmc0_dat1.mmc0_dat1 */
274
- AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
275
- /* mmc0_dat0.mmc0_dat0 */
276
- AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
277
- /* mmc0_clk.mmc0_clk */
278
- AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
279
- /* mmc0_cmd.mmc0_cmd */
280
- AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
240
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
241
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
242
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
243
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
244
+ AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
245
+ AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
281246 >;
282247 };
283248
284249 spi0_pins: pinmux_spi0_pins {
285250 pinctrl-single,pins = <
286
- /* spi0_sclk.spi0_sclk */
287
- AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE0)
288
- /* spi0_d0.spi0_d0 */
289
- AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
290
- /* spi0_d1.spi0_d1 */
291
- AM33XX_IOPAD(0x958, PIN_INPUT | MUX_MODE0)
292
- /* spi0_cs0.spi0_cs0 */
293
- AM33XX_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0)
294
- /* spi0_cs1.spi0_cs1 */
295
- AM33XX_IOPAD(0x960, PIN_OUTPUT | MUX_MODE0)
251
+ AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
252
+ AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
253
+ AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
254
+ AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE0)
255
+ AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_OUTPUT, MUX_MODE0)
296256 >;
297257 };
298258
....@@ -300,7 +260,7 @@
300260 bluetooth_pins: pinmux_bluetooth_pins {
301261 pinctrl-single,pins = <
302262 /* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
303
- AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLUP | MUX_MODE7)
263
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
304264 >;
305265 };
306266
....@@ -308,13 +268,13 @@
308268 mcasp1_pins: pinmux_mcasp1_pins {
309269 pinctrl-single,pins = <
310270 /* MII1_CRS.mcasp1_aclkx */
311
- AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)
271
+ AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4)
312272 /* MII1_RX_ER.mcasp1_fsx */
313
- AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)
273
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4)
314274 /* MII1_COL.mcasp1_axr2 */
315
- AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE4)
275
+ AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE4)
316276 /* RMII1_REF_CLK.mcasp1_axr3 */
317
- AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)
277
+ AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4)
318278 >;
319279 };
320280
....@@ -322,9 +282,9 @@
322282 wifi_pins: pinmux_wifi_pins {
323283 pinctrl-single,pins = <
324284 /* EMU1.gpio3_8 - WiFi IRQ */
325
- AM33XX_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE7)
285
+ AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)
326286 /* XDMA_EVENT_INTR1.gpio0_20 - WiFi enable */
327
- AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE7)
287
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7)
328288 >;
329289 };
330290 };
....@@ -370,30 +330,10 @@
370330 };
371331 };
372332
373
-&usb {
374
- status = "okay";
375
-};
376
-
377
-&usb_ctrl_mod {
378
- status = "okay";
379
-};
380
-
381
-&usb0_phy {
382
- status = "okay";
383
-};
384
-
385
-&usb0 {
386
- status = "okay";
387
-};
388
-
389
-&cppi41dma {
390
- status = "okay";
391
-};
392
-
393333 &epwmss0 {
394334 status = "okay";
395335
396
- ecap0: ecap@48300100 {
336
+ ecap0: ecap@100 {
397337 status = "okay";
398338 pinctrl-names = "default";
399339 pinctrl-0 = <&ecap0_pins>;
....@@ -486,10 +426,14 @@
486426 pinctrl-0 = <&davinci_mdio_default>;
487427 pinctrl-1 = <&davinci_mdio_sleep>;
488428 status = "okay";
429
+
430
+ ethphy0: ethernet-phy@0 {
431
+ reg = <0>;
432
+ };
489433 };
490434
491435 &cpsw_emac0 {
492
- phy_id = <&davinci_mdio>, <0>;
436
+ phy-handle = <&ethphy0>;
493437 phy-mode = "rgmii-txid";
494438 };
495439