kernel_5.10 no rt

hc

2023-12-11 6778948f9de86c3cfaf36725a7c87dcff9ba247f

 kernel/arch/arc/kernel/head.S
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@@ -1,11 +1,8 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * ARC CPU startup Code
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  *
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  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  *
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  * Vineetg: Dec 2007
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  *  -Check if we are running on Simulator or on real hardware
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@@ -17,6 +14,7 @@
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 #include <asm/entry.h>
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 #include <asm/arcregs.h>
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 #include <asm/cache.h>
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+#include <asm/dsp-impl.h>
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 #include <asm/irqflags.h>
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 .macro CPU_EARLY_SETUP
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@@ -54,9 +52,40 @@
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 	; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
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 	; by default
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 	lr	r5, [status32]
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+#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
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 	bset	r5, r5, STATUS_AD_BIT
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-	kflag	r5
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+#else
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+	; Although disabled at reset, bootloader might have enabled it
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+	bclr	r5, r5, STATUS_AD_BIT
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 #endif
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+	kflag	r5
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+
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+#ifdef CONFIG_ARC_LPB_DISABLE
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+	lr	r5, [ARC_REG_LPB_BUILD]
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+	breq    r5, 0, 1f		; LPB doesn't exist
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+	mov	r5, 1
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+	sr	r5, [ARC_REG_LPB_CTRL]
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+1:
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+#endif /* CONFIG_ARC_LPB_DISABLE */
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+
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+	/* On HSDK, CCMs need to remapped super early */
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+#ifdef CONFIG_ARC_SOC_HSDK
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+	mov	r6, 0x60000000
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+	lr	r5, [ARC_REG_ICCM_BUILD]
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+	breq	r5, 0, 1f
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+	sr	r6, [ARC_REG_AUX_ICCM]
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+1:
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+	lr	r5, [ARC_REG_DCCM_BUILD]
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+	breq	r5, 0, 2f
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+	sr	r6, [ARC_REG_AUX_DCCM]
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+2:
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+#endif	/* CONFIG_ARC_SOC_HSDK */
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+
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+#endif	/* CONFIG_ISA_ARCV2 */
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+
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+	; Config DSP_CTRL properly, so kernel may use integer multiply,
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+	; multiply-accumulate, and divide operations
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+	DSP_EARLY_INIT
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 .endm
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 	.section .init.text, "ax",@progbits