disable i2c1

hc

2024-05-11 645e752c5a84baeb21015cdc85fc05b7d16312c8

 kernel/arch/arm/boot/dts/qcom-msm8960.dtsi
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@@ -1,14 +1,14 @@
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 // SPDX-License-Identifier: GPL-2.0
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 /dts-v1/;
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-/include/ "skeleton.dtsi"
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-
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 #include <dt-bindings/interrupt-controller/arm-gic.h>
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 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
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 #include <dt-bindings/mfd/qcom-rpm.h>
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 #include <dt-bindings/soc/qcom,gsbi.h>
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 / {
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+	#address-cells = <1>;
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+	#size-cells = <1>;
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 	model = "Qualcomm MSM8960";
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 	compatible = "qcom,msm8960";
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 	interrupt-parent = <&intc>;
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@@ -42,6 +42,11 @@
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 			compatible = "cache";
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 			cache-level = <2>;
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 		};
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+	};
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+
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+	memory {
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+		device_type = "memory";
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+		reg = <0x0 0x0>;
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 	};
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 	cpu-pmu {
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@@ -102,6 +107,7 @@
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 		msmgpio: pinctrl@800000 {
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 			compatible = "qcom,msm8960-pinctrl";
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 			gpio-controller;
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+			gpio-ranges = <&msmgpio 0 0 152>;
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 			#gpio-cells = <2>;
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 			interrupts = <0 16 0x4>;
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 			interrupt-controller;
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@@ -140,7 +146,9 @@
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 			reg		= <0x108000 0x1000>;
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 			qcom,ipc	= <&l2cc 0x8 2>;
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-			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
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+			interrupts	= <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
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+					  <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
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+					  <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
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 			interrupt-names	= "ack", "err", "wakeup";
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 			regulators {
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@@ -186,7 +194,7 @@
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 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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 				reg = <0x16440000 0x1000>,
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 				      <0x16400000 0x1000>;
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-				interrupts = <0 154 0x0>;
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+				interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
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 				clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
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 				clock-names = "core", "iface";
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 				status = "disabled";
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@@ -312,7 +320,7 @@
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 				#address-cells = <1>;
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 				#size-cells = <0>;
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 				reg = <0x16080000 0x1000>;
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-				interrupts = <0 147 0>;
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+				interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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 				spi-max-frequency = <24000000>;
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 				cs-gpios = <&msmgpio 8 0>;
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