| .. | .. |
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| 465 | 465 | #address-cells = <3>; |
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| 466 | 466 | #size-cells = <2>; |
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| 467 | 467 | |
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| 468 | | - ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */ |
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| 469 | | - 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ |
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| 468 | + ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000 /* I/O */ |
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| 469 | + 0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */ |
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| 470 | 470 | |
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| 471 | 471 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; |
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| 472 | 472 | interrupt-names = "msi"; |
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| .. | .. |
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| 516 | 516 | #address-cells = <3>; |
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| 517 | 517 | #size-cells = <2>; |
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| 518 | 518 | |
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| 519 | | - ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */ |
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| 520 | | - 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */ |
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| 519 | + ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000 /* I/O */ |
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| 520 | + 0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */ |
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| 521 | 521 | |
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| 522 | 522 | interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; |
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| 523 | 523 | interrupt-names = "msi"; |
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| .. | .. |
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| 567 | 567 | #address-cells = <3>; |
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| 568 | 568 | #size-cells = <2>; |
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| 569 | 569 | |
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| 570 | | - ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */ |
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| 571 | | - 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */ |
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| 570 | + ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000 /* I/O */ |
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| 571 | + 0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */ |
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| 572 | 572 | |
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| 573 | 573 | interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; |
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| 574 | 574 | interrupt-names = "msi"; |
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