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2024-05-11 645e752c5a84baeb21015cdc85fc05b7d16312c8 
 kernel/arch/arm/boot/dts/omap3-n900.dts
....@@ -1,16 +1,14 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
34  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License version 2 (or later) as
7
- * published by the Free Software Foundation.
85  */
96 
107 /dts-v1/;
118 
129 #include "omap34xx.dtsi"
1310 #include <dt-bindings/input/input.h>
11
+#include <dt-bindings/leds/common.h>
1412 
1513 /*
1614  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
....@@ -22,7 +20,11 @@
2220  * but it is not widely used and to prevent kernel crash rather AES is disabled.
2321  * There is also no runtime detection code if AES is disabled in L3 firewall...
2422  */
25
-&aes {
23
+&aes1_target {
24
+	status = "disabled";
25
+};
26
+
27
+&aes2_target {
2628 	status = "disabled";
2729 };
2830 
....@@ -108,6 +110,14 @@
108110 			linux,code = <SW_FRONT_PROXIMITY>;
109111 			linux,can-disable;
110112 		};
113
+
114
+		machine_cover {
115
+			label = "Machine Cover";
116
+			gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
117
+			linux,input-type = <EV_SW>;
118
+			linux,code = <SW_MACHINE_COVER>;
119
+			linux,can-disable;
120
+		};
111121 	};
112122 
113123 	isp1707: isp1707 {
....@@ -146,7 +156,7 @@
146156 		io-channel-names = "temp", "bsi", "vbat";
147157 	};
148158 
149
-	pwm9: dmtimer-pwm {
159
+	pwm9: pwm-9 {
150160 		compatible = "ti,omap-dmtimer-pwm";
151161 		#pwm-cells = <3>;
152162 		ti,timers = <&timer9>;
....@@ -226,27 +236,27 @@
226236 		pinctrl-single,pins = <
227237 
228238 			/* address lines */
229
-                        OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
230
-                        OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
231
-                        OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
239
+			OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
240
+			OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
241
+			OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
232242 
233243 			/* data lines, gpmc_d0..d7 not muxable according to TRM */
234
-                        OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
235
-                        OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
236
-                        OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
237
-                        OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
238
-                        OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
239
-                        OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
240
-                        OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
241
-                        OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
244
+			OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
245
+			OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
246
+			OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
247
+			OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
248
+			OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
249
+			OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
250
+			OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
251
+			OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
242252 
243253 			/*
244254 			 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
245255 			 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
246256 			 */
247
-                        OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
248
-                        OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
249
-		>;
257
+			OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
258
+			OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
259
+			>;
250260 	};
251261 
252262 	i2c1_pins: pinmux_i2c1_pins {
....@@ -485,6 +495,11 @@
485495 	regulator-always-on;
486496 };
487497 
498
+/* First two dma channels are reserved on secure omap3 */
499
+&sdma {
500
+	dma-channel-mask = <0xfffffffc>;
501
+};
502
+
488503 &twl {
489504 	twl_audio: audio {
490505 		compatible = "ti,twl4030-audio";
....@@ -616,63 +631,92 @@
616631 	};
617632 
618633 	lp5523: lp5523@32 {
634
+		#address-cells = <1>;
635
+		#size-cells = <0>;
619636 		compatible = "national,lp5523";
620637 		reg = <0x32>;
621638 		clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
622
-		enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
639
+		enable-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
623640 
624
-		chan0 {
641
+		led@0 {
642
+			reg = <0>;
625643 			chan-name = "lp5523:kb1";
626644 			led-cur = /bits/ 8 <50>;
627645 			max-cur = /bits/ 8 <100>;
646
+			color = <LED_COLOR_ID_WHITE>;
647
+			function = LED_FUNCTION_KBD_BACKLIGHT;
628648 		};
629649 
630
-		chan1 {
650
+		led@1 {
651
+			reg = <1>;
631652 			chan-name = "lp5523:kb2";
632653 			led-cur = /bits/ 8 <50>;
633654 			max-cur = /bits/ 8 <100>;
655
+			color = <LED_COLOR_ID_WHITE>;
656
+			function = LED_FUNCTION_KBD_BACKLIGHT;
634657 		};
635658 
636
-		chan2 {
659
+		led@2 {
660
+			reg = <2>;
637661 			chan-name = "lp5523:kb3";
638662 			led-cur = /bits/ 8 <50>;
639663 			max-cur = /bits/ 8 <100>;
664
+			color = <LED_COLOR_ID_WHITE>;
665
+			function = LED_FUNCTION_KBD_BACKLIGHT;
640666 		};
641667 
642
-		chan3 {
668
+		led@3 {
669
+			reg = <3>;
643670 			chan-name = "lp5523:kb4";
644671 			led-cur = /bits/ 8 <50>;
645672 			max-cur = /bits/ 8 <100>;
673
+			color = <LED_COLOR_ID_WHITE>;
674
+			function = LED_FUNCTION_KBD_BACKLIGHT;
646675 		};
647676 
648
-		chan4 {
677
+		led@4 {
678
+			reg = <4>;
649679 			chan-name = "lp5523:b";
650680 			led-cur = /bits/ 8 <50>;
651681 			max-cur = /bits/ 8 <100>;
682
+			color = <LED_COLOR_ID_BLUE>;
683
+			function = LED_FUNCTION_STATUS;
652684 		};
653685 
654
-		chan5 {
686
+		led@5 {
687
+			reg = <5>;
655688 			chan-name = "lp5523:g";
656689 			led-cur = /bits/ 8 <50>;
657690 			max-cur = /bits/ 8 <100>;
691
+			color = <LED_COLOR_ID_GREEN>;
692
+			function = LED_FUNCTION_STATUS;
658693 		};
659694 
660
-		chan6 {
695
+		led@6 {
696
+			reg = <6>;
661697 			chan-name = "lp5523:r";
662698 			led-cur = /bits/ 8 <50>;
663699 			max-cur = /bits/ 8 <100>;
700
+			color = <LED_COLOR_ID_RED>;
701
+			function = LED_FUNCTION_STATUS;
664702 		};
665703 
666
-		chan7 {
704
+		led@7 {
705
+			reg = <7>;
667706 			chan-name = "lp5523:kb5";
668707 			led-cur = /bits/ 8 <50>;
669708 			max-cur = /bits/ 8 <100>;
709
+			color = <LED_COLOR_ID_WHITE>;
710
+			function = LED_FUNCTION_KBD_BACKLIGHT;
670711 		};
671712 
672
-		chan8 {
713
+		led@8 {
714
+			reg = <8>;
673715 			chan-name = "lp5523:kb6";
674716 			led-cur = /bits/ 8 <50>;
675717 			max-cur = /bits/ 8 <100>;
718
+			color = <LED_COLOR_ID_WHITE>;
719
+			function = LED_FUNCTION_KBD_BACKLIGHT;
676720 		};
677721 	};
678722 
....@@ -694,12 +738,12 @@
694738 
695739 	si4713: si4713@63 {
696740 		compatible = "silabs,si4713";
697
-                reg = <0x63>;
741
+		reg = <0x63>;
698742 
699
-                interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
700
-                reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
701
-                vio-supply = <&vio>;
702
-                vdd-supply = <&vaux1>;
743
+		interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
744
+		reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
745
+		vio-supply = <&vio>;
746
+		vdd-supply = <&vaux1>;
703747 	};
704748 
705749 	bq24150a: bq24150a@6b {
....@@ -817,10 +861,6 @@
817861 	pinctrl-0 = <&mmc1_pins>;
818862 	vmmc-supply = <&vmmc1>;
819863 	bus-width = <4>;
820
-	/* For debugging, it is often good idea to remove this GPIO.
821
-	   It means you can remove back cover (to reboot by removing
822
-	   battery) and still use the MMC card. */
823
-	cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
824864 };
825865 
826866 /* most boards use vaux3, only some old versions use vmmc2 instead */
....@@ -1034,6 +1074,11 @@
10341074 	};
10351075 };
10361076 
1077
+/* RNG not directly accessible on n900, see omap3-rom-rng instead */
1078
+&rng_target {
1079
+	status = "disabled";
1080
+};
1081
+
10371082 &usb_otg_hs {
10381083 	interface-type = <0>;
10391084 	usb-phy = <&usb2_phy>;
....@@ -1068,7 +1113,7 @@
10681113 };
10691114 
10701115 &dss {
1071
-	status = "ok";
1116
+	status = "okay";
10721117 
10731118 	pinctrl-names = "default";
10741119 	pinctrl-0 = <&dss_sdi_pins>;
....@@ -1091,7 +1136,7 @@
10911136 };
10921137 
10931138 &venc {
1094
-	status = "ok";
1139
+	status = "okay";
10951140 
10961141 	vdda-supply = <&vdac>;
10971142 
....@@ -1104,7 +1149,7 @@
11041149 };
11051150 
11061151 &mcbsp2 {
1107
-	status = "ok";
1152
+	status = "okay";
11081153 };
11091154 
11101155 &ssi_port1 {