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| 1 | +// SPDX-License-Identifier: GPL-2.0+ OR MIT |
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| 1 | 2 | /* |
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| 2 | | - * Copyright 2014-2016 Toradex AG |
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| 3 | + * Copyright 2014-2020 Toradex |
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| 3 | 4 | * Copyright 2012 Freescale Semiconductor, Inc. |
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| 4 | 5 | * Copyright 2011 Linaro Ltd. |
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| 5 | | - * |
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| 6 | | - * This file is dual-licensed: you can use it either under the terms |
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| 7 | | - * of the GPL or the X11 license, at your option. Note that this dual |
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| 8 | | - * licensing only applies to this file, and not this project as a |
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| 9 | | - * whole. |
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| 10 | | - * |
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| 11 | | - * a) This file is free software; you can redistribute it and/or |
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| 12 | | - * modify it under the terms of the GNU General Public License |
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| 13 | | - * version 2 as published by the Free Software Foundation. |
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| 14 | | - * |
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| 15 | | - * This file is distributed in the hope that it will be useful, |
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| 16 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 17 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 18 | | - * GNU General Public License for more details. |
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| 19 | | - * |
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| 20 | | - * Or, alternatively, |
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| 21 | | - * |
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| 22 | | - * b) Permission is hereby granted, free of charge, to any person |
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| 23 | | - * obtaining a copy of this software and associated documentation |
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| 24 | | - * files (the "Software"), to deal in the Software without |
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| 25 | | - * restriction, including without limitation the rights to use, |
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| 26 | | - * copy, modify, merge, publish, distribute, sublicense, and/or |
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| 27 | | - * sell copies of the Software, and to permit persons to whom the |
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| 28 | | - * Software is furnished to do so, subject to the following |
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| 29 | | - * conditions: |
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| 30 | | - * |
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| 31 | | - * The above copyright notice and this permission notice shall be |
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| 32 | | - * included in all copies or substantial portions of the Software. |
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| 33 | | - * |
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| 34 | | - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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| 35 | | - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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| 36 | | - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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| 37 | | - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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| 38 | | - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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| 39 | | - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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| 40 | | - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 41 | | - * OTHER DEALINGS IN THE SOFTWARE. |
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| 42 | 6 | */ |
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| 43 | 7 | |
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| 44 | 8 | /dts-v1/; |
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| .. | .. |
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| 55 | 19 | |
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| 56 | 20 | /* Will be filled by the bootloader */ |
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| 57 | 21 | memory@10000000 { |
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| 22 | + device_type = "memory"; |
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| 58 | 23 | reg = <0x10000000 0>; |
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| 59 | 24 | }; |
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| 60 | 25 | |
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| .. | .. |
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| 146 | 111 | &ecspi4 { |
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| 147 | 112 | status = "okay"; |
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| 148 | 113 | |
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| 149 | | - mcp251x0: mcp251x@1 { |
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| 114 | + mcp251x0: mcp251x@0 { |
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| 150 | 115 | compatible = "microchip,mcp2515"; |
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| 151 | 116 | reg = <0>; |
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| 152 | 117 | clocks = <&clk16m>; |
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| .. | .. |
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| 167 | 132 | &i2c3 { |
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| 168 | 133 | status = "okay"; |
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| 169 | 134 | |
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| 135 | + /* |
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| 136 | + * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>, |
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| 137 | + * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms |
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| 138 | + */ |
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| 139 | + touchscreen@4a { |
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| 140 | + compatible = "atmel,maxtouch"; |
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| 141 | + pinctrl-names = "default"; |
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| 142 | + pinctrl-0 = <&pinctrl_pcap_1>; |
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| 143 | + reg = <0x4a>; |
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| 144 | + interrupt-parent = <&gpio1>; |
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| 145 | + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ |
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| 146 | + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ |
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| 147 | + status = "disabled"; |
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| 148 | + }; |
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| 149 | + |
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| 170 | 150 | /* M41T0M6 real time clock on carrier board */ |
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| 171 | 151 | rtc_i2c: rtc@68 { |
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| 172 | 152 | compatible = "st,m41t0"; |
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| 173 | 153 | reg = <0x68>; |
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| 154 | + }; |
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| 155 | +}; |
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| 156 | + |
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| 157 | +&iomuxc { |
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| 158 | + pinctrl-names = "default"; |
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| 159 | + pinctrl-0 = < |
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| 160 | + &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2 |
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| 161 | + &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4 |
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| 162 | + &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6 |
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| 163 | + &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1 |
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| 164 | + >; |
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| 165 | + |
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| 166 | + pinctrl_pcap_1: pcap1grp { |
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| 167 | + fsl,pins = < |
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| 168 | + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */ |
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| 169 | + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */ |
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| 170 | + >; |
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| 171 | + }; |
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| 172 | + |
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| 173 | + pinctrl_mxt_ts: mxttsgrp { |
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| 174 | + fsl,pins = < |
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| 175 | + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */ |
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| 176 | + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */ |
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| 177 | + >; |
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| 174 | 178 | }; |
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| 175 | 179 | }; |
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| 176 | 180 | |
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| .. | .. |
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| 227 | 231 | &weim { |
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| 228 | 232 | status = "okay"; |
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| 229 | 233 | |
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| 230 | | - /* weim memory map: 32MB on CS0, 32MB on CS1, 32MB on CS2 */ |
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| 234 | + /* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */ |
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| 231 | 235 | ranges = <0 0 0x08000000 0x02000000 |
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| 232 | 236 | 1 0 0x0a000000 0x02000000 |
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| 233 | | - 2 0 0x0c000000 0x02000000>; |
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| 237 | + 2 0 0x0c000000 0x02000000 |
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| 238 | + 3 0 0x0e000000 0x02000000>; |
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| 234 | 239 | |
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| 235 | 240 | /* SRAM on Colibri nEXT_CS0 */ |
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| 236 | 241 | sram@0,0 { |
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| 237 | | - compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; |
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| 242 | + compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram"; |
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| 238 | 243 | reg = <0 0 0x00010000>; |
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| 239 | 244 | #address-cells = <1>; |
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| 240 | 245 | #size-cells = <1>; |
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| .. | .. |
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| 245 | 250 | |
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| 246 | 251 | /* SRAM on Colibri nEXT_CS1 */ |
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| 247 | 252 | sram@1,0 { |
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| 248 | | - compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; |
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| 253 | + compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram"; |
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| 249 | 254 | reg = <1 0 0x00010000>; |
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| 250 | 255 | #address-cells = <1>; |
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| 251 | 256 | #size-cells = <1>; |
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