| .. | .. |
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| 55 | 55 | interrupt-parent = <&avic>; |
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| 56 | 56 | ranges; |
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| 57 | 57 | |
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| 58 | | - iram: iram@1fffc000 { |
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| 58 | + iram: sram@1fffc000 { |
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| 59 | 59 | compatible = "mmio-sram"; |
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| 60 | 60 | reg = <0x1fffc000 0x4000>; |
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| 61 | 61 | #address-cells = <1>; |
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| .. | .. |
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| 63 | 63 | ranges = <0 0x1fffc000 0x4000>; |
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| 64 | 64 | }; |
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| 65 | 65 | |
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| 66 | | - aips@43f00000 { /* AIPS1 */ |
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| 66 | + bus@43f00000 { /* AIPS1 */ |
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| 67 | 67 | compatible = "fsl,aips-bus", "simple-bus"; |
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| 68 | 68 | #address-cells = <1>; |
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| 69 | 69 | #size-cells = <1>; |
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| .. | .. |
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| 173 | 173 | reg = <0x50000000 0x100000>; |
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| 174 | 174 | ranges; |
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| 175 | 175 | |
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| 176 | | - sdhci1: sdhci@50004000 { |
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| 176 | + sdhci1: mmc@50004000 { |
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| 177 | 177 | compatible = "fsl,imx31-mmc"; |
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| 178 | 178 | reg = <0x50004000 0x4000>; |
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| 179 | 179 | interrupts = <9>; |
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| .. | .. |
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| 184 | 184 | status = "disabled"; |
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| 185 | 185 | }; |
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| 186 | 186 | |
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| 187 | | - sdhci2: sdhci@50008000 { |
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| 187 | + sdhci2: mmc@50008000 { |
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| 188 | 188 | compatible = "fsl,imx31-mmc"; |
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| 189 | 189 | reg = <0x50008000 0x4000>; |
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| 190 | 190 | interrupts = <8>; |
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| .. | .. |
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| 204 | 204 | status = "disabled"; |
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| 205 | 205 | }; |
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| 206 | 206 | |
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| 207 | | - spi2: cspi@50010000 { |
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| 207 | + spi2: spi@50010000 { |
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| 208 | 208 | compatible = "fsl,imx31-cspi"; |
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| 209 | 209 | reg = <0x50010000 0x4000>; |
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| 210 | 210 | interrupts = <13>; |
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| .. | .. |
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| 217 | 217 | status = "disabled"; |
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| 218 | 218 | }; |
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| 219 | 219 | |
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| 220 | | - iim: iim@5001c000 { |
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| 220 | + iim: efuse@5001c000 { |
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| 221 | 221 | compatible = "fsl,imx31-iim", "fsl,imx27-iim"; |
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| 222 | 222 | reg = <0x5001c000 0x1000>; |
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| 223 | 223 | interrupts = <19>; |
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| .. | .. |
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| 225 | 225 | }; |
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| 226 | 226 | }; |
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| 227 | 227 | |
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| 228 | | - aips@53f00000 { /* AIPS2 */ |
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| 228 | + bus@53f00000 { /* AIPS2 */ |
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| 229 | 229 | compatible = "fsl,aips-bus", "simple-bus"; |
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| 230 | 230 | #address-cells = <1>; |
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| 231 | 231 | #size-cells = <1>; |
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| .. | .. |
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| 239 | 239 | #clock-cells = <1>; |
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| 240 | 240 | }; |
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| 241 | 241 | |
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| 242 | | - spi3: cspi@53f84000 { |
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| 242 | + spi3: spi@53f84000 { |
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| 243 | 243 | compatible = "fsl,imx31-cspi"; |
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| 244 | 244 | reg = <0x53f84000 0x4000>; |
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| 245 | 245 | interrupts = <17>; |
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| .. | .. |
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| 297 | 297 | #interrupt-cells = <2>; |
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| 298 | 298 | }; |
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| 299 | 299 | |
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| 300 | | - sdma: sdma@53fd4000 { |
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| 300 | + sdma: dma-controller@53fd4000 { |
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| 301 | 301 | compatible = "fsl,imx31-sdma"; |
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| 302 | 302 | reg = <0x53fd4000 0x4000>; |
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| 303 | 303 | interrupts = <34>; |
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| .. | .. |
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| 327 | 327 | interrupts = <26>; |
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| 328 | 328 | clocks = <&clks 10>, <&clks 42>; |
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| 329 | 329 | clock-names = "ipg", "per"; |
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| 330 | | - #pwm-cells = <2>; |
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| 330 | + #pwm-cells = <3>; |
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| 331 | 331 | status = "disabled"; |
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| 332 | 332 | }; |
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| 333 | 333 | }; |
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