| .. | .. |
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| 7 | 7 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
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| 8 | 8 | */ |
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| 9 | 9 | |
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| 10 | | -#include "skeleton.dtsi" |
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| 11 | 10 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
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| 12 | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
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| 13 | 12 | |
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| 14 | 13 | #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) |
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| 15 | 14 | |
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| 16 | 15 | / { |
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| 16 | + #address-cells = <1>; |
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| 17 | + #size-cells = <1>; |
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| 17 | 18 | model = "Marvell Armada 39x family SoC"; |
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| 18 | 19 | compatible = "marvell,armada390"; |
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| 19 | 20 | |
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| .. | .. |
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| 107 | 108 | #address-cells = <1>; |
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| 108 | 109 | #size-cells = <0>; |
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| 109 | 110 | interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
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| 110 | | - timeout-ms = <1000>; |
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| 111 | 111 | clocks = <&coreclk 0>; |
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| 112 | 112 | status = "disabled"; |
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| 113 | 113 | }; |
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| .. | .. |
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| 118 | 118 | #address-cells = <1>; |
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| 119 | 119 | #size-cells = <0>; |
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| 120 | 120 | interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; |
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| 121 | | - timeout-ms = <1000>; |
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| 122 | 121 | clocks = <&coreclk 0>; |
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| 123 | 122 | status = "disabled"; |
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| 124 | 123 | }; |
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| .. | .. |
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| 129 | 128 | #address-cells = <1>; |
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| 130 | 129 | #size-cells = <0>; |
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| 131 | 130 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
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| 132 | | - timeout-ms = <1000>; |
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| 133 | 131 | clocks = <&coreclk 0>; |
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| 134 | 132 | status = "disabled"; |
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| 135 | 133 | }; |
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| .. | .. |
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| 140 | 138 | #address-cells = <1>; |
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| 141 | 139 | #size-cells = <0>; |
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| 142 | 140 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
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| 143 | | - timeout-ms = <1000>; |
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| 144 | 141 | clocks = <&coreclk 0>; |
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| 145 | 142 | status = "disabled"; |
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| 146 | 143 | }; |
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| .. | .. |
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| 456 | 453 | /* x1 port */ |
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| 457 | 454 | pcie@2,0 { |
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| 458 | 455 | device_type = "pci"; |
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| 459 | | - assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; |
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| 456 | + assigned-addresses = <0x82001000 0 0x40000 0 0x2000>; |
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| 460 | 457 | reg = <0x1000 0 0 0 0>; |
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| 461 | 458 | #address-cells = <3>; |
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| 462 | 459 | #size-cells = <2>; |
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| .. | .. |
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| 475 | 472 | /* x1 port */ |
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| 476 | 473 | pcie@3,0 { |
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| 477 | 474 | device_type = "pci"; |
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| 478 | | - assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; |
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| 475 | + assigned-addresses = <0x82001800 0 0x44000 0 0x2000>; |
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| 479 | 476 | reg = <0x1800 0 0 0 0>; |
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| 480 | 477 | #address-cells = <3>; |
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| 481 | 478 | #size-cells = <2>; |
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| .. | .. |
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| 497 | 494 | */ |
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| 498 | 495 | pcie@4,0 { |
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| 499 | 496 | device_type = "pci"; |
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| 500 | | - assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; |
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| 497 | + assigned-addresses = <0x82002000 0 0x48000 0 0x2000>; |
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| 501 | 498 | reg = <0x2000 0 0 0 0>; |
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| 502 | 499 | #address-cells = <3>; |
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| 503 | 500 | #size-cells = <2>; |
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