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2024-05-10 61598093bbdd283a7edc367d900f223070ead8d2 
 kernel/include/uapi/linux/ethtool.h
....@@ -91,10 +91,6 @@
9191  * %ETHTOOL_GSET to get the current values before making specific
9292  * changes and then applying them with %ETHTOOL_SSET.
9393  *
94
- * Drivers that implement set_settings() should validate all fields
95
- * other than @cmd that are not described as read-only or deprecated,
96
- * and must ignore all fields described as read-only.
97
- *
9894  * Deprecated fields should be ignored by both users and drivers.
9995  */
10096 struct ethtool_cmd {
....@@ -256,9 +252,39 @@
256252 #define DOWNSHIFT_DEV_DEFAULT_COUNT	0xff
257253 #define DOWNSHIFT_DEV_DISABLE		0
258254 
255
+/* Time in msecs after which link is reported as down
256
+ * 0 = lowest time supported by the PHY
257
+ * 0xff = off, link down detection according to standard
258
+ */
259
+#define ETHTOOL_PHY_FAST_LINK_DOWN_ON	0
260
+#define ETHTOOL_PHY_FAST_LINK_DOWN_OFF	0xff
261
+
262
+/* Energy Detect Power Down (EDPD) is a feature supported by some PHYs, where
263
+ * the PHY's RX & TX blocks are put into a low-power mode when there is no
264
+ * link detected (typically cable is un-plugged). For RX, only a minimal
265
+ * link-detection is available, and for TX the PHY wakes up to send link pulses
266
+ * to avoid any lock-ups in case the peer PHY may also be running in EDPD mode.
267
+ *
268
+ * Some PHYs may support configuration of the wake-up interval for TX pulses,
269
+ * and some PHYs may support only disabling TX pulses entirely. For the latter
270
+ * a special value is required (ETHTOOL_PHY_EDPD_NO_TX) so that this can be
271
+ * configured from userspace (should the user want it).
272
+ *
273
+ * The interval units for TX wake-up are in milliseconds, since this should
274
+ * cover a reasonable range of intervals:
275
+ *  - from 1 millisecond, which does not sound like much of a power-saver
276
+ *  - to ~65 seconds which is quite a lot to wait for a link to come up when
277
+ *    plugging a cable
278
+ */
279
+#define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS		0xffff
280
+#define ETHTOOL_PHY_EDPD_NO_TX			0xfffe
281
+#define ETHTOOL_PHY_EDPD_DISABLE		0
282
+
259283 enum phy_tunable_id {
260284 	ETHTOOL_PHY_ID_UNSPEC,
261285 	ETHTOOL_PHY_DOWNSHIFT,
286
+	ETHTOOL_PHY_FAST_LINK_DOWN,
287
+	ETHTOOL_PHY_EDPD,
262288 	/*
263289 	 * Add your fresh new phy tunable attribute above and remember to update
264290 	 * phy_tunable_strings[] in net/ethtool/common.c
....@@ -553,6 +579,76 @@
553579 	__u32	tx_pause;
554580 };
555581 
582
+/**
583
+ * enum ethtool_link_ext_state - link extended state
584
+ */
585
+enum ethtool_link_ext_state {
586
+	ETHTOOL_LINK_EXT_STATE_AUTONEG,
587
+	ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
588
+	ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
589
+	ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
590
+	ETHTOOL_LINK_EXT_STATE_NO_CABLE,
591
+	ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
592
+	ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE,
593
+	ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE,
594
+	ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED,
595
+	ETHTOOL_LINK_EXT_STATE_OVERHEAT,
596
+};
597
+
598
+/**
599
+ * enum ethtool_link_ext_substate_autoneg - more information in addition to
600
+ * ETHTOOL_LINK_EXT_STATE_AUTONEG.
601
+ */
602
+enum ethtool_link_ext_substate_autoneg {
603
+	ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED = 1,
604
+	ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED,
605
+	ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED,
606
+	ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE,
607
+	ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE,
608
+	ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD,
609
+};
610
+
611
+/**
612
+ * enum ethtool_link_ext_substate_link_training - more information in addition to
613
+ * ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE.
614
+ */
615
+enum ethtool_link_ext_substate_link_training {
616
+	ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED = 1,
617
+	ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT,
618
+	ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY,
619
+	ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT,
620
+};
621
+
622
+/**
623
+ * enum ethtool_link_ext_substate_logical_mismatch - more information in addition
624
+ * to ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH.
625
+ */
626
+enum ethtool_link_ext_substate_link_logical_mismatch {
627
+	ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK = 1,
628
+	ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK,
629
+	ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS,
630
+	ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED,
631
+	ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED,
632
+};
633
+
634
+/**
635
+ * enum ethtool_link_ext_substate_bad_signal_integrity - more information in
636
+ * addition to ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY.
637
+ */
638
+enum ethtool_link_ext_substate_bad_signal_integrity {
639
+	ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS = 1,
640
+	ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE,
641
+};
642
+
643
+/**
644
+ * enum ethtool_link_ext_substate_cable_issue - more information in
645
+ * addition to ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE.
646
+ */
647
+enum ethtool_link_ext_substate_cable_issue {
648
+	ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE = 1,
649
+	ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE,
650
+};
651
+
556652 #define ETH_GSTRING_LEN		32
557653 
558654 /**
....@@ -567,6 +663,13 @@
567663  * @ETH_SS_RSS_HASH_FUNCS: RSS hush function names
568664  * @ETH_SS_PHY_STATS: Statistic names, for use with %ETHTOOL_GPHYSTATS
569665  * @ETH_SS_PHY_TUNABLES: PHY tunable names
666
+ * @ETH_SS_LINK_MODES: link mode names
667
+ * @ETH_SS_MSG_CLASSES: debug message class names
668
+ * @ETH_SS_WOL_MODES: wake-on-lan modes
669
+ * @ETH_SS_SOF_TIMESTAMPING: SOF_TIMESTAMPING_* flags
670
+ * @ETH_SS_TS_TX_TYPES: timestamping Tx types
671
+ * @ETH_SS_TS_RX_FILTERS: timestamping Rx filters
672
+ * @ETH_SS_UDP_TUNNEL_TYPES: UDP tunnel types
570673  */
571674 enum ethtool_stringset {
572675 	ETH_SS_TEST		= 0,
....@@ -578,6 +681,16 @@
578681 	ETH_SS_TUNABLES,
579682 	ETH_SS_PHY_STATS,
580683 	ETH_SS_PHY_TUNABLES,
684
+	ETH_SS_LINK_MODES,
685
+	ETH_SS_MSG_CLASSES,
686
+	ETH_SS_WOL_MODES,
687
+	ETH_SS_SOF_TIMESTAMPING,
688
+	ETH_SS_TS_TX_TYPES,
689
+	ETH_SS_TS_RX_FILTERS,
690
+	ETH_SS_UDP_TUNNEL_TYPES,
691
+
692
+	/* add new constants above here */
693
+	ETH_SS_COUNT
581694 };
582695 
583696 /**
....@@ -886,7 +999,7 @@
886999 	__u32		location;
8871000 };
8881001 
889
-/* How rings are layed out when accessing virtual functions or
1002
+/* How rings are laid out when accessing virtual functions or
8901003  * offloaded queues is device specific. To allow users to do flow
8911004  * steering and specify these queues the ring cookie is partitioned
8921005  * into a 32bit queue index with an 8 bit virtual function id.
....@@ -895,7 +1008,7 @@
8951008  * devices start supporting PCIe w/ARI. However at the moment I
8961009  * do not know of any devices that support this so I do not reserve
8971010  * space for this at this time. If a future patch consumes the next
898
- * byte it should be aware of this possiblity.
1011
+ * byte it should be aware of this possibility.
8991012  */
9001013 #define ETHTOOL_RX_FLOW_SPEC_RING	0x00000000FFFFFFFFLL
9011014 #define ETHTOOL_RX_FLOW_SPEC_RING_VF	0x000000FF00000000LL
....@@ -1295,6 +1408,7 @@
12951408 	ETHTOOL_FEC_OFF_BIT,
12961409 	ETHTOOL_FEC_RS_BIT,
12971410 	ETHTOOL_FEC_BASER_BIT,
1411
+	ETHTOOL_FEC_LLRS_BIT,
12981412 };
12991413 
13001414 #define ETHTOOL_FEC_NONE		(1 << ETHTOOL_FEC_NONE_BIT)
....@@ -1302,6 +1416,7 @@
13021416 #define ETHTOOL_FEC_OFF			(1 << ETHTOOL_FEC_OFF_BIT)
13031417 #define ETHTOOL_FEC_RS			(1 << ETHTOOL_FEC_RS_BIT)
13041418 #define ETHTOOL_FEC_BASER		(1 << ETHTOOL_FEC_BASER_BIT)
1419
+#define ETHTOOL_FEC_LLRS		(1 << ETHTOOL_FEC_LLRS_BIT)
13051420 
13061421 /* CMDs currently supported */
13071422 #define ETHTOOL_GSET		0x00000001 /* DEPRECATED, Get settings.
....@@ -1436,6 +1551,13 @@
14361551 	ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT	= 29,
14371552 	ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT	= 30,
14381553 	ETHTOOL_LINK_MODE_25000baseCR_Full_BIT	= 31,
1554
+
1555
+	/* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit
1556
+	 * 31. Please do NOT define any SUPPORTED_* or ADVERTISED_*
1557
+	 * macro for bits > 31. The only way to use indices > 31 is to
1558
+	 * use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API.
1559
+	 */
1560
+
14391561 	ETHTOOL_LINK_MODE_25000baseKR_Full_BIT	= 32,
14401562 	ETHTOOL_LINK_MODE_25000baseSR_Full_BIT	= 33,
14411563 	ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT	= 34,
....@@ -1457,15 +1579,48 @@
14571579 	ETHTOOL_LINK_MODE_FEC_NONE_BIT	= 49,
14581580 	ETHTOOL_LINK_MODE_FEC_RS_BIT	= 50,
14591581 	ETHTOOL_LINK_MODE_FEC_BASER_BIT	= 51,
1460
-
1461
-	/* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit
1462
-	 * 31. Please do NOT define any SUPPORTED_* or ADVERTISED_*
1463
-	 * macro for bits > 31. The only way to use indices > 31 is to
1464
-	 * use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API.
1465
-	 */
1466
-
1467
-	__ETHTOOL_LINK_MODE_LAST
1468
-	  = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
1582
+	ETHTOOL_LINK_MODE_50000baseKR_Full_BIT		 = 52,
1583
+	ETHTOOL_LINK_MODE_50000baseSR_Full_BIT		 = 53,
1584
+	ETHTOOL_LINK_MODE_50000baseCR_Full_BIT		 = 54,
1585
+	ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT	 = 55,
1586
+	ETHTOOL_LINK_MODE_50000baseDR_Full_BIT		 = 56,
1587
+	ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT	 = 57,
1588
+	ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT	 = 58,
1589
+	ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT	 = 59,
1590
+	ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60,
1591
+	ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT	 = 61,
1592
+	ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT	 = 62,
1593
+	ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT	 = 63,
1594
+	ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,
1595
+	ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT	 = 65,
1596
+	ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT	 = 66,
1597
+	ETHTOOL_LINK_MODE_100baseT1_Full_BIT		 = 67,
1598
+	ETHTOOL_LINK_MODE_1000baseT1_Full_BIT		 = 68,
1599
+	ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT	 = 69,
1600
+	ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT	 = 70,
1601
+	ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
1602
+	ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT	 = 72,
1603
+	ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT	 = 73,
1604
+	ETHTOOL_LINK_MODE_FEC_LLRS_BIT			 = 74,
1605
+	ETHTOOL_LINK_MODE_100000baseKR_Full_BIT		 = 75,
1606
+	ETHTOOL_LINK_MODE_100000baseSR_Full_BIT		 = 76,
1607
+	ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT	 = 77,
1608
+	ETHTOOL_LINK_MODE_100000baseCR_Full_BIT		 = 78,
1609
+	ETHTOOL_LINK_MODE_100000baseDR_Full_BIT		 = 79,
1610
+	ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT	 = 80,
1611
+	ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT	 = 81,
1612
+	ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT = 82,
1613
+	ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT	 = 83,
1614
+	ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT	 = 84,
1615
+	ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT	 = 85,
1616
+	ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT	 = 86,
1617
+	ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87,
1618
+	ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT	 = 88,
1619
+	ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT	 = 89,
1620
+	ETHTOOL_LINK_MODE_100baseFX_Half_BIT		 = 90,
1621
+	ETHTOOL_LINK_MODE_100baseFX_Full_BIT		 = 91,
1622
+	/* must be last entry */
1623
+	__ETHTOOL_LINK_MODE_MASK_NBITS
14691624 };
14701625 
14711626 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name)	\
....@@ -1573,12 +1728,14 @@
15731728 #define SPEED_50000		50000
15741729 #define SPEED_56000		56000
15751730 #define SPEED_100000		100000
1731
+#define SPEED_200000		200000
1732
+#define SPEED_400000		400000
15761733 
15771734 #define SPEED_UNKNOWN		-1
15781735 
15791736 static inline int ethtool_validate_speed(__u32 speed)
15801737 {
1581
-	return speed <= INT_MAX || speed == SPEED_UNKNOWN;
1738
+	return speed <= INT_MAX || speed == (__u32)SPEED_UNKNOWN;
15821739 }
15831740 
15841741 /* Duplex, half or full. */
....@@ -1597,6 +1754,18 @@
15971754 
15981755 	return 0;
15991756 }
1757
+
1758
+#define MASTER_SLAVE_CFG_UNSUPPORTED		0
1759
+#define MASTER_SLAVE_CFG_UNKNOWN		1
1760
+#define MASTER_SLAVE_CFG_MASTER_PREFERRED	2
1761
+#define MASTER_SLAVE_CFG_SLAVE_PREFERRED	3
1762
+#define MASTER_SLAVE_CFG_MASTER_FORCE		4
1763
+#define MASTER_SLAVE_CFG_SLAVE_FORCE		5
1764
+#define MASTER_SLAVE_STATE_UNSUPPORTED		0
1765
+#define MASTER_SLAVE_STATE_UNKNOWN		1
1766
+#define MASTER_SLAVE_STATE_MASTER		2
1767
+#define MASTER_SLAVE_STATE_SLAVE		3
1768
+#define MASTER_SLAVE_STATE_ERR			4
16001769 
16011770 /* Which connector port. */
16021771 #define PORT_TP			0x00
....@@ -1636,6 +1805,8 @@
16361805 #define WAKE_MAGIC		(1 << 5)
16371806 #define WAKE_MAGICSECURE	(1 << 6) /* only meaningful if WAKE_MAGIC */
16381807 #define WAKE_FILTER		(1 << 7)
1808
+
1809
+#define WOL_MODE_COUNT		8
16391810 
16401811 /* L2-L4 network traffic flow types */
16411812 #define	TCP_V4_FLOW	0x01	/* hash or spec (tcp_ip4_spec) */
....@@ -1690,6 +1861,9 @@
16901861 #define ETH_MODULE_SFF_8636_LEN		256
16911862 #define ETH_MODULE_SFF_8436		0x4
16921863 #define ETH_MODULE_SFF_8436_LEN		256
1864
+
1865
+#define ETH_MODULE_SFF_8636_MAX_LEN     640
1866
+#define ETH_MODULE_SFF_8436_MAX_LEN     640
16931867 
16941868 /* Reset flags */
16951869 /* The reset() operation must clear the flags for the components which
....@@ -1800,14 +1974,9 @@
18001974  * rejected.
18011975  *
18021976  * Deprecated %ethtool_cmd fields transceiver, maxtxpkt and maxrxpkt
1803
- * are not available in %ethtool_link_settings. Until all drivers are
1804
- * converted to ignore them or to the new %ethtool_link_settings API,
1805
- * for both queries and changes, users should always try
1806
- * %ETHTOOL_GLINKSETTINGS first, and if it fails with -ENOTSUPP stick
1807
- * only to %ETHTOOL_GSET and %ETHTOOL_SSET consistently. If it
1808
- * succeeds, then users should stick to %ETHTOOL_GLINKSETTINGS and
1809
- * %ETHTOOL_SLINKSETTINGS (which would support drivers implementing
1810
- * either %ethtool_cmd or %ethtool_link_settings).
1977
+ * are not available in %ethtool_link_settings. These fields will be
1978
+ * always set to zero in %ETHTOOL_GSET reply and %ETHTOOL_SSET will
1979
+ * fail if any of them is set to non-zero value.
18111980  *
18121981  * Users should assume that all fields not marked read-only are
18131982  * writable and subject to validation by the driver.  They should use
....@@ -1836,7 +2005,9 @@
18362005 	__u8	eth_tp_mdix_ctrl;
18372006 	__s8	link_mode_masks_nwords;
18382007 	__u8	transceiver;
1839
-	__u8	reserved1[3];
2008
+	__u8	master_slave_cfg;
2009
+	__u8	master_slave_state;
2010
+	__u8	reserved1[1];
18402011 	__u32	reserved[7];
18412012 	__u32	link_mode_masks[0];
18422013 	/* layout of link_mode_masks fields: