~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,8 +1,7 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* QLogic Fibre Channel HBA Driver
3	4	* Copyright (c) 2003-2014 QLogic Corporation
4		- *
5		- * See LICENSE.qla2xxx for copyright and licensing details.
6	5	*/
7	6	#include "qla_def.h"
8	7	#include "qla_gbl.h"
..	..	@@ -17,7 +16,6 @@
17	16	#include <asm/prom.h>
18	17	#endif
19	18
20		-#include <target/target_core_base.h>
21	19	#include "qla_target.h"
22	20
23	21	/*
..	..	@@ -37,8 +35,8 @@
37	35	static int qla84xx_init_chip(scsi_qla_host_t *);
38	36	static int qla25xx_init_queues(struct qla_hw_data *);
39	37	static int qla24xx_post_prli_work(struct scsi_qla_host, fc_port_t );
40		-static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41		- struct event_arg *);
	38	+static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
	39	+ struct event_arg *ea);
42	40	static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43	41	struct event_arg *);
44	42	static void __qla24xx_handle_gpdb_event(scsi_qla_host_t , struct event_arg );
..	..	@@ -50,27 +48,28 @@
50	48	{
51	49	srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
52	50	struct srb_iocb *iocb;
53		- struct req_que *req;
54		- unsigned long flags;
55		- struct qla_hw_data *ha = sp->vha->hw;
56	51
57		- WARN_ON_ONCE(irqs_disabled());
58		- spin_lock_irqsave(&ha->hardware_lock, flags);
59		- req = sp->qpair->req;
60		- req->outstanding_cmds[sp->handle] = NULL;
	52	+ WARN_ON(irqs_disabled());
61	53	iocb = &sp->u.iocb_cmd;
62		- spin_unlock_irqrestore(&ha->hardware_lock, flags);
63	54	iocb->timeout(sp);
64	55	}
65	56
66		-void
67		-qla2x00_sp_free(void *ptr)
	57	+void qla2x00_sp_free(srb_t *sp)
68	58	{
69		- srb_t *sp = ptr;
70	59	struct srb_iocb *iocb = &sp->u.iocb_cmd;
71	60
72	61	del_timer(&iocb->timer);
73	62	qla2x00_rel_sp(sp);
	63	+}
	64	+
	65	+void qla2xxx_rel_done_warning(srb_t *sp, int res)
	66	+{
	67	+ WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
	68	+}
	69	+
	70	+void qla2xxx_rel_free_warning(srb_t *sp)
	71	+{
	72	+ WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
74	73	}
75	74
76	75	/* Asynchronous Login/Logout Routines -------------------------------------- */
..	..	@@ -93,6 +92,106 @@
93	92	tmo = ha->login_timeout;
94	93	}
95	94	return tmo;
	95	+}
	96	+
	97	+static void qla24xx_abort_iocb_timeout(void *data)
	98	+{
	99	+ srb_t *sp = data;
	100	+ struct srb_iocb *abt = &sp->u.iocb_cmd;
	101	+ struct qla_qpair *qpair = sp->qpair;
	102	+ u32 handle;
	103	+ unsigned long flags;
	104	+
	105	+ if (sp->cmd_sp)
	106	+ ql_dbg(ql_dbg_async, sp->vha, 0x507c,
	107	+ "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
	108	+ sp->cmd_sp->handle, sp->cmd_sp->type,
	109	+ sp->handle, sp->type);
	110	+ else
	111	+ ql_dbg(ql_dbg_async, sp->vha, 0x507c,
	112	+ "Abort timeout 2 - hdl=%x, type=%x\n",
	113	+ sp->handle, sp->type);
	114	+
	115	+ spin_lock_irqsave(qpair->qp_lock_ptr, flags);
	116	+ for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
	117	+ if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
	118	+ sp->cmd_sp))
	119	+ qpair->req->outstanding_cmds[handle] = NULL;
	120	+
	121	+ /* removing the abort */
	122	+ if (qpair->req->outstanding_cmds[handle] == sp) {
	123	+ qpair->req->outstanding_cmds[handle] = NULL;
	124	+ break;
	125	+ }
	126	+ }
	127	+ spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
	128	+
	129	+ if (sp->cmd_sp)
	130	+ sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
	131	+
	132	+ abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
	133	+ sp->done(sp, QLA_OS_TIMER_EXPIRED);
	134	+}
	135	+
	136	+static void qla24xx_abort_sp_done(srb_t *sp, int res)
	137	+{
	138	+ struct srb_iocb *abt = &sp->u.iocb_cmd;
	139	+
	140	+ del_timer(&sp->u.iocb_cmd.timer);
	141	+ if (sp->flags & SRB_WAKEUP_ON_COMP)
	142	+ complete(&abt->u.abt.comp);
	143	+ else
	144	+ sp->free(sp);
	145	+}
	146	+
	147	+int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
	148	+{
	149	+ scsi_qla_host_t *vha = cmd_sp->vha;
	150	+ struct srb_iocb *abt_iocb;
	151	+ srb_t *sp;
	152	+ int rval = QLA_FUNCTION_FAILED;
	153	+
	154	+ sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
	155	+ GFP_ATOMIC);
	156	+ if (!sp)
	157	+ return rval;
	158	+
	159	+ abt_iocb = &sp->u.iocb_cmd;
	160	+ sp->type = SRB_ABT_CMD;
	161	+ sp->name = "abort";
	162	+ sp->qpair = cmd_sp->qpair;
	163	+ sp->cmd_sp = cmd_sp;
	164	+ if (wait)
	165	+ sp->flags = SRB_WAKEUP_ON_COMP;
	166	+
	167	+ abt_iocb->timeout = qla24xx_abort_iocb_timeout;
	168	+ init_completion(&abt_iocb->u.abt.comp);
	169	+ /* FW can send 2 x ABTS's timeout/20s */
	170	+ qla2x00_init_timer(sp, 42);
	171	+
	172	+ abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
	173	+ abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
	174	+
	175	+ sp->done = qla24xx_abort_sp_done;
	176	+
	177	+ ql_dbg(ql_dbg_async, vha, 0x507c,
	178	+ "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
	179	+ cmd_sp->type);
	180	+
	181	+ rval = qla2x00_start_sp(sp);
	182	+ if (rval != QLA_SUCCESS) {
	183	+ sp->free(sp);
	184	+ return rval;
	185	+ }
	186	+
	187	+ if (wait) {
	188	+ wait_for_completion(&abt_iocb->u.abt.comp);
	189	+ rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
	190	+ QLA_SUCCESS : QLA_FUNCTION_FAILED;
	191	+ sp->free(sp);
	192	+ }
	193	+
	194	+ return rval;
96	195	}
97	196
98	197	void
..	..	@@ -145,6 +244,7 @@
145	244	case SRB_NACK_PRLI:
146	245	case SRB_NACK_LOGO:
147	246	case SRB_CTRL_VP:
	247	+ default:
148	248	rc = qla24xx_async_abort_cmd(sp, false);
149	249	if (rc) {
150	250	spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
..	..	@@ -164,10 +264,8 @@
164	264	}
165	265	}
166	266
167		-static void
168		-qla2x00_async_login_sp_done(void *ptr, int res)
	267	+static void qla2x00_async_login_sp_done(srb_t *sp, int res)
169	268	{
170		- srb_t *sp = ptr;
171	269	struct scsi_qla_host *vha = sp->vha;
172	270	struct srb_iocb *lio = &sp->u.iocb_cmd;
173	271	struct event_arg ea;
..	..	@@ -179,14 +277,13 @@
179	277
180	278	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
181	279	memset(&ea, 0, sizeof(ea));
182		- ea.event = FCME_PLOGI_DONE;
183	280	ea.fcport = sp->fcport;
184	281	ea.data[0] = lio->u.logio.data[0];
185	282	ea.data[1] = lio->u.logio.data[1];
186	283	ea.iop[0] = lio->u.logio.iop[0];
187	284	ea.iop[1] = lio->u.logio.iop[1];
188	285	ea.sp = sp;
189		- qla2x00_fcport_event_handler(vha, &ea);
	286	+ qla24xx_handle_plogi_done_event(vha, &ea);
190	287	}
191	288
192	289	sp->free(sp);
..	..	@@ -228,10 +325,10 @@
228	325	if (!sp)
229	326	goto done;
230	327
	328	+ qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
231	329	fcport->flags \|= FCF_ASYNC_SENT;
232	330	fcport->logout_completed = 0;
233	331
234		- fcport->disc_state = DSC_LOGIN_PEND;
235	332	sp->type = SRB_LOGIN_CMD;
236	333	sp->name = "login";
237	334	sp->gen1 = fcport->rscn_gen;
..	..	@@ -247,7 +344,7 @@
247	344	else
248	345	lio->u.logio.flags \|= SRB_LOGIN_COND_PLOGI;
249	346
250		- if (fcport->fc4f_nvme)
	347	+ if (NVME_TARGET(vha->hw, fcport))
251	348	lio->u.logio.flags \|= SRB_LOGIN_SKIP_PRLI;
252	349
253	350	ql_dbg(ql_dbg_disc, vha, 0x2072,
..	..	@@ -273,11 +370,8 @@
273	370	return rval;
274	371	}
275	372
276		-static void
277		-qla2x00_async_logout_sp_done(void *ptr, int res)
	373	+static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
278	374	{
279		- srb_t *sp = ptr;
280		-
281	375	sp->fcport->flags &= ~(FCF_ASYNC_SENT \| FCF_ASYNC_ACTIVE);
282	376	sp->fcport->login_gen++;
283	377	qlt_logo_completion_handler(sp->fcport, res);
..	..	@@ -330,14 +424,12 @@
330	424	fcport->flags &= ~FCF_ASYNC_ACTIVE;
331	425	/* Don't re-login in target mode */
332	426	if (!fcport->tgt_session)
333		- qla2x00_mark_device_lost(vha, fcport, 1, 0);
	427	+ qla2x00_mark_device_lost(vha, fcport, 1);
334	428	qlt_logo_completion_handler(fcport, data[0]);
335	429	}
336	430
337		-static void
338		-qla2x00_async_prlo_sp_done(void *s, int res)
	431	+static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
339	432	{
340		- srb_t sp = (srb_t )s;
341	433	struct srb_iocb *lio = &sp->u.iocb_cmd;
342	434	struct scsi_qla_host *vha = sp->vha;
343	435
..	..	@@ -368,14 +460,16 @@
368	460	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
369	461
370	462	sp->done = qla2x00_async_prlo_sp_done;
371		- rval = qla2x00_start_sp(sp);
372		- if (rval != QLA_SUCCESS)
373		- goto done_free_sp;
374	463
375	464	ql_dbg(ql_dbg_disc, vha, 0x2070,
376	465	"Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
377	466	sp->handle, fcport->loop_id, fcport->d_id.b.domain,
378	467	fcport->d_id.b.area, fcport->d_id.b.al_pa);
	468	+
	469	+ rval = qla2x00_start_sp(sp);
	470	+ if (rval != QLA_SUCCESS)
	471	+ goto done_free_sp;
	472	+
379	473	return rval;
380	474
381	475	done_free_sp:
..	..	@@ -389,6 +483,7 @@
389	483	void qla24xx_handle_adisc_event(scsi_qla_host_t vha, struct event_arg ea)
390	484	{
391	485	struct fc_port *fcport = ea->fcport;
	486	+ unsigned long flags;
392	487
393	488	ql_dbg(ql_dbg_disc, vha, 0x20d2,
394	489	"%s %8phC DS %d LS %d rc %d login %d\|%d rscn %d\|%d lid %d\n",
..	..	@@ -396,10 +491,22 @@
396	491	fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
397	492	fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
398	493
	494	+ WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
	495	+ ea->data[0]);
	496	+
399	497	if (ea->data[0] != MBS_COMMAND_COMPLETE) {
400	498	ql_dbg(ql_dbg_disc, vha, 0x2066,
401	499	"%s %8phC: adisc fail: post delete\n",
402	500	__func__, ea->fcport->port_name);
	501	+
	502	+ spin_lock_irqsave(&vha->work_lock, flags);
	503	+ /* deleted = 0 & logout_on_delete = force fw cleanup */
	504	+ if (fcport->deleted == QLA_SESS_DELETED)
	505	+ fcport->deleted = 0;
	506	+
	507	+ fcport->logout_on_delete = 1;
	508	+ spin_unlock_irqrestore(&vha->work_lock, flags);
	509	+
403	510	qlt_schedule_sess_for_deletion(ea->fcport);
404	511	return;
405	512	}
..	..	@@ -414,16 +521,15 @@
414	521	__func__, ea->fcport->port_name);
415	522	return;
416	523	} else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
417		- ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
418		- __func__, __LINE__, ea->fcport->port_name);
419		- qla24xx_post_gidpn_work(vha, ea->fcport);
	524	+ qla_rscn_replay(fcport);
	525	+ qlt_schedule_sess_for_deletion(fcport);
420	526	return;
421	527	}
422	528
423	529	__qla24xx_handle_gpdb_event(vha, ea);
424	530	}
425	531
426		-int qla_post_els_plogi_work(struct scsi_qla_host vha, fc_port_t fcport)
	532	+static int qla_post_els_plogi_work(struct scsi_qla_host vha, fc_port_t fcport)
427	533	{
428	534	struct qla_work_evt *e;
429	535
..	..	@@ -433,14 +539,12 @@
433	539
434	540	e->u.fcport.fcport = fcport;
435	541	fcport->flags \|= FCF_ASYNC_ACTIVE;
436		- fcport->disc_state = DSC_LOGIN_PEND;
	542	+ qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
437	543	return qla2x00_post_work(vha, e);
438	544	}
439	545
440		-static void
441		-qla2x00_async_adisc_sp_done(void *ptr, int res)
	546	+static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
442	547	{
443		- srb_t *sp = ptr;
444	548	struct scsi_qla_host *vha = sp->vha;
445	549	struct event_arg ea;
446	550	struct srb_iocb *lio = &sp->u.iocb_cmd;
..	..	@@ -452,7 +556,6 @@
452	556	sp->fcport->flags &= ~(FCF_ASYNC_SENT \| FCF_ASYNC_ACTIVE);
453	557
454	558	memset(&ea, 0, sizeof(ea));
455		- ea.event = FCME_ADISC_DONE;
456	559	ea.rc = res;
457	560	ea.data[0] = lio->u.logio.data[0];
458	561	ea.data[1] = lio->u.logio.data[1];
..	..	@@ -461,7 +564,7 @@
461	564	ea.fcport = sp->fcport;
462	565	ea.sp = sp;
463	566
464		- qla2x00_fcport_event_handler(vha, &ea);
	567	+ qla24xx_handle_adisc_event(vha, &ea);
465	568
466	569	sp->free(sp);
467	570	}
..	..	@@ -472,9 +575,19 @@
472	575	{
473	576	srb_t *sp;
474	577	struct srb_iocb *lio;
475		- int rval;
	578	+ int rval = QLA_FUNCTION_FAILED;
476	579
477		- rval = QLA_FUNCTION_FAILED;
	580	+ if (IS_SESSION_DELETED(fcport)) {
	581	+ ql_log(ql_log_warn, vha, 0xffff,
	582	+ "%s: %8phC is being delete - not sending command.\n",
	583	+ __func__, fcport->port_name);
	584	+ fcport->flags &= ~FCF_ASYNC_ACTIVE;
	585	+ return rval;
	586	+ }
	587	+
	588	+ if (!vha->flags.online \|\| (fcport->flags & FCF_ASYNC_SENT))
	589	+ return rval;
	590	+
478	591	fcport->flags \|= FCF_ASYNC_SENT;
479	592	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
480	593	if (!sp)
..	..	@@ -511,6 +624,72 @@
511	624	return rval;
512	625	}
513	626
	627	+static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
	628	+{
	629	+ struct qla_hw_data *ha = vha->hw;
	630	+
	631	+ if (IS_FWI2_CAPABLE(ha))
	632	+ return loop_id > NPH_LAST_HANDLE;
	633	+
	634	+ return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) \|\|
	635	+ loop_id == MANAGEMENT_SERVER \|\| loop_id == BROADCAST;
	636	+}
	637	+
	638	+/**
	639	+ * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
	640	+ * @vha: adapter state pointer.
	641	+ * @dev: port structure pointer.
	642	+ *
	643	+ * Returns:
	644	+ * qla2x00 local function return status code.
	645	+ *
	646	+ * Context:
	647	+ * Kernel context.
	648	+ */
	649	+static int qla2x00_find_new_loop_id(scsi_qla_host_t vha, fc_port_t dev)
	650	+{
	651	+ int rval;
	652	+ struct qla_hw_data *ha = vha->hw;
	653	+ unsigned long flags = 0;
	654	+
	655	+ rval = QLA_SUCCESS;
	656	+
	657	+ spin_lock_irqsave(&ha->vport_slock, flags);
	658	+
	659	+ dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
	660	+ if (dev->loop_id >= LOOPID_MAP_SIZE \|\|
	661	+ qla2x00_is_reserved_id(vha, dev->loop_id)) {
	662	+ dev->loop_id = FC_NO_LOOP_ID;
	663	+ rval = QLA_FUNCTION_FAILED;
	664	+ } else {
	665	+ set_bit(dev->loop_id, ha->loop_id_map);
	666	+ }
	667	+ spin_unlock_irqrestore(&ha->vport_slock, flags);
	668	+
	669	+ if (rval == QLA_SUCCESS)
	670	+ ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
	671	+ "Assigning new loopid=%x, portid=%x.\n",
	672	+ dev->loop_id, dev->d_id.b24);
	673	+ else
	674	+ ql_log(ql_log_warn, dev->vha, 0x2087,
	675	+ "No loop_id's available, portid=%x.\n",
	676	+ dev->d_id.b24);
	677	+
	678	+ return rval;
	679	+}
	680	+
	681	+void qla2x00_clear_loop_id(fc_port_t *fcport)
	682	+{
	683	+ struct qla_hw_data *ha = fcport->vha->hw;
	684	+
	685	+ if (fcport->loop_id == FC_NO_LOOP_ID \|\|
	686	+ qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
	687	+ return;
	688	+
	689	+ clear_bit(fcport->loop_id, ha->loop_id_map);
	690	+ fcport->loop_id = FC_NO_LOOP_ID;
	691	+}
	692	+
514	693	static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
515	694	struct event_arg *ea)
516	695	{
..	..	@@ -520,7 +699,7 @@
520	699	port_id_t id;
521	700	u64 wwn;
522	701	u16 data[2];
523		- u8 current_login_state;
	702	+ u8 current_login_state, nvme_cls;
524	703
525	704	fcport = ea->fcport;
526	705	ql_dbg(ql_dbg_disc, vha, 0xffff,
..	..	@@ -543,11 +722,8 @@
543	722	}
544	723
545	724	if (fcport->last_rscn_gen != fcport->rscn_gen) {
546		- ql_dbg(ql_dbg_disc, vha, 0x20df,
547		- "%s %8phC rscn gen changed rscn %d\|%d \n",
548		- __func__, fcport->port_name,
549		- fcport->last_rscn_gen, fcport->rscn_gen);
550		- qla24xx_post_gidpn_work(vha, fcport);
	725	+ qla_rscn_replay(fcport);
	726	+ qlt_schedule_sess_for_deletion(fcport);
551	727	return;
552	728	} else if (fcport->last_login_gen != fcport->login_gen) {
553	729	ql_dbg(ql_dbg_disc, vha, 0x20e0,
..	..	@@ -582,19 +758,24 @@
582	758
583	759	loop_id = le16_to_cpu(e->nport_handle);
584	760	loop_id = (loop_id & 0x7fff);
585		- if (fcport->fc4f_nvme)
586		- current_login_state = e->current_login_state >> 4;
587		- else
588		- current_login_state = e->current_login_state & 0xf;
	761	+ nvme_cls = e->current_login_state >> 4;
	762	+ current_login_state = e->current_login_state & 0xf;
589	763
	764	+ if (PRLI_PHASE(nvme_cls)) {
	765	+ current_login_state = nvme_cls;
	766	+ fcport->fc4_type &= ~FS_FC4TYPE_FCP;
	767	+ fcport->fc4_type \|= FS_FC4TYPE_NVME;
	768	+ } else if (PRLI_PHASE(current_login_state)) {
	769	+ fcport->fc4_type \|= FS_FC4TYPE_FCP;
	770	+ fcport->fc4_type &= ~FS_FC4TYPE_NVME;
	771	+ }
590	772
591	773	ql_dbg(ql_dbg_disc, vha, 0x20e2,
592		- "%s found %8phC CLS [%x\|%x] nvme %d ID[%02x%02x%02x\|%02x%02x%02x] lid[%d\|%d]\n",
	774	+ "%s found %8phC CLS [%x\|%x] fc4_type %d ID[%06x\|%06x] lid[%d\|%d]\n",
593	775	__func__, fcport->port_name,
594	776	e->current_login_state, fcport->fw_login_state,
595		- fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
596		- fcport->d_id.b.domain, fcport->d_id.b.area,
597		- fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
	777	+ fcport->fc4_type, id.b24, fcport->d_id.b24,
	778	+ loop_id, fcport->loop_id);
598	779
599	780	switch (fcport->disc_state) {
600	781	case DSC_DELETE_PEND:
..	..	@@ -602,12 +783,15 @@
602	783	break;
603	784	default:
604	785	if ((id.b24 != fcport->d_id.b24 &&
605		- fcport->d_id.b24) \|\|
	786	+ fcport->d_id.b24 &&
	787	+ fcport->loop_id != FC_NO_LOOP_ID) \|\|
606	788	(fcport->loop_id != FC_NO_LOOP_ID &&
607	789	fcport->loop_id != loop_id)) {
608	790	ql_dbg(ql_dbg_disc, vha, 0x20e3,
609	791	"%s %d %8phC post del sess\n",
610	792	__func__, __LINE__, fcport->port_name);
	793	+ if (fcport->n2n_flag)
	794	+ fcport->d_id.b24 = 0;
611	795	qlt_schedule_sess_for_deletion(fcport);
612	796	return;
613	797	}
..	..	@@ -615,6 +799,8 @@
615	799	}
616	800
617	801	fcport->loop_id = loop_id;
	802	+ if (fcport->n2n_flag)
	803	+ fcport->d_id.b24 = id.b24;
618	804
619	805	wwn = wwn_to_u64(fcport->port_name);
620	806	qlt_find_sess_invalidate_other(vha, wwn,
..	..	@@ -664,6 +850,16 @@
664	850	fcport->fw_login_state = current_login_state;
665	851	fcport->d_id = id;
666	852	switch (current_login_state) {
	853	+ case DSC_LS_PRLI_PEND:
	854	+ /*
	855	+ * In the middle of PRLI. Let it finish.
	856	+ * Allow relogin code to recheck state again
	857	+ * with GNL. Push disc_state back to DELETED
	858	+ * so GNL can go out again
	859	+ */
	860	+ qla2x00_set_fcport_disc_state(fcport,
	861	+ DSC_DELETED);
	862	+ break;
667	863	case DSC_LS_PRLI_COMP:
668	864	if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
669	865	fcport->port_type = FCT_INITIATOR;
..	..	@@ -685,7 +881,7 @@
685	881	fcport);
686	882	break;
687	883	}
688		- /* drop through */
	884	+ fallthrough;
689	885	default:
690	886	if (fcport_is_smaller(fcport)) {
691	887	/* local adapter is bigger */
..	..	@@ -738,7 +934,7 @@
738	934	qla24xx_fcport_handle_login(vha, fcport);
739	935	break;
740	936	case ISP_CFG_N:
741		- fcport->disc_state = DSC_DELETED;
	937	+ qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
742	938	if (time_after_eq(jiffies, fcport->dm_login_expire)) {
743	939	if (fcport->n2n_link_reset_cnt < 2) {
744	940	fcport->n2n_link_reset_cnt++;
..	..	@@ -772,16 +968,17 @@
772	968	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
773	969	}
774	970	break;
	971	+ case ISP_CFG_NL:
	972	+ qla24xx_fcport_handle_login(vha, fcport);
	973	+ break;
775	974	default:
776	975	break;
777	976	}
778	977	}
779	978	} /* gnl_event */
780	979
781		-static void
782		-qla24xx_async_gnl_sp_done(void *s, int res)
	980	+static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
783	981	{
784		- struct srb *sp = s;
785	982	struct scsi_qla_host *vha = sp->vha;
786	983	unsigned long flags;
787	984	struct fc_port fcport = NULL, tf;
..	..	@@ -802,7 +999,6 @@
802	999	memset(&ea, 0, sizeof(ea));
803	1000	ea.sp = sp;
804	1001	ea.rc = res;
805		- ea.event = FCME_GNL_DONE;
806	1002
807	1003	if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
808	1004	sizeof(struct get_name_list_extended)) {
..	..	@@ -819,9 +1015,9 @@
819	1015	set_bit(loop_id, vha->hw->loop_id_map);
820	1016	wwn = wwn_to_u64(e->port_name);
821	1017
822		- ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
823		- "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
824		- __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
	1018	+ ql_dbg(ql_dbg_disc, vha, 0x20e8,
	1019	+ "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
	1020	+ __func__, &wwn, e->port_id[2], e->port_id[1],
825	1021	e->port_id[0], e->current_login_state, e->last_login_state,
826	1022	(loop_id & 0x7fff));
827	1023	}
..	..	@@ -841,7 +1037,7 @@
841	1037	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
842	1038	ea.fcport = fcport;
843	1039
844		- qla2x00_fcport_event_handler(vha, &ea);
	1040	+ qla24xx_handle_gnl_done_event(vha, &ea);
845	1041	}
846	1042
847	1043	/* create new fcport if fw has knowledge of new sessions */
..	..	@@ -872,12 +1068,22 @@
872	1068	__func__, __LINE__, (u8 *)&wwn, id.b24);
873	1069	wwnn = wwn_to_u64(e->node_name);
874	1070	qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
875		- (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
	1071	+ (u8 *)&wwnn, NULL, 0);
876	1072	}
877	1073	}
878	1074
879	1075	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
880	1076	vha->gnl.sent = 0;
	1077	+ if (!list_empty(&vha->gnl.fcports)) {
	1078	+ /* retrigger gnl */
	1079	+ list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
	1080	+ gnl_entry) {
	1081	+ list_del_init(&fcport->gnl_entry);
	1082	+ fcport->flags &= ~(FCF_ASYNC_SENT \| FCF_ASYNC_ACTIVE);
	1083	+ if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
	1084	+ break;
	1085	+ }
	1086	+ }
881	1087	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
882	1088
883	1089	sp->free(sp);
..	..	@@ -899,7 +1105,7 @@
899	1105
900	1106	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
901	1107	fcport->flags \|= FCF_ASYNC_SENT;
902		- fcport->disc_state = DSC_GNL;
	1108	+ qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
903	1109	fcport->last_rscn_gen = fcport->rscn_gen;
904	1110	fcport->last_login_gen = fcport->login_gen;
905	1111
..	..	@@ -936,20 +1142,20 @@
936	1142
937	1143	sp->done = qla24xx_async_gnl_sp_done;
938	1144
939		- rval = qla2x00_start_sp(sp);
940		- if (rval != QLA_SUCCESS)
941		- goto done_free_sp;
942		-
943	1145	ql_dbg(ql_dbg_disc, vha, 0x20da,
944	1146	"Async-%s - OUT WWPN %8phC hndl %x\n",
945	1147	sp->name, fcport->port_name, sp->handle);
	1148	+
	1149	+ rval = qla2x00_start_sp(sp);
	1150	+ if (rval != QLA_SUCCESS)
	1151	+ goto done_free_sp;
946	1152
947	1153	return rval;
948	1154
949	1155	done_free_sp:
950	1156	sp->free(sp);
951		- fcport->flags &= ~FCF_ASYNC_SENT;
952	1157	done:
	1158	+ fcport->flags &= ~(FCF_ASYNC_ACTIVE \| FCF_ASYNC_SENT);
953	1159	return rval;
954	1160	}
955	1161
..	..	@@ -963,14 +1169,11 @@
963	1169
964	1170	e->u.fcport.fcport = fcport;
965	1171	fcport->flags \|= FCF_ASYNC_ACTIVE;
966		- fcport->disc_state = DSC_LOGIN_PEND;
967	1172	return qla2x00_post_work(vha, e);
968	1173	}
969	1174
970		-static
971		-void qla24xx_async_gpdb_sp_done(void *s, int res)
	1175	+static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
972	1176	{
973		- struct srb *sp = s;
974	1177	struct scsi_qla_host *vha = sp->vha;
975	1178	struct qla_hw_data *ha = vha->hw;
976	1179	fc_port_t *fcport = sp->fcport;
..	..	@@ -987,11 +1190,10 @@
987	1190	goto done;
988	1191
989	1192	memset(&ea, 0, sizeof(ea));
990		- ea.event = FCME_GPDB_DONE;
991	1193	ea.fcport = fcport;
992	1194	ea.sp = sp;
993	1195
994		- qla2x00_fcport_event_handler(vha, &ea);
	1196	+ qla24xx_handle_gpdb_event(vha, &ea);
995	1197
996	1198	done:
997	1199	dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
..	..	@@ -1004,6 +1206,9 @@
1004	1206	{
1005	1207	struct qla_work_evt *e;
1006	1208
	1209	+ if (vha->host->active_mode == MODE_TARGET)
	1210	+ return QLA_FUNCTION_FAILED;
	1211	+
1007	1212	e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1008	1213	if (!e)
1009	1214	return QLA_FUNCTION_FAILED;
..	..	@@ -1013,10 +1218,8 @@
1013	1218	return qla2x00_post_work(vha, e);
1014	1219	}
1015	1220
1016		-static void
1017		-qla2x00_async_prli_sp_done(void *ptr, int res)
	1221	+static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1018	1222	{
1019		- srb_t *sp = ptr;
1020	1223	struct scsi_qla_host *vha = sp->vha;
1021	1224	struct srb_iocb *lio = &sp->u.iocb_cmd;
1022	1225	struct event_arg ea;
..	..	@@ -1029,7 +1232,6 @@
1029	1232
1030	1233	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1031	1234	memset(&ea, 0, sizeof(ea));
1032		- ea.event = FCME_PRLI_DONE;
1033	1235	ea.fcport = sp->fcport;
1034	1236	ea.data[0] = lio->u.logio.data[0];
1035	1237	ea.data[1] = lio->u.logio.data[1];
..	..	@@ -1037,7 +1239,7 @@
1037	1239	ea.iop[1] = lio->u.logio.iop[1];
1038	1240	ea.sp = sp;
1039	1241
1040		- qla2x00_fcport_event_handler(vha, &ea);
	1242	+ qla24xx_handle_prli_done_event(vha, &ea);
1041	1243	}
1042	1244
1043	1245	sp->free(sp);
..	..	@@ -1050,12 +1252,19 @@
1050	1252	struct srb_iocb *lio;
1051	1253	int rval = QLA_FUNCTION_FAILED;
1052	1254
1053		- if (!vha->flags.online)
	1255	+ if (!vha->flags.online) {
	1256	+ ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
	1257	+ __func__, __LINE__, fcport->port_name);
1054	1258	return rval;
	1259	+ }
1055	1260
1056		- if (fcport->fw_login_state == DSC_LS_PLOGI_PEND \|\|
1057		- fcport->fw_login_state == DSC_LS_PRLI_PEND)
	1261	+ if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND \|\|
	1262	+ fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
	1263	+ qla_dual_mode_enabled(vha)) {
	1264	+ ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
	1265	+ __func__, __LINE__, fcport->port_name);
1058	1266	return rval;
	1267	+ }
1059	1268
1060	1269	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1061	1270	if (!sp)
..	..	@@ -1074,8 +1283,14 @@
1074	1283	sp->done = qla2x00_async_prli_sp_done;
1075	1284	lio->u.logio.flags = 0;
1076	1285
1077		- if (fcport->fc4f_nvme)
	1286	+ if (NVME_TARGET(vha->hw, fcport))
1078	1287	lio->u.logio.flags \|= SRB_LOGIN_NVME_PRLI;
	1288	+
	1289	+ ql_dbg(ql_dbg_disc, vha, 0x211b,
	1290	+ "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
	1291	+ fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
	1292	+ fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
	1293	+ NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1079	1294
1080	1295	rval = qla2x00_start_sp(sp);
1081	1296	if (rval != QLA_SUCCESS) {
..	..	@@ -1083,11 +1298,6 @@
1083	1298	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1084	1299	goto done_free_sp;
1085	1300	}
1086		-
1087		- ql_dbg(ql_dbg_disc, vha, 0x211b,
1088		- "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1089		- fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1090		- fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
1091	1301
1092	1302	return rval;
1093	1303
..	..	@@ -1121,19 +1331,26 @@
1121	1331	struct port_database_24xx *pd;
1122	1332	struct qla_hw_data *ha = vha->hw;
1123	1333
1124		- if (!vha->flags.online \|\| (fcport->flags & FCF_ASYNC_SENT) \|\|
1125		- fcport->loop_id == FC_NO_LOOP_ID) {
	1334	+ if (IS_SESSION_DELETED(fcport)) {
1126	1335	ql_log(ql_log_warn, vha, 0xffff,
1127		- "%s: %8phC - not sending command.\n",
1128		- __func__, fcport->port_name);
	1336	+ "%s: %8phC is being delete - not sending command.\n",
	1337	+ __func__, fcport->port_name);
	1338	+ fcport->flags &= ~FCF_ASYNC_ACTIVE;
1129	1339	return rval;
1130	1340	}
1131	1341
1132		- fcport->disc_state = DSC_GPDB;
	1342	+ if (!vha->flags.online \|\| fcport->flags & FCF_ASYNC_SENT) {
	1343	+ ql_log(ql_log_warn, vha, 0xffff,
	1344	+ "%s: %8phC online %d flags %x - not sending command.\n",
	1345	+ __func__, fcport->port_name, vha->flags.online, fcport->flags);
	1346	+ goto done;
	1347	+ }
1133	1348
1134	1349	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1135	1350	if (!sp)
1136	1351	goto done;
	1352	+
	1353	+ qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1137	1354
1138	1355	fcport->flags \|= FCF_ASYNC_SENT;
1139	1356	sp->type = SRB_MB_IOCB;
..	..	@@ -1162,7 +1379,7 @@
1162	1379	mb[9] = vha->vp_idx;
1163	1380	mb[10] = opt;
1164	1381
1165		- mbx->u.mbx.in = (void *)pd;
	1382	+ mbx->u.mbx.in = pd;
1166	1383	mbx->u.mbx.in_dma = pd_dma;
1167	1384
1168	1385	sp->done = qla24xx_async_gpdb_sp_done;
..	..	@@ -1183,6 +1400,7 @@
1183	1400	sp->free(sp);
1184	1401	fcport->flags &= ~FCF_ASYNC_SENT;
1185	1402	done:
	1403	+ fcport->flags &= ~FCF_ASYNC_ACTIVE;
1186	1404	qla24xx_post_gpdb_work(vha, fcport, opt);
1187	1405	return rval;
1188	1406	}
..	..	@@ -1194,7 +1412,6 @@
1194	1412
1195	1413	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1196	1414	ea->fcport->login_gen++;
1197		- ea->fcport->deleted = 0;
1198	1415	ea->fcport->logout_on_delete = 1;
1199	1416
1200	1417	if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
..	..	@@ -1213,7 +1430,7 @@
1213	1430	ql_dbg(ql_dbg_disc, vha, 0x20d6,
1214	1431	"%s %d %8phC session revalidate success\n",
1215	1432	__func__, __LINE__, ea->fcport->port_name);
1216		- ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
	1433	+ qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1217	1434	}
1218	1435	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1219	1436	}
..	..	@@ -1231,17 +1448,30 @@
1231	1448	fcport->flags &= ~FCF_ASYNC_SENT;
1232	1449
1233	1450	ql_dbg(ql_dbg_disc, vha, 0x20d2,
1234		- "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1235		- fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1236		- ea->rc);
	1451	+ "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__,
	1452	+ fcport->port_name, fcport->disc_state, pd->current_login_state,
	1453	+ fcport->fc4_type, ea->rc);
1237	1454
1238	1455	if (fcport->disc_state == DSC_DELETE_PEND)
1239	1456	return;
1240	1457
1241		- if (fcport->fc4f_nvme)
	1458	+ if (NVME_TARGET(vha->hw, fcport))
1242	1459	ls = pd->current_login_state >> 4;
1243	1460	else
1244	1461	ls = pd->current_login_state & 0xf;
	1462	+
	1463	+ if (ea->sp->gen2 != fcport->login_gen) {
	1464	+ /* target side must have changed it. */
	1465	+
	1466	+ ql_dbg(ql_dbg_disc, vha, 0x20d3,
	1467	+ "%s %8phC generation changed\n",
	1468	+ __func__, fcport->port_name);
	1469	+ return;
	1470	+ } else if (ea->sp->gen1 != fcport->rscn_gen) {
	1471	+ qla_rscn_replay(fcport);
	1472	+ qlt_schedule_sess_for_deletion(fcport);
	1473	+ return;
	1474	+ }
1245	1475
1246	1476	switch (ls) {
1247	1477	case PDS_PRLI_COMPLETE:
..	..	@@ -1254,7 +1484,7 @@
1254	1484	/* Set discovery state back to GNL to Relogin attempt */
1255	1485	if (qla_dual_mode_enabled(vha) \|\|
1256	1486	qla_ini_mode_enabled(vha)) {
1257		- fcport->disc_state = DSC_GNL;
	1487	+ qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1258	1488	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1259	1489	}
1260	1490	return;
..	..	@@ -1273,6 +1503,11 @@
1273	1503	{
1274	1504	u8 login = 0;
1275	1505	int rc;
	1506	+
	1507	+ ql_dbg(ql_dbg_disc, vha, 0x307b,
	1508	+ "%s %8phC DS %d LS %d lid %d retries=%d\n",
	1509	+ __func__, fcport->port_name, fcport->disc_state,
	1510	+ fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1276	1511
1277	1512	if (qla_tgt_mode_enabled(vha))
1278	1513	return;
..	..	@@ -1297,7 +1532,8 @@
1297	1532	login = 1;
1298	1533	}
1299	1534
1300		- if (login) {
	1535	+ if (login && fcport->login_retry) {
	1536	+ fcport->login_retry--;
1301	1537	if (fcport->loop_id == FC_NO_LOOP_ID) {
1302	1538	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1303	1539	rc = qla2x00_find_new_loop_id(vha, fcport);
..	..	@@ -1324,33 +1560,35 @@
1324	1560	u16 sec;
1325	1561
1326	1562	ql_dbg(ql_dbg_disc, vha, 0x20d8,
1327		- "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d\|%d login %d retry %d lid %d scan %d\n",
	1563	+ "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d\|%d login %d lid %d scan %d\n",
1328	1564	__func__, fcport->port_name, fcport->disc_state,
1329	1565	fcport->fw_login_state, fcport->login_pause, fcport->flags,
1330	1566	fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1331		- fcport->login_gen, fcport->login_retry,
1332		- fcport->loop_id, fcport->scan_state);
	1567	+ fcport->login_gen, fcport->loop_id, fcport->scan_state);
1333	1568
1334		- if (fcport->scan_state != QLA_FCPORT_FOUND)
	1569	+ if (fcport->scan_state != QLA_FCPORT_FOUND \|\|
	1570	+ fcport->disc_state == DSC_DELETE_PEND)
1335	1571	return 0;
1336	1572
1337	1573	if ((fcport->loop_id != FC_NO_LOOP_ID) &&
	1574	+ qla_dual_mode_enabled(vha) &&
1338	1575	((fcport->fw_login_state == DSC_LS_PLOGI_PEND) \|\|
1339	1576	(fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1340	1577	return 0;
1341	1578
1342		- if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
	1579	+ if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
	1580	+ !N2N_TOPO(vha->hw)) {
1343	1581	if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1344	1582	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1345	1583	return 0;
1346	1584	}
1347	1585	}
1348	1586
1349		- /* for pure Target Mode. Login will not be initiated */
1350		- if (vha->host->active_mode == MODE_TARGET)
	1587	+ /* Target won't initiate port login if fabric is present */
	1588	+ if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1351	1589	return 0;
1352	1590
1353		- if (fcport->flags & FCF_ASYNC_SENT) {
	1591	+ if (fcport->flags & (FCF_ASYNC_SENT \| FCF_ASYNC_ACTIVE)) {
1354	1592	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1355	1593	return 0;
1356	1594	}
..	..	@@ -1410,13 +1648,19 @@
1410	1648	qla24xx_post_gpdb_work(vha, fcport, 0);
1411	1649	} else {
1412	1650	ql_dbg(ql_dbg_disc, vha, 0x2118,
1413		- "%s %d %8phC post NVMe PRLI\n",
1414		- __func__, __LINE__, fcport->port_name);
	1651	+ "%s %d %8phC post %s PRLI\n",
	1652	+ __func__, __LINE__, fcport->port_name,
	1653	+ NVME_TARGET(vha->hw, fcport) ? "NVME" :
	1654	+ "FC");
1415	1655	qla24xx_post_prli_work(vha, fcport);
1416	1656	}
1417	1657	break;
1418	1658	default:
1419	1659	if (fcport->login_pause) {
	1660	+ ql_dbg(ql_dbg_disc, vha, 0x20d8,
	1661	+ "%s %d %8phC exit\n",
	1662	+ __func__, __LINE__,
	1663	+ fcport->port_name);
1420	1664	fcport->last_rscn_gen = fcport->rscn_gen;
1421	1665	fcport->last_login_gen = fcport->login_gen;
1422	1666	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
..	..	@@ -1428,22 +1672,14 @@
1428	1672	break;
1429	1673
1430	1674	case DSC_LOGIN_FAILED:
1431		- fcport->login_retry--;
1432		- ql_dbg(ql_dbg_disc, vha, 0x20d0,
1433		- "%s %d %8phC post gidpn\n",
1434		- __func__, __LINE__, fcport->port_name);
1435	1675	if (N2N_TOPO(vha->hw))
1436	1676	qla_chk_n2n_b4_login(vha, fcport);
1437	1677	else
1438		- qla24xx_post_gidpn_work(vha, fcport);
	1678	+ qlt_schedule_sess_for_deletion(fcport);
1439	1679	break;
1440	1680
1441	1681	case DSC_LOGIN_COMPLETE:
1442	1682	/* recheck login state */
1443		- ql_dbg(ql_dbg_disc, vha, 0x20d1,
1444		- "%s %d %8phC post adisc\n",
1445		- __func__, __LINE__, fcport->port_name);
1446		- fcport->login_retry--;
1447	1683	data[0] = data[1] = 0;
1448	1684	qla2x00_post_async_adisc_work(vha, fcport, data);
1449	1685	break;
..	..	@@ -1476,33 +1712,11 @@
1476	1712	return 0;
1477	1713	}
1478	1714
1479		-static
1480		-void qla24xx_handle_rscn_event(fc_port_t fcport, struct event_arg ea)
1481		-{
1482		- fcport->rscn_gen++;
1483		-
1484		- ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1485		- "%s %8phC DS %d LS %d\n",
1486		- __func__, fcport->port_name, fcport->disc_state,
1487		- fcport->fw_login_state);
1488		-
1489		- if (fcport->flags & FCF_ASYNC_SENT)
1490		- return;
1491		-
1492		- switch (fcport->disc_state) {
1493		- case DSC_DELETED:
1494		- case DSC_LOGIN_COMPLETE:
1495		- qla24xx_post_gpnid_work(fcport->vha, &ea->id);
1496		- break;
1497		- default:
1498		- break;
1499		- }
1500		-}
1501		-
1502	1715	int qla24xx_post_newsess_work(struct scsi_qla_host vha, port_id_t id,
1503	1716	u8 port_name, u8 node_name, void *pla, u8 fc4_type)
1504	1717	{
1505	1718	struct qla_work_evt *e;
	1719	+
1506	1720	e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1507	1721	if (!e)
1508	1722	return QLA_FUNCTION_FAILED;
..	..	@@ -1517,11 +1731,79 @@
1517	1731	return qla2x00_post_work(vha, e);
1518	1732	}
1519	1733
1520		-static
	1734	+void qla2x00_handle_rscn(scsi_qla_host_t vha, struct event_arg ea)
	1735	+{
	1736	+ fc_port_t *fcport;
	1737	+ unsigned long flags;
	1738	+
	1739	+ switch (ea->id.b.rsvd_1) {
	1740	+ case RSCN_PORT_ADDR:
	1741	+ fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
	1742	+ if (fcport) {
	1743	+ if (fcport->flags & FCF_FCP2_DEVICE &&
	1744	+ atomic_read(&fcport->state) == FCS_ONLINE) {
	1745	+ ql_dbg(ql_dbg_disc, vha, 0x2115,
	1746	+ "Delaying session delete for FCP2 portid=%06x %8phC ",
	1747	+ fcport->d_id.b24, fcport->port_name);
	1748	+ return;
	1749	+ }
	1750	+ fcport->scan_needed = 1;
	1751	+ fcport->rscn_gen++;
	1752	+ }
	1753	+ break;
	1754	+ case RSCN_AREA_ADDR:
	1755	+ list_for_each_entry(fcport, &vha->vp_fcports, list) {
	1756	+ if (fcport->flags & FCF_FCP2_DEVICE &&
	1757	+ atomic_read(&fcport->state) == FCS_ONLINE)
	1758	+ continue;
	1759	+
	1760	+ if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
	1761	+ fcport->scan_needed = 1;
	1762	+ fcport->rscn_gen++;
	1763	+ }
	1764	+ }
	1765	+ break;
	1766	+ case RSCN_DOM_ADDR:
	1767	+ list_for_each_entry(fcport, &vha->vp_fcports, list) {
	1768	+ if (fcport->flags & FCF_FCP2_DEVICE &&
	1769	+ atomic_read(&fcport->state) == FCS_ONLINE)
	1770	+ continue;
	1771	+
	1772	+ if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
	1773	+ fcport->scan_needed = 1;
	1774	+ fcport->rscn_gen++;
	1775	+ }
	1776	+ }
	1777	+ break;
	1778	+ case RSCN_FAB_ADDR:
	1779	+ default:
	1780	+ list_for_each_entry(fcport, &vha->vp_fcports, list) {
	1781	+ if (fcport->flags & FCF_FCP2_DEVICE &&
	1782	+ atomic_read(&fcport->state) == FCS_ONLINE)
	1783	+ continue;
	1784	+
	1785	+ fcport->scan_needed = 1;
	1786	+ fcport->rscn_gen++;
	1787	+ }
	1788	+ break;
	1789	+ }
	1790	+
	1791	+ spin_lock_irqsave(&vha->work_lock, flags);
	1792	+ if (vha->scan.scan_flags == 0) {
	1793	+ ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
	1794	+ vha->scan.scan_flags \|= SF_QUEUED;
	1795	+ schedule_delayed_work(&vha->scan.scan_work, 5);
	1796	+ }
	1797	+ spin_unlock_irqrestore(&vha->work_lock, flags);
	1798	+}
	1799	+
1521	1800	void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1522	1801	struct event_arg *ea)
1523	1802	{
1524	1803	fc_port_t *fcport = ea->fcport;
	1804	+
	1805	+ if (test_bit(UNLOADING, &vha->dpc_flags))
	1806	+ return;
1525	1807
1526	1808	ql_dbg(ql_dbg_disc, vha, 0x2102,
1527	1809	"%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d\|%d login %d\|%d fl %x\n",
..	..	@@ -1532,146 +1814,49 @@
1532	1814	fcport->last_login_gen, fcport->login_gen,
1533	1815	fcport->flags);
1534	1816
1535		- if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) \|\|
1536		- (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1537		- return;
1538		-
1539		- if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1540		- if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1541		- set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1542		- return;
1543		- }
1544		- }
1545		-
1546	1817	if (fcport->last_rscn_gen != fcport->rscn_gen) {
1547		- ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
	1818	+ ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1548	1819	__func__, __LINE__, fcport->port_name);
1549		-
1550		- qla24xx_post_gidpn_work(vha, fcport);
	1820	+ qla24xx_post_gnl_work(vha, fcport);
1551	1821	return;
1552	1822	}
1553	1823
1554	1824	qla24xx_fcport_handle_login(vha, fcport);
1555	1825	}
1556	1826
1557		-
1558		-void qla_handle_els_plogi_done(scsi_qla_host_t vha, struct event_arg ea)
	1827	+void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
	1828	+ struct event_arg *ea)
1559	1829	{
	1830	+ /* for pure Target Mode, PRLI will not be initiated */
	1831	+ if (vha->host->active_mode == MODE_TARGET)
	1832	+ return;
	1833	+
1560	1834	ql_dbg(ql_dbg_disc, vha, 0x2118,
1561	1835	"%s %d %8phC post PRLI\n",
1562	1836	__func__, __LINE__, ea->fcport->port_name);
1563	1837	qla24xx_post_prli_work(vha, ea->fcport);
1564	1838	}
1565	1839
1566		-void qla2x00_fcport_event_handler(scsi_qla_host_t vha, struct event_arg ea)
	1840	+/*
	1841	+ * RSCN(s) came in for this fcport, but the RSCN(s) was not able
	1842	+ * to be consumed by the fcport
	1843	+ */
	1844	+void qla_rscn_replay(fc_port_t *fcport)
1567	1845	{
1568		- fc_port_t f, tf;
1569		- uint32_t id = 0, mask, rid;
1570		- unsigned long flags;
1571		- fc_port_t *fcport;
	1846	+ struct event_arg ea;
1572	1847
1573		- switch (ea->event) {
1574		- case FCME_RELOGIN:
1575		- if (test_bit(UNLOADING, &vha->dpc_flags))
1576		- return;
1577		-
1578		- qla24xx_handle_relogin_event(vha, ea);
1579		- break;
1580		- case FCME_RSCN:
1581		- if (test_bit(UNLOADING, &vha->dpc_flags))
1582		- return;
1583		- switch (ea->id.b.rsvd_1) {
1584		- case RSCN_PORT_ADDR:
1585		- fcport = qla2x00_find_fcport_by_nportid
1586		- (vha, &ea->id, 1);
1587		- if (fcport) {
1588		- fcport->scan_needed = 1;
1589		- fcport->rscn_gen++;
1590		- }
1591		-
1592		- spin_lock_irqsave(&vha->work_lock, flags);
1593		- if (vha->scan.scan_flags == 0) {
1594		- ql_dbg(ql_dbg_disc, vha, 0xffff,
1595		- "%s: schedule\n", __func__);
1596		- vha->scan.scan_flags \|= SF_QUEUED;
1597		- schedule_delayed_work(&vha->scan.scan_work, 5);
1598		- }
1599		- spin_unlock_irqrestore(&vha->work_lock, flags);
1600		-
1601		- break;
1602		- case RSCN_AREA_ADDR:
1603		- case RSCN_DOM_ADDR:
1604		- if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1605		- mask = 0xffff00;
1606		- ql_dbg(ql_dbg_async, vha, 0x5044,
1607		- "RSCN: Area 0x%06x was affected\n",
1608		- ea->id.b24);
1609		- } else {
1610		- mask = 0xff0000;
1611		- ql_dbg(ql_dbg_async, vha, 0x507a,
1612		- "RSCN: Domain 0x%06x was affected\n",
1613		- ea->id.b24);
1614		- }
1615		-
1616		- rid = ea->id.b24 & mask;
1617		- list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1618		- list) {
1619		- id = f->d_id.b24 & mask;
1620		- if (rid == id) {
1621		- ea->fcport = f;
1622		- qla24xx_handle_rscn_event(f, ea);
1623		- }
1624		- }
1625		- break;
1626		- case RSCN_FAB_ADDR:
1627		- default:
1628		- ql_log(ql_log_warn, vha, 0xd045,
1629		- "RSCN: Fabric was affected. Addr format %d\n",
1630		- ea->id.b.rsvd_1);
1631		- qla2x00_mark_all_devices_lost(vha, 1);
1632		- set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1633		- set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1634		- }
1635		- break;
1636		- case FCME_GIDPN_DONE:
1637		- qla24xx_handle_gidpn_event(vha, ea);
1638		- break;
1639		- case FCME_GNL_DONE:
1640		- qla24xx_handle_gnl_done_event(vha, ea);
1641		- break;
1642		- case FCME_GPSC_DONE:
1643		- qla24xx_handle_gpsc_event(vha, ea);
1644		- break;
1645		- case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1646		- qla24xx_handle_plogi_done_event(vha, ea);
1647		- break;
1648		- case FCME_PRLI_DONE:
1649		- qla24xx_handle_prli_done_event(vha, ea);
1650		- break;
1651		- case FCME_GPDB_DONE:
1652		- qla24xx_handle_gpdb_event(vha, ea);
1653		- break;
1654		- case FCME_GPNID_DONE:
1655		- qla24xx_handle_gpnid_event(vha, ea);
1656		- break;
1657		- case FCME_GFFID_DONE:
1658		- qla24xx_handle_gffid_event(vha, ea);
1659		- break;
1660		- case FCME_ADISC_DONE:
1661		- qla24xx_handle_adisc_event(vha, ea);
1662		- break;
1663		- case FCME_GNNID_DONE:
1664		- qla24xx_handle_gnnid_event(vha, ea);
1665		- break;
1666		- case FCME_GFPNID_DONE:
1667		- qla24xx_handle_gfpnid_event(vha, ea);
1668		- break;
1669		- case FCME_ELS_PLOGI_DONE:
1670		- qla_handle_els_plogi_done(vha, ea);
1671		- break;
	1848	+ switch (fcport->disc_state) {
	1849	+ case DSC_DELETE_PEND:
	1850	+ return;
1672	1851	default:
1673		- BUG_ON(1);
1674	1852	break;
	1853	+ }
	1854	+
	1855	+ if (fcport->scan_needed) {
	1856	+ memset(&ea, 0, sizeof(ea));
	1857	+ ea.id = fcport->d_id;
	1858	+ ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
	1859	+ qla2x00_handle_rscn(fcport->vha, &ea);
1675	1860	}
1676	1861	}
1677	1862
..	..	@@ -1680,15 +1865,27 @@
1680	1865	{
1681	1866	srb_t *sp = data;
1682	1867	struct srb_iocb *tmf = &sp->u.iocb_cmd;
	1868	+ int rc, h;
	1869	+ unsigned long flags;
1683	1870
1684		- tmf->u.tmf.comp_status = CS_TIMEOUT;
1685		- complete(&tmf->u.tmf.comp);
	1871	+ rc = qla24xx_async_abort_cmd(sp, false);
	1872	+ if (rc) {
	1873	+ spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
	1874	+ for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
	1875	+ if (sp->qpair->req->outstanding_cmds[h] == sp) {
	1876	+ sp->qpair->req->outstanding_cmds[h] = NULL;
	1877	+ break;
	1878	+ }
	1879	+ }
	1880	+ spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
	1881	+ tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
	1882	+ tmf->u.tmf.data = QLA_FUNCTION_FAILED;
	1883	+ complete(&tmf->u.tmf.comp);
	1884	+ }
1686	1885	}
1687	1886
1688		-static void
1689		-qla2x00_tmf_sp_done(void *ptr, int res)
	1887	+static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1690	1888	{
1691		- srb_t *sp = ptr;
1692	1889	struct srb_iocb *tmf = &sp->u.iocb_cmd;
1693	1890
1694	1891	complete(&tmf->u.tmf.comp);
..	..	@@ -1742,89 +1939,14 @@
1742	1939	lun = (uint16_t)tm_iocb->u.tmf.lun;
1743	1940
1744	1941	/* Issue Marker IOCB */
1745		- qla2x00_marker(vha, vha->hw->req_q_map[0],
1746		- vha->hw->rsp_q_map[0], fcport->loop_id, lun,
	1942	+ qla2x00_marker(vha, vha->hw->base_qpair,
	1943	+ fcport->loop_id, lun,
1747	1944	flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1748	1945	}
1749	1946
1750	1947	done_free_sp:
1751	1948	sp->free(sp);
1752	1949	fcport->flags &= ~FCF_ASYNC_SENT;
1753		-done:
1754		- return rval;
1755		-}
1756		-
1757		-static void
1758		-qla24xx_abort_iocb_timeout(void *data)
1759		-{
1760		- srb_t *sp = data;
1761		- struct srb_iocb *abt = &sp->u.iocb_cmd;
1762		-
1763		- abt->u.abt.comp_status = CS_TIMEOUT;
1764		- sp->done(sp, QLA_FUNCTION_TIMEOUT);
1765		-}
1766		-
1767		-static void
1768		-qla24xx_abort_sp_done(void *ptr, int res)
1769		-{
1770		- srb_t *sp = ptr;
1771		- struct srb_iocb *abt = &sp->u.iocb_cmd;
1772		-
1773		- if (del_timer(&sp->u.iocb_cmd.timer)) {
1774		- if (sp->flags & SRB_WAKEUP_ON_COMP)
1775		- complete(&abt->u.abt.comp);
1776		- else
1777		- sp->free(sp);
1778		- }
1779		-}
1780		-
1781		-int
1782		-qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
1783		-{
1784		- scsi_qla_host_t *vha = cmd_sp->vha;
1785		- struct srb_iocb *abt_iocb;
1786		- srb_t *sp;
1787		- int rval = QLA_FUNCTION_FAILED;
1788		-
1789		- sp = qla2xxx_get_qpair_sp(cmd_sp->qpair, cmd_sp->fcport, GFP_KERNEL);
1790		- if (!sp)
1791		- goto done;
1792		-
1793		- abt_iocb = &sp->u.iocb_cmd;
1794		- sp->type = SRB_ABT_CMD;
1795		- sp->name = "abort";
1796		- sp->qpair = cmd_sp->qpair;
1797		- if (wait)
1798		- sp->flags = SRB_WAKEUP_ON_COMP;
1799		-
1800		- abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1801		- init_completion(&abt_iocb->u.abt.comp);
1802		- /* FW can send 2 x ABTS's timeout/20s */
1803		- qla2x00_init_timer(sp, 42);
1804		-
1805		- abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1806		- abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
1807		-
1808		- sp->done = qla24xx_abort_sp_done;
1809		-
1810		- ql_dbg(ql_dbg_async, vha, 0x507c,
1811		- "Abort command issued - hdl=%x, type=%x\n",
1812		- cmd_sp->handle, cmd_sp->type);
1813		-
1814		- rval = qla2x00_start_sp(sp);
1815		- if (rval != QLA_SUCCESS)
1816		- goto done_free_sp;
1817		-
1818		- if (wait) {
1819		- wait_for_completion(&abt_iocb->u.abt.comp);
1820		- rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1821		- QLA_SUCCESS : QLA_FUNCTION_FAILED;
1822		- } else {
1823		- goto done;
1824		- }
1825		-
1826		-done_free_sp:
1827		- sp->free(sp);
1828	1950	done:
1829	1951	return rval;
1830	1952	}
..	..	@@ -1836,19 +1958,17 @@
1836	1958
1837	1959	uint32_t handle;
1838	1960	fc_port_t *fcport = sp->fcport;
	1961	+ struct qla_qpair *qpair = sp->qpair;
1839	1962	struct scsi_qla_host *vha = fcport->vha;
1840		- struct qla_hw_data *ha = vha->hw;
1841		- struct req_que *req = vha->req;
	1963	+ struct req_que *req = qpair->req;
1842	1964
1843		- if (vha->flags.qpairs_available && sp->qpair)
1844		- req = sp->qpair->req;
1845		-
1846		- spin_lock_irqsave(&ha->hardware_lock, flags);
	1965	+ spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1847	1966	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1848	1967	if (req->outstanding_cmds[handle] == sp)
1849	1968	break;
1850	1969	}
1851		- spin_unlock_irqrestore(&ha->hardware_lock, flags);
	1970	+ spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
	1971	+
1852	1972	if (handle == req->num_outstanding_cmds) {
1853	1973	/* Command not found. */
1854	1974	return QLA_FUNCTION_FAILED;
..	..	@@ -1863,6 +1983,9 @@
1863	1983	static void
1864	1984	qla24xx_handle_prli_done_event(struct scsi_qla_host vha, struct event_arg ea)
1865	1985	{
	1986	+ WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
	1987	+ ea->data[0]);
	1988	+
1866	1989	switch (ea->data[0]) {
1867	1990	case MBS_COMMAND_COMPLETE:
1868	1991	ql_dbg(ql_dbg_disc, vha, 0x2118,
..	..	@@ -1871,6 +1994,12 @@
1871	1994
1872	1995	ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1873	1996	ea->fcport->logout_on_delete = 1;
	1997	+ ea->fcport->nvme_prli_service_param = ea->iop[0];
	1998	+ if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
	1999	+ ea->fcport->nvme_first_burst_size =
	2000	+ (ea->iop[1] & 0xffff) * 512;
	2001	+ else
	2002	+ ea->fcport->nvme_first_burst_size = 0;
1874	2003	qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1875	2004	break;
1876	2005	default:
..	..	@@ -1881,22 +2010,63 @@
1881	2010	break;
1882	2011	}
1883	2012
1884		- if (ea->fcport->n2n_flag) {
1885		- ql_dbg(ql_dbg_disc, vha, 0x2118,
1886		- "%s %d %8phC post fc4 prli\n",
1887		- __func__, __LINE__, ea->fcport->port_name);
1888		- ea->fcport->fc4f_nvme = 0;
1889		- ea->fcport->n2n_flag = 0;
1890		- qla24xx_post_prli_work(vha, ea->fcport);
	2013	+ ql_dbg(ql_dbg_disc, vha, 0x2118,
	2014	+ "%s %d %8phC priority %s, fc4type %x\n",
	2015	+ __func__, __LINE__, ea->fcport->port_name,
	2016	+ vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
	2017	+ "FCP" : "NVMe", ea->fcport->fc4_type);
	2018	+
	2019	+ if (N2N_TOPO(vha->hw)) {
	2020	+ if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) {
	2021	+ ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
	2022	+ ea->fcport->fc4_type \|= FS_FC4TYPE_FCP;
	2023	+ } else {
	2024	+ ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
	2025	+ ea->fcport->fc4_type \|= FS_FC4TYPE_NVME;
	2026	+ }
	2027	+
	2028	+ if (ea->fcport->n2n_link_reset_cnt < 3) {
	2029	+ ea->fcport->n2n_link_reset_cnt++;
	2030	+ vha->relogin_jif = jiffies + 2 * HZ;
	2031	+ /*
	2032	+ * PRLI failed. Reset link to kick start
	2033	+ * state machine
	2034	+ */
	2035	+ set_bit(N2N_LINK_RESET, &vha->dpc_flags);
	2036	+ } else {
	2037	+ ql_log(ql_log_warn, vha, 0x2119,
	2038	+ "%s %d %8phC Unable to reconnect\n",
	2039	+ __func__, __LINE__,
	2040	+ ea->fcport->port_name);
	2041	+ }
	2042	+ } else {
	2043	+ /*
	2044	+ * switch connect. login failed. Take connection down
	2045	+ * and allow relogin to retrigger
	2046	+ */
	2047	+ if (NVME_FCP_TARGET(ea->fcport)) {
	2048	+ ql_dbg(ql_dbg_disc, vha, 0x2118,
	2049	+ "%s %d %8phC post %s prli\n",
	2050	+ __func__, __LINE__,
	2051	+ ea->fcport->port_name,
	2052	+ (ea->fcport->fc4_type & FS_FC4TYPE_NVME)
	2053	+ ? "NVMe" : "FCP");
	2054	+ if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME)
	2055	+ ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
	2056	+ else
	2057	+ ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
	2058	+ }
	2059	+
	2060	+ ea->fcport->flags &= ~FCF_ASYNC_SENT;
	2061	+ ea->fcport->keep_nport_handle = 0;
	2062	+ ea->fcport->logout_on_delete = 1;
	2063	+ qlt_schedule_sess_for_deletion(ea->fcport);
1891	2064	}
1892		- ql_dbg(ql_dbg_disc, vha, 0x2119,
1893		- "%s %d %8phC unhandle event of %x\n",
1894		- __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1895	2065	break;
1896	2066	}
1897	2067	}
1898	2068
1899		-static void
	2069	+void
1900	2070	qla24xx_handle_plogi_done_event(struct scsi_qla_host vha, struct event_arg ea)
1901	2071	{
1902	2072	port_id_t cid; /* conflict Nport id */
..	..	@@ -1909,7 +2079,7 @@
1909	2079	"%s %8phC DS %d LS %d rc %d login %d\|%d rscn %d\|%d data %x\|%x iop %x\|%x\n",
1910	2080	__func__, fcport->port_name, fcport->disc_state,
1911	2081	fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1912		- ea->sp->gen2, fcport->rscn_gen\|ea->sp->gen1,
	2082	+ ea->sp->gen1, fcport->rscn_gen,
1913	2083	ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1914	2084
1915	2085	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) \|\|
..	..	@@ -1934,11 +2104,16 @@
1934	2104	set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1935	2105	return;
1936	2106	} else if (ea->sp->gen1 != fcport->rscn_gen) {
1937		- ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
1938		- __func__, __LINE__, fcport->port_name);
1939		- qla24xx_post_gidpn_work(vha, fcport);
	2107	+ ql_dbg(ql_dbg_disc, vha, 0x20d3,
	2108	+ "%s %8phC RSCN generation changed\n",
	2109	+ __func__, fcport->port_name);
	2110	+ qla_rscn_replay(fcport);
	2111	+ qlt_schedule_sess_for_deletion(fcport);
1940	2112	return;
1941	2113	}
	2114	+
	2115	+ WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
	2116	+ ea->data[0]);
1942	2117
1943	2118	switch (ea->data[0]) {
1944	2119	case MBS_COMMAND_COMPLETE:
..	..	@@ -1947,14 +2122,14 @@
1947	2122	* force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1948	2123	* requests.
1949	2124	*/
1950		- if (ea->fcport->fc4f_nvme) {
	2125	+ if (NVME_TARGET(vha->hw, ea->fcport)) {
1951	2126	ql_dbg(ql_dbg_disc, vha, 0x2117,
1952	2127	"%s %d %8phC post prli\n",
1953	2128	__func__, __LINE__, ea->fcport->port_name);
1954	2129	qla24xx_post_prli_work(vha, ea->fcport);
1955	2130	} else {
1956	2131	ql_dbg(ql_dbg_disc, vha, 0x20ea,
1957		- "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
	2132	+ "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
1958	2133	__func__, __LINE__, ea->fcport->port_name,
1959	2134	ea->fcport->loop_id, ea->fcport->d_id.b24);
1960	2135
..	..	@@ -1973,12 +2148,7 @@
1973	2148	ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
1974	2149	__func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1975	2150
1976		- ea->fcport->flags &= ~FCF_ASYNC_SENT;
1977		- ea->fcport->disc_state = DSC_LOGIN_FAILED;
1978		- if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
1979		- set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1980		- else
1981		- qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
	2151	+ qlt_schedule_sess_for_deletion(ea->fcport);
1982	2152	break;
1983	2153	case MBS_LOOP_ID_USED:
1984	2154	/* data[1] = IO PARAM 1 = nport ID */
..	..	@@ -2015,8 +2185,6 @@
2015	2185	"%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2016	2186	__func__, __LINE__, ea->fcport->port_name,
2017	2187	ea->fcport->d_id.b24, lid);
2018		- qla2x00_clear_loop_id(ea->fcport);
2019		- qla24xx_post_gidpn_work(vha, ea->fcport);
2020	2188	} else {
2021	2189	ql_dbg(ql_dbg_disc, vha, 0x20ed,
2022	2190	"%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
..	..	@@ -2027,40 +2195,11 @@
2027	2195	set_bit(lid, vha->hw->loop_id_map);
2028	2196	ea->fcport->loop_id = lid;
2029	2197	ea->fcport->keep_nport_handle = 0;
	2198	+ ea->fcport->logout_on_delete = 1;
2030	2199	qlt_schedule_sess_for_deletion(ea->fcport);
2031	2200	}
2032	2201	break;
2033	2202	}
2034		- return;
2035		-}
2036		-
2037		-void
2038		-qla2x00_async_logout_done(struct scsi_qla_host vha, fc_port_t fcport,
2039		- uint16_t *data)
2040		-{
2041		- qlt_logo_completion_handler(fcport, data[0]);
2042		- fcport->login_gen++;
2043		- fcport->flags &= ~FCF_ASYNC_ACTIVE;
2044		- return;
2045		-}
2046		-
2047		-void
2048		-qla2x00_async_adisc_done(struct scsi_qla_host vha, fc_port_t fcport,
2049		- uint16_t *data)
2050		-{
2051		- fcport->flags &= ~(FCF_ASYNC_SENT \| FCF_ASYNC_ACTIVE);
2052		- if (data[0] == MBS_COMMAND_COMPLETE) {
2053		- qla2x00_update_fcport(vha, fcport);
2054		-
2055		- return;
2056		- }
2057		-
2058		- /* Retry login. */
2059		- if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
2060		- set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2061		- else
2062		- qla2x00_mark_device_lost(vha, fcport, 1, 0);
2063		-
2064	2203	return;
2065	2204	}
2066	2205
..	..	@@ -2157,6 +2296,7 @@
2157	2296	int rval;
2158	2297	struct qla_hw_data *ha = vha->hw;
2159	2298	struct req_que *req = ha->req_q_map[0];
	2299	+ struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2160	2300
2161	2301	memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2162	2302	memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
..	..	@@ -2191,6 +2331,15 @@
2191	2331
2192	2332	ha->isp_ops->reset_chip(vha);
2193	2333
	2334	+ /* Check for secure flash support */
	2335	+ if (IS_QLA28XX(ha)) {
	2336	+ if (rd_reg_word(&reg->mailbox12) & BIT_0)
	2337	+ ha->flags.secure_adapter = 1;
	2338	+ ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
	2339	+ (ha->flags.secure_adapter) ? "Yes" : "No");
	2340	+ }
	2341	+
	2342	+
2194	2343	rval = qla2xxx_get_flash_info(vha);
2195	2344	if (rval) {
2196	2345	ql_log(ql_log_fatal, vha, 0x004f,
..	..	@@ -2213,7 +2362,17 @@
2213	2362	ql_dbg(ql_dbg_init, vha, 0x0061,
2214	2363	"Configure NVRAM parameters...\n");
2215	2364
	2365	+ /* Let priority default to FCP, can be overridden by nvram_config */
	2366	+ ha->fc4_type_priority = FC4_PRIORITY_FCP;
	2367	+
2216	2368	ha->isp_ops->nvram_config(vha);
	2369	+
	2370	+ if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
	2371	+ ha->fc4_type_priority != FC4_PRIORITY_NVME)
	2372	+ ha->fc4_type_priority = FC4_PRIORITY_FCP;
	2373	+
	2374	+ ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
	2375	+ ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2217	2376
2218	2377	if (ha->flags.disable_serdes) {
2219	2378	/* Mask HBA via NVRAM settings? */
..	..	@@ -2224,6 +2383,12 @@
2224	2383
2225	2384	ql_dbg(ql_dbg_init, vha, 0x0078,
2226	2385	"Verifying loaded RISC code...\n");
	2386	+
	2387	+ /* If smartsan enabled then require fdmi and rdp enabled */
	2388	+ if (ql2xsmartsan) {
	2389	+ ql2xfdmienable = 1;
	2390	+ ql2xrdpenable = 1;
	2391	+ }
2227	2392
2228	2393	if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2229	2394	rval = ha->isp_ops->chip_diag(vha);
..	..	@@ -2245,6 +2410,10 @@
2245	2410
2246	2411	if (qla_ini_mode_enabled(vha) \|\| qla_dual_mode_enabled(vha))
2247	2412	rval = qla2x00_init_rings(vha);
	2413	+
	2414	+ /* No point in continuing if firmware initialization failed. */
	2415	+ if (rval != QLA_SUCCESS)
	2416	+ return rval;
2248	2417
2249	2418	ha->flags.chip_reset_done = 1;
2250	2419
..	..	@@ -2302,7 +2471,7 @@
2302	2471
2303	2472	/* Get PCI bus information. */
2304	2473	spin_lock_irqsave(&ha->hardware_lock, flags);
2305		- ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
	2474	+ ha->pci_attr = rd_reg_word(&reg->ctrl_status);
2306	2475	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2307	2476
2308	2477	return QLA_SUCCESS;
..	..	@@ -2344,17 +2513,17 @@
2344	2513	spin_lock_irqsave(&ha->hardware_lock, flags);
2345	2514
2346	2515	/* Pause RISC. */
2347		- WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
	2516	+ wrt_reg_word(&reg->hccr, HCCR_PAUSE_RISC);
2348	2517	for (cnt = 0; cnt < 30000; cnt++) {
2349		- if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
	2518	+ if ((rd_reg_word(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2350	2519	break;
2351	2520
2352	2521	udelay(10);
2353	2522	}
2354	2523
2355	2524	/* Select FPM registers. */
2356		- WRT_REG_WORD(&reg->ctrl_status, 0x20);
2357		- RD_REG_WORD(&reg->ctrl_status);
	2525	+ wrt_reg_word(&reg->ctrl_status, 0x20);
	2526	+ rd_reg_word(&reg->ctrl_status);
2358	2527
2359	2528	/* Get the fb rev level */
2360	2529	ha->fb_rev = RD_FB_CMD_REG(ha, reg);
..	..	@@ -2363,13 +2532,13 @@
2363	2532	pci_clear_mwi(ha->pdev);
2364	2533
2365	2534	/* Deselect FPM registers. */
2366		- WRT_REG_WORD(&reg->ctrl_status, 0x0);
2367		- RD_REG_WORD(&reg->ctrl_status);
	2535	+ wrt_reg_word(&reg->ctrl_status, 0x0);
	2536	+ rd_reg_word(&reg->ctrl_status);
2368	2537
2369	2538	/* Release RISC module. */
2370		- WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
	2539	+ wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
2371	2540	for (cnt = 0; cnt < 30000; cnt++) {
2372		- if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
	2541	+ if ((rd_reg_word(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2373	2542	break;
2374	2543
2375	2544	udelay(10);
..	..	@@ -2384,7 +2553,7 @@
2384	2553
2385	2554	/* Get PCI bus information. */
2386	2555	spin_lock_irqsave(&ha->hardware_lock, flags);
2387		- ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
	2556	+ ha->pci_attr = rd_reg_word(&reg->ctrl_status);
2388	2557	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2389	2558
2390	2559	return QLA_SUCCESS;
..	..	@@ -2428,7 +2597,7 @@
2428	2597
2429	2598	/* Get PCI bus information. */
2430	2599	spin_lock_irqsave(&ha->hardware_lock, flags);
2431		- ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
	2600	+ ha->pci_attr = rd_reg_dword(&reg->ctrl_status);
2432	2601	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2433	2602
2434	2603	return QLA_SUCCESS;
..	..	@@ -2507,7 +2676,7 @@
2507	2676	*
2508	2677	* Returns 0 on success.
2509	2678	*/
2510		-void
	2679	+int
2511	2680	qla2x00_reset_chip(scsi_qla_host_t *vha)
2512	2681	{
2513	2682	unsigned long flags = 0;
..	..	@@ -2515,9 +2684,10 @@
2515	2684	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2516	2685	uint32_t cnt;
2517	2686	uint16_t cmd;
	2687	+ int rval = QLA_FUNCTION_FAILED;
2518	2688
2519	2689	if (unlikely(pci_channel_offline(ha->pdev)))
2520		- return;
	2690	+ return rval;
2521	2691
2522	2692	ha->isp_ops->disable_intrs(ha);
2523	2693
..	..	@@ -2531,36 +2701,36 @@
2531	2701
2532	2702	if (!IS_QLA2100(ha)) {
2533	2703	/* Pause RISC. */
2534		- WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
	2704	+ wrt_reg_word(&reg->hccr, HCCR_PAUSE_RISC);
2535	2705	if (IS_QLA2200(ha) \|\| IS_QLA2300(ha)) {
2536	2706	for (cnt = 0; cnt < 30000; cnt++) {
2537		- if ((RD_REG_WORD(&reg->hccr) &
	2707	+ if ((rd_reg_word(&reg->hccr) &
2538	2708	HCCR_RISC_PAUSE) != 0)
2539	2709	break;
2540	2710	udelay(100);
2541	2711	}
2542	2712	} else {
2543		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
	2713	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
2544	2714	udelay(10);
2545	2715	}
2546	2716
2547	2717	/* Select FPM registers. */
2548		- WRT_REG_WORD(&reg->ctrl_status, 0x20);
2549		- RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
	2718	+ wrt_reg_word(&reg->ctrl_status, 0x20);
	2719	+ rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2550	2720
2551	2721	/* FPM Soft Reset. */
2552		- WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2553		- RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
	2722	+ wrt_reg_word(&reg->fpm_diag_config, 0x100);
	2723	+ rd_reg_word(&reg->fpm_diag_config); /* PCI Posting. */
2554	2724
2555	2725	/* Toggle Fpm Reset. */
2556	2726	if (!IS_QLA2200(ha)) {
2557		- WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2558		- RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
	2727	+ wrt_reg_word(&reg->fpm_diag_config, 0x0);
	2728	+ rd_reg_word(&reg->fpm_diag_config); /* PCI Posting. */
2559	2729	}
2560	2730
2561	2731	/* Select frame buffer registers. */
2562		- WRT_REG_WORD(&reg->ctrl_status, 0x10);
2563		- RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
	2732	+ wrt_reg_word(&reg->ctrl_status, 0x10);
	2733	+ rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2564	2734
2565	2735	/* Reset frame buffer FIFOs. */
2566	2736	if (IS_QLA2200(ha)) {
..	..	@@ -2578,23 +2748,23 @@
2578	2748	}
2579	2749
2580	2750	/* Select RISC module registers. */
2581		- WRT_REG_WORD(&reg->ctrl_status, 0);
2582		- RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
	2751	+ wrt_reg_word(&reg->ctrl_status, 0);
	2752	+ rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2583	2753
2584	2754	/* Reset RISC processor. */
2585		- WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2586		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
	2755	+ wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
	2756	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
2587	2757
2588	2758	/* Release RISC processor. */
2589		- WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2590		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
	2759	+ wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
	2760	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
2591	2761	}
2592	2762
2593		- WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2594		- WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
	2763	+ wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
	2764	+ wrt_reg_word(&reg->hccr, HCCR_CLR_HOST_INT);
2595	2765
2596	2766	/* Reset ISP chip. */
2597		- WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
	2767	+ wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2598	2768
2599	2769	/* Wait for RISC to recover from reset. */
2600	2770	if (IS_QLA2100(ha) \|\| IS_QLA2200(ha) \|\| IS_QLA2300(ha)) {
..	..	@@ -2605,7 +2775,7 @@
2605	2775	*/
2606	2776	udelay(20);
2607	2777	for (cnt = 30000; cnt; cnt--) {
2608		- if ((RD_REG_WORD(&reg->ctrl_status) &
	2778	+ if ((rd_reg_word(&reg->ctrl_status) &
2609	2779	CSR_ISP_SOFT_RESET) == 0)
2610	2780	break;
2611	2781	udelay(100);
..	..	@@ -2614,13 +2784,13 @@
2614	2784	udelay(10);
2615	2785
2616	2786	/* Reset RISC processor. */
2617		- WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
	2787	+ wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
2618	2788
2619		- WRT_REG_WORD(&reg->semaphore, 0);
	2789	+ wrt_reg_word(&reg->semaphore, 0);
2620	2790
2621	2791	/* Release RISC processor. */
2622		- WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2623		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
	2792	+ wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
	2793	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
2624	2794
2625	2795	if (IS_QLA2100(ha) \|\| IS_QLA2200(ha) \|\| IS_QLA2300(ha)) {
2626	2796	for (cnt = 0; cnt < 30000; cnt++) {
..	..	@@ -2638,11 +2808,13 @@
2638	2808
2639	2809	/* Disable RISC pause on FPM parity error. */
2640	2810	if (!IS_QLA2100(ha)) {
2641		- WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2642		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
	2811	+ wrt_reg_word(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
	2812	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
2643	2813	}
2644	2814
2645	2815	spin_unlock_irqrestore(&ha->hardware_lock, flags);
	2816	+
	2817	+ return QLA_SUCCESS;
2646	2818	}
2647	2819
2648	2820	/**
..	..	@@ -2682,32 +2854,32 @@
2682	2854	spin_lock_irqsave(&ha->hardware_lock, flags);
2683	2855
2684	2856	/* Reset RISC. */
2685		- WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN\|MWB_4096_BYTES);
	2857	+ wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN\|MWB_4096_BYTES);
2686	2858	for (cnt = 0; cnt < 30000; cnt++) {
2687		- if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
	2859	+ if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2688	2860	break;
2689	2861
2690	2862	udelay(10);
2691	2863	}
2692	2864
2693		- if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
	2865	+ if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2694	2866	set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2695	2867
2696	2868	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2697	2869	"HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2698		- RD_REG_DWORD(&reg->hccr),
2699		- RD_REG_DWORD(&reg->ctrl_status),
2700		- (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
	2870	+ rd_reg_dword(&reg->hccr),
	2871	+ rd_reg_dword(&reg->ctrl_status),
	2872	+ (rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2701	2873
2702		- WRT_REG_DWORD(&reg->ctrl_status,
	2874	+ wrt_reg_dword(&reg->ctrl_status,
2703	2875	CSRX_ISP_SOFT_RESET\|CSRX_DMA_SHUTDOWN\|MWB_4096_BYTES);
2704	2876	pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2705	2877
2706	2878	udelay(100);
2707	2879
2708	2880	/* Wait for firmware to complete NVRAM accesses. */
2709		- RD_REG_WORD(&reg->mailbox0);
2710		- for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
	2881	+ rd_reg_word(&reg->mailbox0);
	2882	+ for (cnt = 10000; rd_reg_word(&reg->mailbox0) != 0 &&
2711	2883	rval == QLA_SUCCESS; cnt--) {
2712	2884	barrier();
2713	2885	if (cnt)
..	..	@@ -2721,26 +2893,26 @@
2721	2893
2722	2894	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2723	2895	"HCCR: 0x%x, MailBox0 Status 0x%x\n",
2724		- RD_REG_DWORD(&reg->hccr),
2725		- RD_REG_DWORD(&reg->mailbox0));
	2896	+ rd_reg_dword(&reg->hccr),
	2897	+ rd_reg_word(&reg->mailbox0));
2726	2898
2727	2899	/* Wait for soft-reset to complete. */
2728		- RD_REG_DWORD(&reg->ctrl_status);
	2900	+ rd_reg_dword(&reg->ctrl_status);
2729	2901	for (cnt = 0; cnt < 60; cnt++) {
2730	2902	barrier();
2731		- if ((RD_REG_DWORD(&reg->ctrl_status) &
	2903	+ if ((rd_reg_dword(&reg->ctrl_status) &
2732	2904	CSRX_ISP_SOFT_RESET) == 0)
2733	2905	break;
2734	2906
2735	2907	udelay(5);
2736	2908	}
2737		- if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
	2909	+ if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2738	2910	set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2739	2911
2740	2912	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2741	2913	"HCCR: 0x%x, Soft Reset status: 0x%x\n",
2742		- RD_REG_DWORD(&reg->hccr),
2743		- RD_REG_DWORD(&reg->ctrl_status));
	2914	+ rd_reg_dword(&reg->hccr),
	2915	+ rd_reg_dword(&reg->ctrl_status));
2744	2916
2745	2917	/* If required, do an MPI FW reset now */
2746	2918	if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
..	..	@@ -2759,17 +2931,17 @@
2759	2931	}
2760	2932	}
2761	2933
2762		- WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2763		- RD_REG_DWORD(&reg->hccr);
	2934	+ wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);
	2935	+ rd_reg_dword(&reg->hccr);
2764	2936
2765		- WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2766		- RD_REG_DWORD(&reg->hccr);
	2937	+ wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);
	2938	+ rd_reg_dword(&reg->hccr);
2767	2939
2768		- WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2769		- RD_REG_DWORD(&reg->hccr);
	2940	+ wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET);
	2941	+ rd_reg_dword(&reg->hccr);
2770	2942
2771		- RD_REG_WORD(&reg->mailbox0);
2772		- for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
	2943	+ rd_reg_word(&reg->mailbox0);
	2944	+ for (cnt = 60; rd_reg_word(&reg->mailbox0) != 0 &&
2773	2945	rval == QLA_SUCCESS; cnt--) {
2774	2946	barrier();
2775	2947	if (cnt)
..	..	@@ -2782,8 +2954,8 @@
2782	2954
2783	2955	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2784	2956	"Host Risc 0x%x, mailbox0 0x%x\n",
2785		- RD_REG_DWORD(&reg->hccr),
2786		- RD_REG_WORD(&reg->mailbox0));
	2957	+ rd_reg_dword(&reg->hccr),
	2958	+ rd_reg_word(&reg->mailbox0));
2787	2959
2788	2960	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2789	2961
..	..	@@ -2802,9 +2974,8 @@
2802	2974	{
2803	2975	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2804	2976
2805		- WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2806		- *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2807		-
	2977	+ wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
	2978	+ *data = rd_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
2808	2979	}
2809	2980
2810	2981	static void
..	..	@@ -2812,8 +2983,8 @@
2812	2983	{
2813	2984	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2814	2985
2815		- WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2816		- WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
	2986	+ wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
	2987	+ wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
2817	2988	}
2818	2989
2819	2990	static void
..	..	@@ -2829,7 +3000,7 @@
2829	3000	vha->hw->pdev->subsystem_device != 0x0240)
2830	3001	return;
2831	3002
2832		- WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
	3003	+ wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2833	3004	udelay(100);
2834	3005
2835	3006	attempt:
..	..	@@ -2883,14 +3054,15 @@
2883	3054	*
2884	3055	* Returns 0 on success.
2885	3056	*/
2886		-void
	3057	+int
2887	3058	qla24xx_reset_chip(scsi_qla_host_t *vha)
2888	3059	{
2889	3060	struct qla_hw_data *ha = vha->hw;
	3061	+ int rval = QLA_FUNCTION_FAILED;
2890	3062
2891	3063	if (pci_channel_offline(ha->pdev) &&
2892	3064	ha->flags.pci_channel_io_perm_failure) {
2893		- return;
	3065	+ return rval;
2894	3066	}
2895	3067
2896	3068	ha->isp_ops->disable_intrs(ha);
..	..	@@ -2898,7 +3070,9 @@
2898	3070	qla25xx_manipulate_risc_semaphore(vha);
2899	3071
2900	3072	/* Perform RISC reset. */
2901		- qla24xx_reset_risc(vha);
	3073	+ rval = qla24xx_reset_risc(vha);
	3074	+
	3075	+ return rval;
2902	3076	}
2903	3077
2904	3078	/**
..	..	@@ -2928,7 +3102,7 @@
2928	3102	spin_lock_irqsave(&ha->hardware_lock, flags);
2929	3103
2930	3104	/* Reset ISP chip. */
2931		- WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
	3105	+ wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2932	3106
2933	3107	/*
2934	3108	* We need to have a delay here since the card will not respond while
..	..	@@ -2938,7 +3112,7 @@
2938	3112	data = qla2x00_debounce_register(&reg->ctrl_status);
2939	3113	for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2940	3114	udelay(5);
2941		- data = RD_REG_WORD(&reg->ctrl_status);
	3115	+ data = rd_reg_word(&reg->ctrl_status);
2942	3116	barrier();
2943	3117	}
2944	3118
..	..	@@ -2949,8 +3123,8 @@
2949	3123	"Reset register cleared by chip reset.\n");
2950	3124
2951	3125	/* Reset RISC processor. */
2952		- WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2953		- WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
	3126	+ wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
	3127	+ wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
2954	3128
2955	3129	/* Workaround for QLA2312 PCI parity error */
2956	3130	if (IS_QLA2100(ha) \|\| IS_QLA2200(ha) \|\| IS_QLA2300(ha)) {
..	..	@@ -3056,89 +3230,102 @@
3056	3230	}
3057	3231
3058	3232	static void
3059		-qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
	3233	+qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3060	3234	{
3061	3235	int rval;
3062	3236	dma_addr_t tc_dma;
3063	3237	void *tc;
3064	3238	struct qla_hw_data *ha = vha->hw;
3065	3239
	3240	+ if (!IS_FWI2_CAPABLE(ha))
	3241	+ return;
	3242	+
	3243	+ if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
	3244	+ !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
	3245	+ return;
	3246	+
	3247	+ if (ha->fce) {
	3248	+ ql_dbg(ql_dbg_init, vha, 0x00bd,
	3249	+ "%s: FCE Mem is already allocated.\n",
	3250	+ __func__);
	3251	+ return;
	3252	+ }
	3253	+
	3254	+ /* Allocate memory for Fibre Channel Event Buffer. */
	3255	+ tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
	3256	+ GFP_KERNEL);
	3257	+ if (!tc) {
	3258	+ ql_log(ql_log_warn, vha, 0x00be,
	3259	+ "Unable to allocate (%d KB) for FCE.\n",
	3260	+ FCE_SIZE / 1024);
	3261	+ return;
	3262	+ }
	3263	+
	3264	+ rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
	3265	+ ha->fce_mb, &ha->fce_bufs);
	3266	+ if (rval) {
	3267	+ ql_log(ql_log_warn, vha, 0x00bf,
	3268	+ "Unable to initialize FCE (%d).\n", rval);
	3269	+ dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
	3270	+ return;
	3271	+ }
	3272	+
	3273	+ ql_dbg(ql_dbg_init, vha, 0x00c0,
	3274	+ "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
	3275	+
	3276	+ ha->flags.fce_enabled = 1;
	3277	+ ha->fce_dma = tc_dma;
	3278	+ ha->fce = tc;
	3279	+}
	3280	+
	3281	+static void
	3282	+qla2x00_init_eft_trace(scsi_qla_host_t *vha)
	3283	+{
	3284	+ int rval;
	3285	+ dma_addr_t tc_dma;
	3286	+ void *tc;
	3287	+ struct qla_hw_data *ha = vha->hw;
	3288	+
	3289	+ if (!IS_FWI2_CAPABLE(ha))
	3290	+ return;
	3291	+
3066	3292	if (ha->eft) {
3067	3293	ql_dbg(ql_dbg_init, vha, 0x00bd,
3068		- "%s: Offload Mem is already allocated.\n",
	3294	+ "%s: EFT Mem is already allocated.\n",
3069	3295	__func__);
3070	3296	return;
3071	3297	}
3072	3298
3073		- if (IS_FWI2_CAPABLE(ha)) {
3074		- /* Allocate memory for Fibre Channel Event Buffer. */
3075		- if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3076		- !IS_QLA27XX(ha))
3077		- goto try_eft;
3078		-
3079		- if (ha->fce)
3080		- dma_free_coherent(&ha->pdev->dev,
3081		- FCE_SIZE, ha->fce, ha->fce_dma);
3082		-
3083		- /* Allocate memory for Fibre Channel Event Buffer. */
3084		- tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3085		- GFP_KERNEL);
3086		- if (!tc) {
3087		- ql_log(ql_log_warn, vha, 0x00be,
3088		- "Unable to allocate (%d KB) for FCE.\n",
3089		- FCE_SIZE / 1024);
3090		- goto try_eft;
3091		- }
3092		-
3093		- rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3094		- ha->fce_mb, &ha->fce_bufs);
3095		- if (rval) {
3096		- ql_log(ql_log_warn, vha, 0x00bf,
3097		- "Unable to initialize FCE (%d).\n", rval);
3098		- dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3099		- tc_dma);
3100		- ha->flags.fce_enabled = 0;
3101		- goto try_eft;
3102		- }
3103		- ql_dbg(ql_dbg_init, vha, 0x00c0,
3104		- "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
3105		-
3106		- ha->flags.fce_enabled = 1;
3107		- ha->fce_dma = tc_dma;
3108		- ha->fce = tc;
3109		-
3110		-try_eft:
3111		- if (ha->eft)
3112		- dma_free_coherent(&ha->pdev->dev,
3113		- EFT_SIZE, ha->eft, ha->eft_dma);
3114		-
3115		- /* Allocate memory for Extended Trace Buffer. */
3116		- tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3117		- GFP_KERNEL);
3118		- if (!tc) {
3119		- ql_log(ql_log_warn, vha, 0x00c1,
3120		- "Unable to allocate (%d KB) for EFT.\n",
3121		- EFT_SIZE / 1024);
3122		- goto eft_err;
3123		- }
3124		-
3125		- rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3126		- if (rval) {
3127		- ql_log(ql_log_warn, vha, 0x00c2,
3128		- "Unable to initialize EFT (%d).\n", rval);
3129		- dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3130		- tc_dma);
3131		- goto eft_err;
3132		- }
3133		- ql_dbg(ql_dbg_init, vha, 0x00c3,
3134		- "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3135		-
3136		- ha->eft_dma = tc_dma;
3137		- ha->eft = tc;
	3299	+ /* Allocate memory for Extended Trace Buffer. */
	3300	+ tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
	3301	+ GFP_KERNEL);
	3302	+ if (!tc) {
	3303	+ ql_log(ql_log_warn, vha, 0x00c1,
	3304	+ "Unable to allocate (%d KB) for EFT.\n",
	3305	+ EFT_SIZE / 1024);
	3306	+ return;
3138	3307	}
3139	3308
3140		-eft_err:
3141		- return;
	3309	+ rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
	3310	+ if (rval) {
	3311	+ ql_log(ql_log_warn, vha, 0x00c2,
	3312	+ "Unable to initialize EFT (%d).\n", rval);
	3313	+ dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
	3314	+ return;
	3315	+ }
	3316	+
	3317	+ ql_dbg(ql_dbg_init, vha, 0x00c3,
	3318	+ "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
	3319	+
	3320	+ ha->eft_dma = tc_dma;
	3321	+ ha->eft = tc;
	3322	+}
	3323	+
	3324	+static void
	3325	+qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
	3326	+{
	3327	+ qla2x00_init_fce_trace(vha);
	3328	+ qla2x00_init_eft_trace(vha);
3142	3329	}
3143	3330
3144	3331	void
..	..	@@ -3151,6 +3338,14 @@
3151	3338	struct rsp_que *rsp = ha->rsp_q_map[0];
3152	3339	struct qla2xxx_fw_dump *fw_dump;
3153	3340
	3341	+ if (ha->fw_dump) {
	3342	+ ql_dbg(ql_dbg_init, vha, 0x00bd,
	3343	+ "Firmware dump already allocated.\n");
	3344	+ return;
	3345	+ }
	3346	+
	3347	+ ha->fw_dumped = 0;
	3348	+ ha->fw_dump_cap_flags = 0;
3154	3349	dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3155	3350	req_q_size = rsp_q_size = 0;
3156	3351
..	..	@@ -3161,7 +3356,7 @@
3161	3356	mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3162	3357	sizeof(uint16_t);
3163	3358	} else if (IS_FWI2_CAPABLE(ha)) {
3164		- if (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha))
	3359	+ if (IS_QLA83XX(ha))
3165	3360	fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3166	3361	else if (IS_QLA81XX(ha))
3167	3362	fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
..	..	@@ -3173,94 +3368,127 @@
3173	3368	mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3174	3369	sizeof(uint32_t);
3175	3370	if (ha->mqenable) {
3176		- if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
	3371	+ if (!IS_QLA83XX(ha))
3177	3372	mq_size = sizeof(struct qla2xxx_mq_chain);
3178	3373	/*
3179		- * Allocate maximum buffer size for all queues.
	3374	+ * Allocate maximum buffer size for all queues - Q0.
3180	3375	* Resizing must be done at end-of-dump processing.
3181	3376	*/
3182		- mq_size += ha->max_req_queues *
	3377	+ mq_size += (ha->max_req_queues - 1) *
3183	3378	(req->length * sizeof(request_t));
3184		- mq_size += ha->max_rsp_queues *
	3379	+ mq_size += (ha->max_rsp_queues - 1) *
3185	3380	(rsp->length * sizeof(response_t));
3186	3381	}
3187	3382	if (ha->tgt.atio_ring)
3188	3383	mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3189		- /* Allocate memory for Fibre Channel Event Buffer. */
3190		- if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3191		- !IS_QLA27XX(ha))
3192		- goto try_eft;
3193	3384
3194		- fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3195		-try_eft:
3196		- ql_dbg(ql_dbg_init, vha, 0x00c3,
3197		- "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3198		- eft_size = EFT_SIZE;
	3385	+ qla2x00_init_fce_trace(vha);
	3386	+ if (ha->fce)
	3387	+ fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
	3388	+ qla2x00_init_eft_trace(vha);
	3389	+ if (ha->eft)
	3390	+ eft_size = EFT_SIZE;
3199	3391	}
3200	3392
3201		- if (IS_QLA27XX(ha)) {
3202		- if (!ha->fw_dump_template) {
3203		- ql_log(ql_log_warn, vha, 0x00ba,
3204		- "Failed missing fwdump template\n");
3205		- return;
	3393	+ if (IS_QLA27XX(ha) \|\| IS_QLA28XX(ha)) {
	3394	+ struct fwdt *fwdt = ha->fwdt;
	3395	+ uint j;
	3396	+
	3397	+ for (j = 0; j < 2; j++, fwdt++) {
	3398	+ if (!fwdt->template) {
	3399	+ ql_dbg(ql_dbg_init, vha, 0x00ba,
	3400	+ "-> fwdt%u no template\n", j);
	3401	+ continue;
	3402	+ }
	3403	+ ql_dbg(ql_dbg_init, vha, 0x00fa,
	3404	+ "-> fwdt%u calculating fwdump size...\n", j);
	3405	+ fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
	3406	+ vha, fwdt->template);
	3407	+ ql_dbg(ql_dbg_init, vha, 0x00fa,
	3408	+ "-> fwdt%u calculated fwdump size = %#lx bytes\n",
	3409	+ j, fwdt->dump_size);
	3410	+ dump_size += fwdt->dump_size;
3206	3411	}
3207		- dump_size = qla27xx_fwdt_calculate_dump_size(vha);
3208		- ql_dbg(ql_dbg_init, vha, 0x00fa,
3209		- "-> allocating fwdump (%x bytes)...\n", dump_size);
3210		- goto allocate;
	3412	+ /* Add space for spare MPI fw dump. */
	3413	+ dump_size += ha->fwdt[1].dump_size;
	3414	+ } else {
	3415	+ req_q_size = req->length * sizeof(request_t);
	3416	+ rsp_q_size = rsp->length * sizeof(response_t);
	3417	+ dump_size = offsetof(struct qla2xxx_fw_dump, isp);
	3418	+ dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
	3419	+ + eft_size;
	3420	+ ha->chain_offset = dump_size;
	3421	+ dump_size += mq_size + fce_size;
	3422	+ if (ha->exchoffld_buf)
	3423	+ dump_size += sizeof(struct qla2xxx_offld_chain) +
	3424	+ ha->exchoffld_size;
	3425	+ if (ha->exlogin_buf)
	3426	+ dump_size += sizeof(struct qla2xxx_offld_chain) +
	3427	+ ha->exlogin_size;
3211	3428	}
3212	3429
3213		- req_q_size = req->length * sizeof(request_t);
3214		- rsp_q_size = rsp->length * sizeof(response_t);
3215		- dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3216		- dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
3217		- ha->chain_offset = dump_size;
3218		- dump_size += mq_size + fce_size;
	3430	+ if (!ha->fw_dump_len \|\| dump_size > ha->fw_dump_alloc_len) {
3219	3431
3220		- if (ha->exchoffld_buf)
3221		- dump_size += sizeof(struct qla2xxx_offld_chain) +
3222		- ha->exchoffld_size;
3223		- if (ha->exlogin_buf)
3224		- dump_size += sizeof(struct qla2xxx_offld_chain) +
3225		- ha->exlogin_size;
	3432	+ ql_dbg(ql_dbg_init, vha, 0x00c5,
	3433	+ "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
	3434	+ __func__, dump_size, ha->fw_dump_len,
	3435	+ ha->fw_dump_alloc_len);
3226	3436
3227		-allocate:
3228		- if (!ha->fw_dump_len \|\| dump_size != ha->fw_dump_len) {
3229	3437	fw_dump = vmalloc(dump_size);
3230	3438	if (!fw_dump) {
3231	3439	ql_log(ql_log_warn, vha, 0x00c4,
3232	3440	"Unable to allocate (%d KB) for firmware dump.\n",
3233	3441	dump_size / 1024);
3234	3442	} else {
3235		- if (ha->fw_dump)
	3443	+ mutex_lock(&ha->optrom_mutex);
	3444	+ if (ha->fw_dumped) {
	3445	+ memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3236	3446	vfree(ha->fw_dump);
3237		- ha->fw_dump = fw_dump;
	3447	+ ha->fw_dump = fw_dump;
	3448	+ ha->fw_dump_alloc_len = dump_size;
	3449	+ ql_dbg(ql_dbg_init, vha, 0x00c5,
	3450	+ "Re-Allocated (%d KB) and save firmware dump.\n",
	3451	+ dump_size / 1024);
	3452	+ } else {
	3453	+ if (ha->fw_dump)
	3454	+ vfree(ha->fw_dump);
	3455	+ ha->fw_dump = fw_dump;
3238	3456
3239		- ha->fw_dump_len = dump_size;
3240		- ql_dbg(ql_dbg_init, vha, 0x00c5,
3241		- "Allocated (%d KB) for firmware dump.\n",
3242		- dump_size / 1024);
	3457	+ ha->fw_dump_len = ha->fw_dump_alloc_len =
	3458	+ dump_size;
	3459	+ ql_dbg(ql_dbg_init, vha, 0x00c5,
	3460	+ "Allocated (%d KB) for firmware dump.\n",
	3461	+ dump_size / 1024);
3243	3462
3244		- if (IS_QLA27XX(ha))
3245		- return;
	3463	+ if (IS_QLA27XX(ha) \|\| IS_QLA28XX(ha)) {
	3464	+ ha->mpi_fw_dump = (char *)fw_dump +
	3465	+ ha->fwdt[1].dump_size;
	3466	+ mutex_unlock(&ha->optrom_mutex);
	3467	+ return;
	3468	+ }
3246	3469
3247		- ha->fw_dump->signature[0] = 'Q';
3248		- ha->fw_dump->signature[1] = 'L';
3249		- ha->fw_dump->signature[2] = 'G';
3250		- ha->fw_dump->signature[3] = 'C';
3251		- ha->fw_dump->version = htonl(1);
	3470	+ ha->fw_dump->signature[0] = 'Q';
	3471	+ ha->fw_dump->signature[1] = 'L';
	3472	+ ha->fw_dump->signature[2] = 'G';
	3473	+ ha->fw_dump->signature[3] = 'C';
	3474	+ ha->fw_dump->version = htonl(1);
3252	3475
3253		- ha->fw_dump->fixed_size = htonl(fixed_size);
3254		- ha->fw_dump->mem_size = htonl(mem_size);
3255		- ha->fw_dump->req_q_size = htonl(req_q_size);
3256		- ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
	3476	+ ha->fw_dump->fixed_size = htonl(fixed_size);
	3477	+ ha->fw_dump->mem_size = htonl(mem_size);
	3478	+ ha->fw_dump->req_q_size = htonl(req_q_size);
	3479	+ ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3257	3480
3258		- ha->fw_dump->eft_size = htonl(eft_size);
3259		- ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3260		- ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
	3481	+ ha->fw_dump->eft_size = htonl(eft_size);
	3482	+ ha->fw_dump->eft_addr_l =
	3483	+ htonl(LSD(ha->eft_dma));
	3484	+ ha->fw_dump->eft_addr_h =
	3485	+ htonl(MSD(ha->eft_dma));
3261	3486
3262		- ha->fw_dump->header_size =
3263		- htonl(offsetof(struct qla2xxx_fw_dump, isp));
	3487	+ ha->fw_dump->header_size =
	3488	+ htonl(offsetof
	3489	+ (struct qla2xxx_fw_dump, isp));
	3490	+ }
	3491	+ mutex_unlock(&ha->optrom_mutex);
3264	3492	}
3265	3493	}
3266	3494	}
..	..	@@ -3446,53 +3674,100 @@
3446	3674	}
3447	3675
3448	3676
3449		-/*
3450		- * Return Code:
3451		- * QLA_SUCCESS: no action
3452		- * QLA_INTERFACE_ERROR: SFP is not there.
3453		- * QLA_FUNCTION_FAILED: detected New SFP
	3677	+/**
	3678	+ * qla24xx_detect_sfp()
	3679	+ *
	3680	+ * @vha: adapter state pointer.
	3681	+ *
	3682	+ * @return
	3683	+ * 0 -- Configure firmware to use short-range settings -- normal
	3684	+ * buffer-to-buffer credits.
	3685	+ *
	3686	+ * 1 -- Configure firmware to use long-range settings -- extra
	3687	+ * buffer-to-buffer credits should be allocated with
	3688	+ * ha->lr_distance containing distance settings from NVRAM or SFP
	3689	+ * (if supported).
3454	3690	*/
3455	3691	int
3456	3692	qla24xx_detect_sfp(scsi_qla_host_t *vha)
3457	3693	{
3458		- int rc = QLA_SUCCESS;
	3694	+ int rc, used_nvram;
3459	3695	struct sff_8247_a0 *a;
3460	3696	struct qla_hw_data *ha = vha->hw;
	3697	+ struct nvram_81xx *nv = ha->nvram;
	3698	+#define LR_DISTANCE_UNKNOWN 2
	3699	+ static const char * const types[] = { "Short", "Long" };
	3700	+ static const char * const lengths[] = { "(10km)", "(5km)", "" };
	3701	+ u8 ll = 0;
3461	3702
3462		- if (!AUTO_DETECT_SFP_SUPPORT(vha))
	3703	+ /* Seed with NVRAM settings. */
	3704	+ used_nvram = 0;
	3705	+ ha->flags.lr_detected = 0;
	3706	+ if (IS_BPM_RANGE_CAPABLE(ha) &&
	3707	+ (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
	3708	+ used_nvram = 1;
	3709	+ ha->flags.lr_detected = 1;
	3710	+ ha->lr_distance =
	3711	+ (nv->enhanced_features >> LR_DIST_NV_POS)
	3712	+ & LR_DIST_NV_MASK;
	3713	+ }
	3714	+
	3715	+ if (!IS_BPM_ENABLED(vha))
3463	3716	goto out;
3464		-
	3717	+ /* Determine SR/LR capabilities of SFP/Transceiver. */
3465	3718	rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3466	3719	if (rc)
3467	3720	goto out;
3468	3721
	3722	+ used_nvram = 0;
3469	3723	a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3470	3724	qla2xxx_print_sfp_info(vha);
3471	3725
3472		- if (a->fc_ll_cc7 & FC_LL_VL \|\| a->fc_ll_cc7 & FC_LL_L) {
3473		- /* long range */
3474		- ha->flags.detected_lr_sfp = 1;
	3726	+ ha->flags.lr_detected = 0;
	3727	+ ll = a->fc_ll_cc7;
	3728	+ if (ll & FC_LL_VL \|\| ll & FC_LL_L) {
	3729	+ /* Long range, track length. */
	3730	+ ha->flags.lr_detected = 1;
3475	3731
3476	3732	if (a->length_km > 5 \|\| a->length_100m > 50)
3477		- ha->long_range_distance = LR_DISTANCE_10K;
	3733	+ ha->lr_distance = LR_DISTANCE_10K;
3478	3734	else
3479		- ha->long_range_distance = LR_DISTANCE_5K;
3480		-
3481		- if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3482		- ql_dbg(ql_dbg_async, vha, 0x507b,
3483		- "Detected Long Range SFP.\n");
3484		- } else {
3485		- /* short range */
3486		- ha->flags.detected_lr_sfp = 0;
3487		- if (ha->flags.using_lr_setting)
3488		- ql_dbg(ql_dbg_async, vha, 0x5084,
3489		- "Detected Short Range SFP.\n");
	3735	+ ha->lr_distance = LR_DISTANCE_5K;
3490	3736	}
3491	3737
3492		- if (!vha->flags.init_done)
3493		- rc = QLA_SUCCESS;
3494	3738	out:
3495		- return rc;
	3739	+ ql_dbg(ql_dbg_async, vha, 0x507b,
	3740	+ "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
	3741	+ types[ha->flags.lr_detected],
	3742	+ ha->flags.lr_detected ? lengths[ha->lr_distance] :
	3743	+ lengths[LR_DISTANCE_UNKNOWN],
	3744	+ used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
	3745	+ return ha->flags.lr_detected;
	3746	+}
	3747	+
	3748	+void qla_init_iocb_limit(scsi_qla_host_t *vha)
	3749	+{
	3750	+ u16 i, num_qps;
	3751	+ u32 limit;
	3752	+ struct qla_hw_data *ha = vha->hw;
	3753	+
	3754	+ num_qps = ha->num_qpairs + 1;
	3755	+ limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
	3756	+
	3757	+ ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
	3758	+ ha->base_qpair->fwres.iocbs_limit = limit;
	3759	+ ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps;
	3760	+ ha->base_qpair->fwres.iocbs_used = 0;
	3761	+ for (i = 0; i < ha->max_qpairs; i++) {
	3762	+ if (ha->queue_pair_map[i]) {
	3763	+ ha->queue_pair_map[i]->fwres.iocbs_total =
	3764	+ ha->orig_fw_iocb_count;
	3765	+ ha->queue_pair_map[i]->fwres.iocbs_limit = limit;
	3766	+ ha->queue_pair_map[i]->fwres.iocbs_qp_limit =
	3767	+ limit / num_qps;
	3768	+ ha->queue_pair_map[i]->fwres.iocbs_used = 0;
	3769	+ }
	3770	+ }
3496	3771	}
3497	3772
3498	3773	/**
..	..	@@ -3510,6 +3785,7 @@
3510	3785	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3511	3786	unsigned long flags;
3512	3787	uint16_t fw_major_version;
	3788	+ int done_once = 0;
3513	3789
3514	3790	if (IS_P3P_TYPE(ha)) {
3515	3791	rval = ha->isp_ops->load_risc(vha, &srisc_address);
..	..	@@ -3523,13 +3799,14 @@
3523	3799	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3524	3800	/* Disable SRAM, Instruction RAM and GP RAM parity. */
3525	3801	spin_lock_irqsave(&ha->hardware_lock, flags);
3526		- WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3527		- RD_REG_WORD(&reg->hccr);
	3802	+ wrt_reg_word(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
	3803	+ rd_reg_word(&reg->hccr);
3528	3804	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3529	3805	}
3530	3806
3531	3807	qla81xx_mpi_sync(vha);
3532	3808
	3809	+execute_fw_with_lr:
3533	3810	/* Load firmware sequences */
3534	3811	rval = ha->isp_ops->load_risc(vha, &srisc_address);
3535	3812	if (rval == QLA_SUCCESS) {
..	..	@@ -3551,7 +3828,19 @@
3551	3828	rval = qla2x00_execute_fw(vha, srisc_address);
3552	3829	/* Retrieve firmware information. */
3553	3830	if (rval == QLA_SUCCESS) {
3554		- qla24xx_detect_sfp(vha);
	3831	+ /* Enable BPM support? */
	3832	+ if (!done_once++ && qla24xx_detect_sfp(vha)) {
	3833	+ ql_dbg(ql_dbg_init, vha, 0x00ca,
	3834	+ "Re-starting firmware -- BPM.\n");
	3835	+ /* Best-effort - re-init. */
	3836	+ ha->isp_ops->reset_chip(vha);
	3837	+ ha->isp_ops->chip_diag(vha);
	3838	+ goto execute_fw_with_lr;
	3839	+ }
	3840	+
	3841	+ if (IS_ZIO_THRESHOLD_CAPABLE(ha))
	3842	+ qla27xx_set_zio_threshold(vha,
	3843	+ ha->last_zio_threshold);
3555	3844
3556	3845	rval = qla2x00_set_exlogins_buffer(vha);
3557	3846	if (rval != QLA_SUCCESS)
..	..	@@ -3580,6 +3869,7 @@
3580	3869	MIN_MULTI_ID_FABRIC - 1;
3581	3870	}
3582	3871	qla2x00_get_resource_cnts(vha);
	3872	+ qla_init_iocb_limit(vha);
3583	3873
3584	3874	/*
3585	3875	* Allocate the array of outstanding commands
..	..	@@ -3604,6 +3894,10 @@
3604	3894	"ISP Firmware failed checksum.\n");
3605	3895	goto failed;
3606	3896	}
	3897	+
	3898	+ /* Enable PUREX PASSTHRU */
	3899	+ if (ql2xrdpenable \|\| ha->flags.scm_supported_f)
	3900	+ qla25xx_set_els_cmds_supported(vha);
3607	3901	} else
3608	3902	goto failed;
3609	3903
..	..	@@ -3612,15 +3906,15 @@
3612	3906	spin_lock_irqsave(&ha->hardware_lock, flags);
3613	3907	if (IS_QLA2300(ha))
3614	3908	/* SRAM parity */
3615		- WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
	3909	+ wrt_reg_word(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3616	3910	else
3617	3911	/* SRAM, Instruction RAM and GP RAM parity */
3618		- WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3619		- RD_REG_WORD(&reg->hccr);
	3912	+ wrt_reg_word(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
	3913	+ rd_reg_word(&reg->hccr);
3620	3914	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3621	3915	}
3622	3916
3623		- if (IS_QLA27XX(ha))
	3917	+ if (IS_QLA27XX(ha) \|\| IS_QLA28XX(ha))
3624	3918	ha->flags.fac_supported = 1;
3625	3919	else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3626	3920	uint32_t size;
..	..	@@ -3635,7 +3929,7 @@
3635	3929	ha->fw_major_version, ha->fw_minor_version,
3636	3930	ha->fw_subminor_version);
3637	3931
3638		- if (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)) {
	3932	+ if (IS_QLA83XX(ha)) {
3639	3933	ha->flags.fac_supported = 0;
3640	3934	rval = QLA_SUCCESS;
3641	3935	}
..	..	@@ -3697,8 +3991,7 @@
3697	3991	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3698	3992	"Serial link options.\n");
3699	3993	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3700		- (uint8_t *)&ha->fw_seriallink_options,
3701		- sizeof(ha->fw_seriallink_options));
	3994	+ ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3702	3995
3703	3996	ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3704	3997	if (ha->fw_seriallink_options[3] & BIT_2) {
..	..	@@ -3788,7 +4081,7 @@
3788	4081
3789	4082	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
3790	4083	if (ql2xmvasynctoatio &&
3791		- (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha))) {
	4084	+ (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha) \|\| IS_QLA28XX(ha))) {
3792	4085	if (qla_tgt_mode_enabled(vha) \|\|
3793	4086	qla_dual_mode_enabled(vha))
3794	4087	ha->fw_options[2] \|= BIT_11;
..	..	@@ -3796,7 +4089,8 @@
3796	4089	ha->fw_options[2] &= ~BIT_11;
3797	4090	}
3798	4091
3799		- if (IS_QLA25XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)) {
	4092	+ if (IS_QLA25XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA27XX(ha) \|\|
	4093	+ IS_QLA28XX(ha)) {
3800	4094	/*
3801	4095	* Tell FW to track each exchange to prevent
3802	4096	* driver from using stale exchange.
..	..	@@ -3813,6 +4107,13 @@
3813	4107	else
3814	4108	ha->fw_options[2] &= ~BIT_8;
3815	4109	}
	4110	+
	4111	+ if (ql2xrdpenable \|\| ha->flags.scm_supported_f)
	4112	+ ha->fw_options[1] \|= ADD_FO1_ENABLE_PUREX_IOCB;
	4113	+
	4114	+ /* Enable Async 8130/8131 events -- transceiver insertion/removal */
	4115	+ if (IS_BPM_RANGE_CAPABLE(ha))
	4116	+ ha->fw_options[3] \|= BIT_10;
3816	4117
3817	4118	ql_dbg(ql_dbg_init, vha, 0x00e8,
3818	4119	"%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
..	..	@@ -3849,16 +4150,14 @@
3849	4150	ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3850	4151	ha->init_cb->request_q_length = cpu_to_le16(req->length);
3851	4152	ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3852		- ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3853		- ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3854		- ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3855		- ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
	4153	+ put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
	4154	+ put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
3856	4155
3857		- WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3858		- WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3859		- WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3860		- WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3861		- RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
	4156	+ wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
	4157	+ wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
	4158	+ wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
	4159	+ wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
	4160	+ rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3862	4161	}
3863	4162
3864	4163	void
..	..	@@ -3879,21 +4178,19 @@
3879	4178	icb->response_q_inpointer = cpu_to_le16(0);
3880	4179	icb->request_q_length = cpu_to_le16(req->length);
3881	4180	icb->response_q_length = cpu_to_le16(rsp->length);
3882		- icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3883		- icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3884		- icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3885		- icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
	4181	+ put_unaligned_le64(req->dma, &icb->request_q_address);
	4182	+ put_unaligned_le64(rsp->dma, &icb->response_q_address);
3886	4183
3887	4184	/* Setup ATIO queue dma pointers for target mode */
3888	4185	icb->atio_q_inpointer = cpu_to_le16(0);
3889	4186	icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3890		- icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3891		- icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
	4187	+ put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
3892	4188
3893	4189	if (IS_SHADOW_REG_CAPABLE(ha))
3894	4190	icb->firmware_options_2 \|= cpu_to_le32(BIT_30\|BIT_29);
3895	4191
3896		- if (ha->mqenable \|\| IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)) {
	4192	+ if (ha->mqenable \|\| IS_QLA83XX(ha) \|\| IS_QLA27XX(ha) \|\|
	4193	+ IS_QLA28XX(ha)) {
3897	4194	icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3898	4195	icb->rid = cpu_to_le16(rid);
3899	4196	if (ha->flags.msix_enabled) {
..	..	@@ -3922,20 +4219,29 @@
3922	4219	}
3923	4220	icb->firmware_options_2 \|= cpu_to_le32(BIT_23);
3924	4221
3925		- WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3926		- WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3927		- WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3928		- WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
	4222	+ wrt_reg_dword(&reg->isp25mq.req_q_in, 0);
	4223	+ wrt_reg_dword(&reg->isp25mq.req_q_out, 0);
	4224	+ wrt_reg_dword(&reg->isp25mq.rsp_q_in, 0);
	4225	+ wrt_reg_dword(&reg->isp25mq.rsp_q_out, 0);
3929	4226	} else {
3930		- WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3931		- WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3932		- WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3933		- WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
	4227	+ wrt_reg_dword(&reg->isp24.req_q_in, 0);
	4228	+ wrt_reg_dword(&reg->isp24.req_q_out, 0);
	4229	+ wrt_reg_dword(&reg->isp24.rsp_q_in, 0);
	4230	+ wrt_reg_dword(&reg->isp24.rsp_q_out, 0);
3934	4231	}
	4232	+
3935	4233	qlt_24xx_config_rings(vha);
3936	4234
	4235	+ /* If the user has configured the speed, set it here */
	4236	+ if (ha->set_data_rate) {
	4237	+ ql_dbg(ql_dbg_init, vha, 0x00fd,
	4238	+ "Speed set by user : %s Gbps \n",
	4239	+ qla2x00_get_link_speed_str(ha, ha->set_data_rate));
	4240	+ icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
	4241	+ }
	4242	+
3937	4243	/* PCI posting */
3938		- RD_REG_DWORD(&ioreg->hccr);
	4244	+ rd_reg_word(&ioreg->hccr);
3939	4245	}
3940	4246
3941	4247	/**
..	..	@@ -3966,7 +4272,7 @@
3966	4272	req = ha->req_q_map[que];
3967	4273	if (!req \|\| !test_bit(que, ha->req_qid_map))
3968	4274	continue;
3969		- req->out_ptr = (void *)(req->ring + req->length);
	4275	+ req->out_ptr = (uint16_t *)(req->ring + req->length);
3970	4276	*req->out_ptr = 0;
3971	4277	for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
3972	4278	req->outstanding_cmds[cnt] = NULL;
..	..	@@ -3983,7 +4289,7 @@
3983	4289	rsp = ha->rsp_q_map[que];
3984	4290	if (!rsp \|\| !test_bit(que, ha->rsp_qid_map))
3985	4291	continue;
3986		- rsp->in_ptr = (void *)(rsp->ring + rsp->length);
	4292	+ rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
3987	4293	*rsp->in_ptr = 0;
3988	4294	/* Initialize response queue entries */
3989	4295	if (IS_QLAFX00(ha))
..	..	@@ -4022,25 +4328,31 @@
4022	4328	mid_init_cb->init_cb.execution_throttle =
4023	4329	cpu_to_le16(ha->cur_fw_xcb_count);
4024	4330	ha->flags.dport_enabled =
4025		- (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
	4331	+ (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
	4332	+ BIT_7) != 0;
4026	4333	ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4027	4334	(ha->flags.dport_enabled) ? "enabled" : "disabled");
4028	4335	/* FA-WWPN Status */
4029	4336	ha->flags.fawwpn_enabled =
4030		- (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
	4337	+ (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
	4338	+ BIT_6) != 0;
4031	4339	ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4032	4340	(ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
	4341	+ /* Init_cb will be reused for other command(s). Save a backup copy of port_name */
	4342	+ memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4033	4343	}
4034	4344
	4345	+ QLA_FW_STARTED(ha);
4035	4346	rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4036	4347	next_check:
4037	4348	if (rval) {
	4349	+ QLA_FW_STOPPED(ha);
4038	4350	ql_log(ql_log_fatal, vha, 0x00d2,
4039	4351	"Init Firmware ** FAILED **.\n");
4040	4352	} else {
4041	4353	ql_dbg(ql_dbg_init, vha, 0x00d3,
4042	4354	"Init Firmware -- success.\n");
4043		- QLA_FW_STARTED(ha);
	4355	+ vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4044	4356	}
4045	4357
4046	4358	return (rval);
..	..	@@ -4302,16 +4614,19 @@
4302	4614
4303	4615	inline void
4304	4616	qla2x00_set_model_info(scsi_qla_host_t vha, uint8_t model, size_t len,
4305		- char *def)
	4617	+ const char *def)
4306	4618	{
4307	4619	char st, en;
4308	4620	uint16_t index;
	4621	+ uint64_t zero[2] = { 0 };
4309	4622	struct qla_hw_data *ha = vha->hw;
4310	4623	int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4311	4624	!IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4312	4625
4313		- if (memcmp(model, BINZERO, len) != 0) {
4314		- strncpy(ha->model_number, model, len);
	4626	+ if (len > sizeof(zero))
	4627	+ len = sizeof(zero);
	4628	+ if (memcmp(model, &zero, len) != 0) {
	4629	+ memcpy(ha->model_number, model, len);
4315	4630	st = en = ha->model_number;
4316	4631	en += len - 1;
4317	4632	while (en > st) {
..	..	@@ -4324,21 +4639,23 @@
4324	4639	if (use_tbl &&
4325	4640	ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4326	4641	index < QLA_MODEL_NAMES)
4327		- strncpy(ha->model_desc,
	4642	+ strlcpy(ha->model_desc,
4328	4643	qla2x00_model_name[index * 2 + 1],
4329		- sizeof(ha->model_desc) - 1);
	4644	+ sizeof(ha->model_desc));
4330	4645	} else {
4331	4646	index = (ha->pdev->subsystem_device & 0xff);
4332	4647	if (use_tbl &&
4333	4648	ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4334	4649	index < QLA_MODEL_NAMES) {
4335		- strcpy(ha->model_number,
4336		- qla2x00_model_name[index * 2]);
4337		- strncpy(ha->model_desc,
	4650	+ strlcpy(ha->model_number,
	4651	+ qla2x00_model_name[index * 2],
	4652	+ sizeof(ha->model_number));
	4653	+ strlcpy(ha->model_desc,
4338	4654	qla2x00_model_name[index * 2 + 1],
4339		- sizeof(ha->model_desc) - 1);
	4655	+ sizeof(ha->model_desc));
4340	4656	} else {
4341		- strcpy(ha->model_number, def);
	4657	+ strlcpy(ha->model_number, def,
	4658	+ sizeof(ha->model_number));
4342	4659	}
4343	4660	}
4344	4661	if (IS_FWI2_CAPABLE(ha))
..	..	@@ -4397,10 +4714,10 @@
4397	4714	rval = QLA_SUCCESS;
4398	4715
4399	4716	/* Determine NVRAM starting address. */
4400		- ha->nvram_size = sizeof(nvram_t);
	4717	+ ha->nvram_size = sizeof(*nv);
4401	4718	ha->nvram_base = 0;
4402	4719	if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4403		- if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
	4720	+ if ((rd_reg_word(&reg->ctrl_status) >> 14) == 1)
4404	4721	ha->nvram_base = 0x80;
4405	4722
4406	4723	/* Get NVRAM data and calculate checksum. */
..	..	@@ -4411,16 +4728,15 @@
4411	4728	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4412	4729	"Contents of NVRAM.\n");
4413	4730	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4414		- (uint8_t *)nv, ha->nvram_size);
	4731	+ nv, ha->nvram_size);
4415	4732
4416	4733	/* Bad NVRAM data, set defaults parameters. */
4417		- if (chksum \|\| nv->id[0] != 'I' \|\| nv->id[1] != 'S' \|\|
4418		- nv->id[2] != 'P' \|\| nv->id[3] != ' ' \|\| nv->nvram_version < 1) {
	4734	+ if (chksum \|\| memcmp("ISP ", nv->id, sizeof(nv->id)) \|\|
	4735	+ nv->nvram_version < 1) {
4419	4736	/* Reset NVRAM data. */
4420	4737	ql_log(ql_log_warn, vha, 0x0064,
4421		- "Inconsistent NVRAM "
4422		- "detected: checksum=0x%x id=%c version=0x%x.\n",
4423		- chksum, nv->id[0], nv->nvram_version);
	4738	+ "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
	4739	+ chksum, nv->id, nv->nvram_version);
4424	4740	ql_log(ql_log_warn, vha, 0x0065,
4425	4741	"Falling back to "
4426	4742	"functioning (yet invalid -- WWPN) defaults.\n");
..	..	@@ -4436,18 +4752,18 @@
4436	4752	nv->firmware_options[1] = BIT_7 \| BIT_5;
4437	4753	nv->add_firmware_options[0] = BIT_5;
4438	4754	nv->add_firmware_options[1] = BIT_5 \| BIT_4;
4439		- nv->frame_payload_size = 2048;
	4755	+ nv->frame_payload_size = cpu_to_le16(2048);
4440	4756	nv->special_options[1] = BIT_7;
4441	4757	} else if (IS_QLA2200(ha)) {
4442	4758	nv->firmware_options[0] = BIT_2 \| BIT_1;
4443	4759	nv->firmware_options[1] = BIT_7 \| BIT_5;
4444	4760	nv->add_firmware_options[0] = BIT_5;
4445	4761	nv->add_firmware_options[1] = BIT_5 \| BIT_4;
4446		- nv->frame_payload_size = 1024;
	4762	+ nv->frame_payload_size = cpu_to_le16(1024);
4447	4763	} else if (IS_QLA2100(ha)) {
4448	4764	nv->firmware_options[0] = BIT_3 \| BIT_1;
4449	4765	nv->firmware_options[1] = BIT_5;
4450		- nv->frame_payload_size = 1024;
	4766	+ nv->frame_payload_size = cpu_to_le16(1024);
4451	4767	}
4452	4768
4453	4769	nv->max_iocb_allocation = cpu_to_le16(256);
..	..	@@ -4474,20 +4790,6 @@
4474	4790
4475	4791	rval = 1;
4476	4792	}
4477		-
4478		-#if defined(CONFIG_IA64_GENERIC) \|\| defined(CONFIG_IA64_SGI_SN2)
4479		- /*
4480		- * The SN2 does not provide BIOS emulation which means you can't change
4481		- * potentially bogus BIOS settings. Force the use of default settings
4482		- * for link rate and frame size. Hope that the rest of the settings
4483		- * are valid.
4484		- */
4485		- if (ia64_platform_is("sn2")) {
4486		- nv->frame_payload_size = 2048;
4487		- if (IS_QLA23XX(ha))
4488		- nv->special_options[1] = BIT_7;
4489		- }
4490		-#endif
4491	4793
4492	4794	/* Reset Initialization control block */
4493	4795	memset(icb, 0, ha->init_cb_size);
..	..	@@ -4669,7 +4971,7 @@
4669	4971	ha->zio_mode = icb->add_firmware_options[0] &
4670	4972	(BIT_3 \| BIT_2 \| BIT_1 \| BIT_0);
4671	4973	ha->zio_timer = icb->interrupt_delay_timer ?
4672		- icb->interrupt_delay_timer: 2;
	4974	+ icb->interrupt_delay_timer : 2;
4673	4975	}
4674	4976	icb->add_firmware_options[0] &=
4675	4977	~(BIT_3 \| BIT_2 \| BIT_1 \| BIT_0);
..	..	@@ -4702,7 +5004,7 @@
4702	5004	unsigned long flags;
4703	5005
4704	5006	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4705		- rport = fcport->drport ? fcport->drport: fcport->rport;
	5007	+ rport = fcport->drport ? fcport->drport : fcport->rport;
4706	5008	fcport->drport = NULL;
4707	5009	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4708	5010	if (rport) {
..	..	@@ -4712,6 +5014,23 @@
4712	5014	rport->roles);
4713	5015
4714	5016	fc_remote_port_delete(rport);
	5017	+ }
	5018	+}
	5019	+
	5020	+void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
	5021	+{
	5022	+ int old_state;
	5023	+
	5024	+ old_state = atomic_read(&fcport->state);
	5025	+ atomic_set(&fcport->state, state);
	5026	+
	5027	+ /* Don't print state transitions during initial allocation of fcport */
	5028	+ if (old_state && old_state != state) {
	5029	+ ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
	5030	+ "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
	5031	+ fcport->port_name, port_state_str[old_state],
	5032	+ port_state_str[state], fcport->d_id.b.domain,
	5033	+ fcport->d_id.b.area, fcport->d_id.b.al_pa);
4715	5034	}
4716	5035	}
4717	5036
..	..	@@ -4731,6 +5050,16 @@
4731	5050	if (!fcport)
4732	5051	return NULL;
4733	5052
	5053	+ fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
	5054	+ sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
	5055	+ flags);
	5056	+ if (!fcport->ct_desc.ct_sns) {
	5057	+ ql_log(ql_log_warn, vha, 0xd049,
	5058	+ "Failed to allocate ct_sns request.\n");
	5059	+ kfree(fcport);
	5060	+ return NULL;
	5061	+ }
	5062	+
4734	5063	/* Setup fcport template structure. */
4735	5064	fcport->vha = vha;
4736	5065	fcport->port_type = FCT_UNKNOWN;
..	..	@@ -4739,13 +5068,11 @@
4739	5068	fcport->supported_classes = FC_COS_UNSPECIFIED;
4740	5069	fcport->fp_speed = PORT_SPEED_UNKNOWN;
4741	5070
4742		- fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4743		- sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4744		- flags);
4745	5071	fcport->disc_state = DSC_DELETED;
4746	5072	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4747	5073	fcport->deleted = QLA_SESS_DELETED;
4748	5074	fcport->login_retry = vha->hw->login_retry_count;
	5075	+ fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4749	5076	fcport->logout_on_delete = 1;
4750	5077
4751	5078	if (!fcport->ct_desc.ct_sns) {
..	..	@@ -4754,7 +5081,9 @@
4754	5081	kfree(fcport);
4755	5082	return NULL;
4756	5083	}
	5084	+
4757	5085	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
	5086	+ INIT_WORK(&fcport->free_work, qlt_free_session_done);
4758	5087	INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4759	5088	INIT_LIST_HEAD(&fcport->gnl_entry);
4760	5089	INIT_LIST_HEAD(&fcport->list);
..	..	@@ -4772,7 +5101,32 @@
4772	5101
4773	5102	fcport->ct_desc.ct_sns = NULL;
4774	5103	}
	5104	+ list_del(&fcport->list);
	5105	+ qla2x00_clear_loop_id(fcport);
4775	5106	kfree(fcport);
	5107	+}
	5108	+
	5109	+static void qla_get_login_template(scsi_qla_host_t *vha)
	5110	+{
	5111	+ struct qla_hw_data *ha = vha->hw;
	5112	+ int rval;
	5113	+ u32 *bp, sz;
	5114	+ __be32 *q;
	5115	+
	5116	+ memset(ha->init_cb, 0, ha->init_cb_size);
	5117	+ sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
	5118	+ rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
	5119	+ ha->init_cb, sz);
	5120	+ if (rval != QLA_SUCCESS) {
	5121	+ ql_dbg(ql_dbg_init, vha, 0x00d1,
	5122	+ "PLOGI ELS param read fail.\n");
	5123	+ return;
	5124	+ }
	5125	+ q = (__be32 *)&ha->plogi_els_payld.fl_csp;
	5126	+
	5127	+ bp = (uint32_t *)ha->init_cb;
	5128	+ cpu_to_be32_array(q, bp, sz / 4);
	5129	+ ha->flags.plogi_template_valid = 1;
4776	5130	}
4777	5131
4778	5132	/*
..	..	@@ -4793,6 +5147,7 @@
4793	5147	int rval;
4794	5148	unsigned long flags, save_flags;
4795	5149	struct qla_hw_data *ha = vha->hw;
	5150	+
4796	5151	rval = QLA_SUCCESS;
4797	5152
4798	5153	/* Get Initiator ID */
..	..	@@ -4817,14 +5172,11 @@
4817	5172	clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4818	5173
4819	5174	qla2x00_get_data_rate(vha);
	5175	+ qla_get_login_template(vha);
4820	5176
4821	5177	/* Determine what we need to do */
4822		- if (ha->current_topology == ISP_CFG_FL &&
4823		- (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4824		-
4825		- set_bit(RSCN_UPDATE, &flags);
4826		-
4827		- } else if (ha->current_topology == ISP_CFG_F &&
	5178	+ if ((ha->current_topology == ISP_CFG_FL \|\|
	5179	+ ha->current_topology == ISP_CFG_F) &&
4828	5180	(test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4829	5181
4830	5182	set_bit(RSCN_UPDATE, &flags);
..	..	@@ -4903,6 +5255,48 @@
4903	5255	return (rval);
4904	5256	}
4905	5257
	5258	+static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
	5259	+{
	5260	+ unsigned long flags;
	5261	+ fc_port_t *fcport;
	5262	+
	5263	+ if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
	5264	+ set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
	5265	+
	5266	+ list_for_each_entry(fcport, &vha->vp_fcports, list) {
	5267	+ if (fcport->n2n_flag) {
	5268	+ qla24xx_fcport_handle_login(vha, fcport);
	5269	+ return QLA_SUCCESS;
	5270	+ }
	5271	+ }
	5272	+
	5273	+ spin_lock_irqsave(&vha->work_lock, flags);
	5274	+ vha->scan.scan_retry++;
	5275	+ spin_unlock_irqrestore(&vha->work_lock, flags);
	5276	+
	5277	+ if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
	5278	+ set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
	5279	+ set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	5280	+ }
	5281	+ return QLA_FUNCTION_FAILED;
	5282	+}
	5283	+
	5284	+static void
	5285	+qla_reinitialize_link(scsi_qla_host_t *vha)
	5286	+{
	5287	+ int rval;
	5288	+
	5289	+ atomic_set(&vha->loop_state, LOOP_DOWN);
	5290	+ atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
	5291	+ rval = qla2x00_full_login_lip(vha);
	5292	+ if (rval == QLA_SUCCESS) {
	5293	+ ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n");
	5294	+ } else {
	5295	+ ql_dbg(ql_dbg_disc, vha, 0xd051,
	5296	+ "Link reinitialization failed (%d)\n", rval);
	5297	+ }
	5298	+}
	5299	+
4906	5300	/*
4907	5301	* qla2x00_configure_local_loop
4908	5302	* Updates Fibre Channel Device Database with local loop devices.
..	..	@@ -4920,39 +5314,17 @@
4920	5314	int found_devs;
4921	5315	int found;
4922	5316	fc_port_t fcport, new_fcport;
4923		-
4924	5317	uint16_t index;
4925	5318	uint16_t entries;
4926		- char *id_iter;
	5319	+ struct gid_list_info *gid;
4927	5320	uint16_t loop_id;
4928	5321	uint8_t domain, area, al_pa;
4929	5322	struct qla_hw_data *ha = vha->hw;
4930	5323	unsigned long flags;
4931	5324
4932	5325	/* Inititae N2N login. */
4933		- if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4934		- /* borrowing */
4935		- u32 *bp, i, sz;
4936		-
4937		- memset(ha->init_cb, 0, ha->init_cb_size);
4938		- sz = min_t(int, sizeof(struct els_plogi_payload),
4939		- ha->init_cb_size);
4940		- rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
4941		- (void *)ha->init_cb, sz);
4942		- if (rval == QLA_SUCCESS) {
4943		- bp = (uint32_t *)ha->init_cb;
4944		- for (i = 0; i < sz/4 ; i++, bp++)
4945		- bp = cpu_to_be32(bp);
4946		-
4947		- memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
4948		- sizeof(ha->plogi_els_payld.data));
4949		- set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4950		- } else {
4951		- ql_dbg(ql_dbg_init, vha, 0x00d1,
4952		- "PLOGI ELS param read fail.\n");
4953		- }
4954		- return QLA_SUCCESS;
4955		- }
	5326	+ if (N2N_TOPO(ha))
	5327	+ return qla2x00_configure_n2n_loop(vha);
4956	5328
4957	5329	found_devs = 0;
4958	5330	new_fcport = NULL;
..	..	@@ -4963,13 +5335,38 @@
4963	5335	rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
4964	5336	&entries);
4965	5337	if (rval != QLA_SUCCESS)
4966		- goto cleanup_allocation;
	5338	+ goto err;
4967	5339
4968	5340	ql_dbg(ql_dbg_disc, vha, 0x2011,
4969	5341	"Entries in ID list (%d).\n", entries);
4970	5342	ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4971		- (uint8_t *)ha->gid_list,
4972		- entries * sizeof(struct gid_list_info));
	5343	+ ha->gid_list, entries * sizeof(*ha->gid_list));
	5344	+
	5345	+ if (entries == 0) {
	5346	+ spin_lock_irqsave(&vha->work_lock, flags);
	5347	+ vha->scan.scan_retry++;
	5348	+ spin_unlock_irqrestore(&vha->work_lock, flags);
	5349	+
	5350	+ if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
	5351	+ u8 loop_map_entries = 0;
	5352	+ int rc;
	5353	+
	5354	+ rc = qla2x00_get_fcal_position_map(vha, NULL,
	5355	+ &loop_map_entries);
	5356	+ if (rc == QLA_SUCCESS && loop_map_entries > 1) {
	5357	+ /*
	5358	+ * There are devices that are still not logged
	5359	+ * in. Reinitialize to give them a chance.
	5360	+ */
	5361	+ qla_reinitialize_link(vha);
	5362	+ return QLA_FUNCTION_FAILED;
	5363	+ }
	5364	+ set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
	5365	+ set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	5366	+ }
	5367	+ } else {
	5368	+ vha->scan.scan_retry = 0;
	5369	+ }
4973	5370
4974	5371	list_for_each_entry(fcport, &vha->vp_fcports, list) {
4975	5372	fcport->scan_state = QLA_FCPORT_SCAN;
..	..	@@ -4981,32 +5378,32 @@
4981	5378	ql_log(ql_log_warn, vha, 0x2012,
4982	5379	"Memory allocation failed for fcport.\n");
4983	5380	rval = QLA_MEMORY_ALLOC_FAILED;
4984		- goto cleanup_allocation;
	5381	+ goto err;
4985	5382	}
4986	5383	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4987	5384
4988	5385	/* Add devices to port list. */
4989		- id_iter = (char *)ha->gid_list;
	5386	+ gid = ha->gid_list;
4990	5387	for (index = 0; index < entries; index++) {
4991		- domain = ((struct gid_list_info *)id_iter)->domain;
4992		- area = ((struct gid_list_info *)id_iter)->area;
4993		- al_pa = ((struct gid_list_info *)id_iter)->al_pa;
	5388	+ domain = gid->domain;
	5389	+ area = gid->area;
	5390	+ al_pa = gid->al_pa;
4994	5391	if (IS_QLA2100(ha) \|\| IS_QLA2200(ha))
4995		- loop_id = (uint16_t)
4996		- ((struct gid_list_info *)id_iter)->loop_id_2100;
	5392	+ loop_id = gid->loop_id_2100;
4997	5393	else
4998		- loop_id = le16_to_cpu(
4999		- ((struct gid_list_info *)id_iter)->loop_id);
5000		- id_iter += ha->gid_list_info_size;
	5394	+ loop_id = le16_to_cpu(gid->loop_id);
	5395	+ gid = (void *)gid + ha->gid_list_info_size;
5001	5396
5002	5397	/* Bypass reserved domain fields. */
5003	5398	if ((domain & 0xf0) == 0xf0)
5004	5399	continue;
5005	5400
5006	5401	/* Bypass if not same domain and area of adapter. */
5007		- if (area && domain &&
5008		- (area != vha->d_id.b.area \|\| domain != vha->d_id.b.domain))
	5402	+ if (area && domain && ((area != vha->d_id.b.area) \|\|
	5403	+ (domain != vha->d_id.b.domain)) &&
	5404	+ (ha->current_topology == ISP_CFG_NL))
5009	5405	continue;
	5406	+
5010	5407
5011	5408	/* Bypass invalid local loop ID. */
5012	5409	if (loop_id > LAST_LOCAL_LOOP_ID)
..	..	@@ -5052,6 +5449,13 @@
5052	5449	memcpy(fcport->node_name, new_fcport->node_name,
5053	5450	WWN_SIZE);
5054	5451	fcport->scan_state = QLA_FCPORT_FOUND;
	5452	+ if (fcport->login_retry == 0) {
	5453	+ fcport->login_retry = vha->hw->login_retry_count;
	5454	+ ql_dbg(ql_dbg_disc, vha, 0x2135,
	5455	+ "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
	5456	+ fcport->port_name, fcport->loop_id,
	5457	+ fcport->login_retry);
	5458	+ }
5055	5459	found++;
5056	5460	break;
5057	5461	}
..	..	@@ -5071,7 +5475,7 @@
5071	5475	ql_log(ql_log_warn, vha, 0xd031,
5072	5476	"Failed to allocate memory for fcport.\n");
5073	5477	rval = QLA_MEMORY_ALLOC_FAILED;
5074		- goto cleanup_allocation;
	5478	+ goto err;
5075	5479	}
5076	5480	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5077	5481	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
..	..	@@ -5094,7 +5498,7 @@
5094	5498	qla_ini_mode_enabled(vha)) &&
5095	5499	atomic_read(&fcport->state) == FCS_ONLINE) {
5096	5500	qla2x00_mark_device_lost(vha, fcport,
5097		- ql2xplogiabsentdevice, 0);
	5501	+ ql2xplogiabsentdevice);
5098	5502	if (fcport->loop_id != FC_NO_LOOP_ID &&
5099	5503	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5100	5504	fcport->port_type != FCT_INITIATOR &&
..	..	@@ -5114,15 +5518,14 @@
5114	5518	qla24xx_fcport_handle_login(vha, fcport);
5115	5519	}
5116	5520
5117		-cleanup_allocation:
5118		- kfree(new_fcport);
	5521	+ qla2x00_free_fcport(new_fcport);
5119	5522
5120		- if (rval != QLA_SUCCESS) {
5121		- ql_dbg(ql_dbg_disc, vha, 0x2098,
5122		- "Configure local loop error exit: rval=%x.\n", rval);
5123		- }
	5523	+ return rval;
5124	5524
5125		- return (rval);
	5525	+err:
	5526	+ ql_dbg(ql_dbg_disc, vha, 0x2098,
	5527	+ "Configure local loop error exit: rval=%x.\n", rval);
	5528	+ return rval;
5126	5529	}
5127	5530
5128	5531	static void
..	..	@@ -5204,16 +5607,23 @@
5204	5607
5205	5608	rport->supported_classes = fcport->supported_classes;
5206	5609
5207		- rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
	5610	+ rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5208	5611	if (fcport->port_type == FCT_INITIATOR)
5209		- rport_ids.roles \|= FC_RPORT_ROLE_FCP_INITIATOR;
	5612	+ rport_ids.roles \|= FC_PORT_ROLE_FCP_INITIATOR;
5210	5613	if (fcport->port_type == FCT_TARGET)
5211		- rport_ids.roles \|= FC_RPORT_ROLE_FCP_TARGET;
	5614	+ rport_ids.roles \|= FC_PORT_ROLE_FCP_TARGET;
	5615	+ if (fcport->port_type & FCT_NVME_INITIATOR)
	5616	+ rport_ids.roles \|= FC_PORT_ROLE_NVME_INITIATOR;
	5617	+ if (fcport->port_type & FCT_NVME_TARGET)
	5618	+ rport_ids.roles \|= FC_PORT_ROLE_NVME_TARGET;
	5619	+ if (fcport->port_type & FCT_NVME_DISCOVERY)
	5620	+ rport_ids.roles \|= FC_PORT_ROLE_NVME_DISCOVERY;
5212	5621
5213	5622	ql_dbg(ql_dbg_disc, vha, 0x20ee,
5214	5623	"%s %8phN. rport %p is %s mode\n",
5215	5624	__func__, fcport->port_name, rport,
5216		- (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
	5625	+ (fcport->port_type == FCT_TARGET) ? "tgt" :
	5626	+ ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5217	5627
5218	5628	fc_remote_port_rolechg(rport, rport_ids.roles);
5219	5629	}
..	..	@@ -5236,21 +5646,27 @@
5236	5646	void
5237	5647	qla2x00_update_fcport(scsi_qla_host_t vha, fc_port_t fcport)
5238	5648	{
	5649	+ unsigned long flags;
	5650	+
5239	5651	if (IS_SW_RESV_ADDR(fcport->d_id))
5240	5652	return;
5241	5653
5242	5654	ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5243	5655	__func__, fcport->port_name);
5244	5656
5245		- fcport->disc_state = DSC_UPD_FCPORT;
	5657	+ qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5246	5658	fcport->login_retry = vha->hw->login_retry_count;
5247	5659	fcport->flags &= ~(FCF_LOGIN_NEEDED \| FCF_ASYNC_SENT);
5248		- fcport->deleted = 0;
5249		- fcport->logout_on_delete = 1;
5250		- fcport->login_retry = vha->hw->login_retry_count;
5251		- fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5252	5660
5253		- qla2x00_iidma_fcport(vha, fcport);
	5661	+ spin_lock_irqsave(&vha->work_lock, flags);
	5662	+ fcport->deleted = 0;
	5663	+ spin_unlock_irqrestore(&vha->work_lock, flags);
	5664	+
	5665	+ if (vha->hw->current_topology == ISP_CFG_NL)
	5666	+ fcport->logout_on_delete = 0;
	5667	+ else
	5668	+ fcport->logout_on_delete = 1;
	5669	+ fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5254	5670
5255	5671	switch (vha->hw->current_topology) {
5256	5672	case ISP_CFG_N:
..	..	@@ -5261,9 +5677,13 @@
5261	5677	break;
5262	5678	}
5263	5679
5264		- if (fcport->fc4f_nvme) {
	5680	+ qla2x00_iidma_fcport(vha, fcport);
	5681	+
	5682	+ qla2x00_dfs_create_rport(vha, fcport);
	5683	+
	5684	+ if (NVME_TARGET(vha->hw, fcport)) {
5265	5685	qla_nvme_register_remote(vha, fcport);
5266		- fcport->disc_state = DSC_LOGIN_COMPLETE;
	5686	+ qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5267	5687	qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5268	5688	return;
5269	5689	}
..	..	@@ -5289,6 +5709,8 @@
5289	5709	break;
5290	5710	}
5291	5711
	5712	+ qla2x00_set_fcport_state(fcport, FCS_ONLINE);
	5713	+
5292	5714	if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5293	5715	if (fcport->id_changed) {
5294	5716	fcport->id_changed = 0;
..	..	@@ -5305,9 +5727,8 @@
5305	5727	qla24xx_post_gpsc_work(vha, fcport);
5306	5728	}
5307	5729	}
5308		- qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5309	5730
5310		- fcport->disc_state = DSC_LOGIN_COMPLETE;
	5731	+ qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5311	5732	}
5312	5733
5313	5734	void qla_register_fcport_fn(struct work_struct *work)
..	..	@@ -5375,23 +5796,21 @@
5375	5796	}
5376	5797	vha->device_flags \|= SWITCH_FOUND;
5377	5798
	5799	+ rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
	5800	+ if (rval != QLA_SUCCESS)
	5801	+ ql_dbg(ql_dbg_disc, vha, 0x20ff,
	5802	+ "Failed to get Fabric Port Name\n");
5378	5803
5379	5804	if (qla_tgt_mode_enabled(vha) \|\| qla_dual_mode_enabled(vha)) {
5380	5805	rval = qla2x00_send_change_request(vha, 0x3, 0);
5381	5806	if (rval != QLA_SUCCESS)
5382	5807	ql_log(ql_log_warn, vha, 0x121,
5383		- "Failed to enable receiving of RSCN requests: 0x%x.\n",
5384		- rval);
	5808	+ "Failed to enable receiving of RSCN requests: 0x%x.\n",
	5809	+ rval);
5385	5810	}
5386		-
5387	5811
5388	5812	do {
5389	5813	qla2x00_mgmt_svr_login(vha);
5390		-
5391		- /* FDMI support. */
5392		- if (ql2xfdmienable &&
5393		- test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5394		- qla2x00_fdmi_register(vha);
5395	5814
5396	5815	/* Ensure we are logged into the SNS. */
5397	5816	loop_id = NPH_SNS_LID(ha);
..	..	@@ -5404,6 +5823,12 @@
5404	5823	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5405	5824	return rval;
5406	5825	}
	5826	+
	5827	+ /* FDMI support. */
	5828	+ if (ql2xfdmienable &&
	5829	+ test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
	5830	+ qla2x00_fdmi_register(vha);
	5831	+
5407	5832	if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5408	5833	if (qla2x00_rft_id(vha)) {
5409	5834	/* EMPTY */
..	..	@@ -5588,11 +6013,8 @@
5588	6013	new_fcport->fc4_type = swl[swl_idx].fc4_type;
5589	6014
5590	6015	new_fcport->nvme_flag = 0;
5591		- new_fcport->fc4f_nvme = 0;
5592	6016	if (vha->flags.nvme_enabled &&
5593		- swl[swl_idx].fc4f_nvme) {
5594		- new_fcport->fc4f_nvme =
5595		- swl[swl_idx].fc4f_nvme;
	6017	+ swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
5596	6018	ql_log(ql_log_info, vha, 0x2131,
5597	6019	"FOUND: NVME port %8phC as FC Type 28h\n",
5598	6020	new_fcport->port_name);
..	..	@@ -5648,8 +6070,8 @@
5648	6070
5649	6071	/* Bypass ports whose FCP-4 type is not FCP_SCSI */
5650	6072	if (ql2xgffidenable &&
5651		- (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5652		- new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
	6073	+ (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
	6074	+ new_fcport->fc4_type != 0))
5653	6075	continue;
5654	6076
5655	6077	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
..	..	@@ -5717,9 +6139,9 @@
5717	6139	break;
5718	6140	}
5719	6141
5720		- if (fcport->fc4f_nvme) {
	6142	+ if (found && NVME_TARGET(vha->hw, fcport)) {
5721	6143	if (fcport->disc_state == DSC_DELETE_PEND) {
5722		- fcport->disc_state = DSC_GNL;
	6144	+ qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
5723	6145	vha->fcport_count--;
5724	6146	fcport->login_succ = 0;
5725	6147	}
..	..	@@ -5765,7 +6187,7 @@
5765	6187	qla_ini_mode_enabled(vha)) &&
5766	6188	atomic_read(&fcport->state) == FCS_ONLINE) {
5767	6189	qla2x00_mark_device_lost(vha, fcport,
5768		- ql2xplogiabsentdevice, 0);
	6190	+ ql2xplogiabsentdevice);
5769	6191	if (fcport->loop_id != FC_NO_LOOP_ID &&
5770	6192	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5771	6193	fcport->port_type != FCT_INITIATOR &&
..	..	@@ -5786,55 +6208,6 @@
5786	6208	}
5787	6209	return (rval);
5788	6210	}
5789		-
5790		-/*
5791		- * qla2x00_find_new_loop_id
5792		- * Scan through our port list and find a new usable loop ID.
5793		- *
5794		- * Input:
5795		- * ha: adapter state pointer.
5796		- * dev: port structure pointer.
5797		- *
5798		- * Returns:
5799		- * qla2x00 local function return status code.
5800		- *
5801		- * Context:
5802		- * Kernel context.
5803		- */
5804		-int
5805		-qla2x00_find_new_loop_id(scsi_qla_host_t vha, fc_port_t dev)
5806		-{
5807		- int rval;
5808		- struct qla_hw_data *ha = vha->hw;
5809		- unsigned long flags = 0;
5810		-
5811		- rval = QLA_SUCCESS;
5812		-
5813		- spin_lock_irqsave(&ha->vport_slock, flags);
5814		-
5815		- dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5816		- LOOPID_MAP_SIZE);
5817		- if (dev->loop_id >= LOOPID_MAP_SIZE \|\|
5818		- qla2x00_is_reserved_id(vha, dev->loop_id)) {
5819		- dev->loop_id = FC_NO_LOOP_ID;
5820		- rval = QLA_FUNCTION_FAILED;
5821		- } else
5822		- set_bit(dev->loop_id, ha->loop_id_map);
5823		-
5824		- spin_unlock_irqrestore(&ha->vport_slock, flags);
5825		-
5826		- if (rval == QLA_SUCCESS)
5827		- ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5828		- "Assigning new loopid=%x, portid=%x.\n",
5829		- dev->loop_id, dev->d_id.b24);
5830		- else
5831		- ql_log(ql_log_warn, dev->vha, 0x2087,
5832		- "No loop_id's available, portid=%x.\n",
5833		- dev->d_id.b24);
5834		-
5835		- return (rval);
5836		-}
5837		-
5838	6211
5839	6212	/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5840	6213	int
..	..	@@ -5980,7 +6353,7 @@
5980	6353	ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5981	6354	fcport->d_id.b.domain, fcport->d_id.b.area,
5982	6355	fcport->d_id.b.al_pa);
5983		- qla2x00_mark_device_lost(vha, fcport, 1, 0);
	6356	+ qla2x00_mark_device_lost(vha, fcport, 1);
5984	6357
5985	6358	rval = 1;
5986	6359	break;
..	..	@@ -6057,11 +6430,6 @@
6057	6430	{
6058	6431	int rval = QLA_SUCCESS;
6059	6432	uint32_t wait_time;
6060		- struct req_que *req;
6061		- struct rsp_que *rsp;
6062		-
6063		- req = vha->req;
6064		- rsp = req->rsp;
6065	6433
6066	6434	clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6067	6435	if (vha->flags.online) {
..	..	@@ -6074,8 +6442,8 @@
6074	6442	* Issue a marker after FW becomes
6075	6443	* ready.
6076	6444	*/
6077		- qla2x00_marker(vha, req, rsp, 0, 0,
6078		- MK_SYNC_ALL);
	6445	+ qla2x00_marker(vha, vha->hw->base_qpair,
	6446	+ 0, 0, MK_SYNC_ALL);
6079	6447	vha->marker_needed = 0;
6080	6448	}
6081	6449
..	..	@@ -6332,6 +6700,7 @@
6332	6700	qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6333	6701	} else {
6334	6702	const char *state = qla83xx_dev_state_to_string(dev_state);
	6703	+
6335	6704	ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6336	6705
6337	6706	/* SV: XXX: Is timeout required here? */
..	..	@@ -6498,16 +6867,17 @@
6498	6867	atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6499	6868	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6500	6869	atomic_set(&vha->loop_state, LOOP_DOWN);
6501		- qla2x00_mark_all_devices_lost(vha, 0);
	6870	+ qla2x00_mark_all_devices_lost(vha);
6502	6871	list_for_each_entry(vp, &ha->vp_list, list)
6503		- qla2x00_mark_all_devices_lost(vp, 0);
	6872	+ qla2x00_mark_all_devices_lost(vp);
6504	6873	} else {
6505	6874	if (!atomic_read(&vha->loop_down_timer))
6506	6875	atomic_set(&vha->loop_down_timer,
6507	6876	LOOP_DOWN_TIME);
6508	6877	}
6509	6878	/* Wait for pending cmds to complete */
6510		- qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
	6879	+ WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
	6880	+ != QLA_SUCCESS);
6511	6881	}
6512	6882
6513	6883	void
..	..	@@ -6545,7 +6915,7 @@
6545	6915	ha->flags.n2n_ae = 0;
6546	6916	ha->flags.lip_ae = 0;
6547	6917	ha->current_topology = 0;
6548		- ha->flags.fw_started = 0;
	6918	+ QLA_FW_STOPPED(ha);
6549	6919	ha->flags.fw_init_done = 0;
6550	6920	ha->chip_reset++;
6551	6921	ha->base_qpair->chip_reset = ha->chip_reset;
..	..	@@ -6556,14 +6926,15 @@
6556	6926	}
6557	6927
6558	6928	/* purge MBox commands */
6559		- if (atomic_read(&ha->num_pend_mbx_stage3)) {
	6929	+ spin_lock_irqsave(&ha->hardware_lock, flags);
	6930	+ if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) {
6560	6931	clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6561	6932	complete(&ha->mbx_intr_comp);
6562	6933	}
	6934	+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
6563	6935
6564	6936	i = 0;
6565		- while (atomic_read(&ha->num_pend_mbx_stage3) \|\|
6566		- atomic_read(&ha->num_pend_mbx_stage2) \|\|
	6937	+ while (atomic_read(&ha->num_pend_mbx_stage2) \|\|
6567	6938	atomic_read(&ha->num_pend_mbx_stage1)) {
6568	6939	msleep(20);
6569	6940	i++;
..	..	@@ -6575,14 +6946,14 @@
6575	6946	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6576	6947	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6577	6948	atomic_set(&vha->loop_state, LOOP_DOWN);
6578		- qla2x00_mark_all_devices_lost(vha, 0);
	6949	+ qla2x00_mark_all_devices_lost(vha);
6579	6950
6580	6951	spin_lock_irqsave(&ha->vport_slock, flags);
6581	6952	list_for_each_entry(vp, &ha->vp_list, list) {
6582	6953	atomic_inc(&vp->vref_count);
6583	6954	spin_unlock_irqrestore(&ha->vport_slock, flags);
6584	6955
6585		- qla2x00_mark_all_devices_lost(vp, 0);
	6956	+ qla2x00_mark_all_devices_lost(vp);
6586	6957
6587	6958	spin_lock_irqsave(&ha->vport_slock, flags);
6588	6959	atomic_dec(&vp->vref_count);
..	..	@@ -6612,22 +6983,18 @@
6612	6983	}
6613	6984	spin_unlock_irqrestore(&ha->vport_slock, flags);
6614	6985
6615		- if (!ha->flags.eeh_busy) {
6616		- /* Make sure for ISP 82XX IO DMA is complete */
6617		- if (IS_P3P_TYPE(ha)) {
6618		- qla82xx_chip_reset_cleanup(vha);
6619		- ql_log(ql_log_info, vha, 0x00b4,
6620		- "Done chip reset cleanup.\n");
	6986	+ /* Make sure for ISP 82XX IO DMA is complete */
	6987	+ if (IS_P3P_TYPE(ha)) {
	6988	+ qla82xx_chip_reset_cleanup(vha);
	6989	+ ql_log(ql_log_info, vha, 0x00b4,
	6990	+ "Done chip reset cleanup.\n");
6621	6991
6622		- /* Done waiting for pending commands.
6623		- * Reset the online flag.
6624		- */
6625		- vha->flags.online = 0;
6626		- }
6627		-
6628		- /* Requeue all commands in outstanding command list. */
6629		- qla2x00_abort_all_cmds(vha, DID_RESET << 16);
	6992	+ /* Done waiting for pending commands. Reset online flag */
	6993	+ vha->flags.online = 0;
6630	6994	}
	6995	+
	6996	+ /* Requeue all commands in outstanding command list. */
	6997	+ qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6631	6998	/* memory barrier */
6632	6999	wmb();
6633	7000	}
..	..	@@ -6655,6 +7022,20 @@
6655	7022	if (vha->flags.online) {
6656	7023	qla2x00_abort_isp_cleanup(vha);
6657	7024
	7025	+ if (qla2x00_isp_reg_stat(ha)) {
	7026	+ ql_log(ql_log_info, vha, 0x803f,
	7027	+ "ISP Abort - ISP reg disconnect, exiting.\n");
	7028	+ return status;
	7029	+ }
	7030	+
	7031	+ if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
	7032	+ ha->flags.chip_reset_done = 1;
	7033	+ vha->flags.online = 1;
	7034	+ status = 0;
	7035	+ clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
	7036	+ return status;
	7037	+ }
	7038	+
6658	7039	if (IS_QLA8031(ha)) {
6659	7040	ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6660	7041	"Clearing fcoe driver presence.\n");
..	..	@@ -6670,10 +7051,35 @@
6670	7051	return status;
6671	7052	}
6672	7053
	7054	+ switch (vha->qlini_mode) {
	7055	+ case QLA2XXX_INI_MODE_DISABLED:
	7056	+ if (!qla_tgt_mode_enabled(vha))
	7057	+ return 0;
	7058	+ break;
	7059	+ case QLA2XXX_INI_MODE_DUAL:
	7060	+ if (!qla_dual_mode_enabled(vha) &&
	7061	+ !qla_ini_mode_enabled(vha))
	7062	+ return 0;
	7063	+ break;
	7064	+ case QLA2XXX_INI_MODE_ENABLED:
	7065	+ default:
	7066	+ break;
	7067	+ }
	7068	+
6673	7069	ha->isp_ops->get_flash_version(vha, req->ring);
6674	7070
	7071	+ if (qla2x00_isp_reg_stat(ha)) {
	7072	+ ql_log(ql_log_info, vha, 0x803f,
	7073	+ "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
	7074	+ return status;
	7075	+ }
6675	7076	ha->isp_ops->nvram_config(vha);
6676	7077
	7078	+ if (qla2x00_isp_reg_stat(ha)) {
	7079	+ ql_log(ql_log_info, vha, 0x803f,
	7080	+ "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
	7081	+ return status;
	7082	+ }
6677	7083	if (!qla2x00_restart_isp(vha)) {
6678	7084	clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6679	7085
..	..	@@ -6799,38 +7205,41 @@
6799	7205	static int
6800	7206	qla2x00_restart_isp(scsi_qla_host_t *vha)
6801	7207	{
6802		- int status = 0;
	7208	+ int status;
6803	7209	struct qla_hw_data *ha = vha->hw;
6804		- struct req_que *req = ha->req_q_map[0];
6805		- struct rsp_que *rsp = ha->rsp_q_map[0];
6806	7210
6807	7211	/* If firmware needs to be loaded */
6808	7212	if (qla2x00_isp_firmware(vha)) {
6809	7213	vha->flags.online = 0;
6810	7214	status = ha->isp_ops->chip_diag(vha);
6811		- if (!status)
6812		- status = qla2x00_setup_chip(vha);
	7215	+ if (status)
	7216	+ return status;
	7217	+ status = qla2x00_setup_chip(vha);
	7218	+ if (status)
	7219	+ return status;
6813	7220	}
6814	7221
6815		- if (!status && !(status = qla2x00_init_rings(vha))) {
6816		- clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6817		- ha->flags.chip_reset_done = 1;
	7222	+ status = qla2x00_init_rings(vha);
	7223	+ if (status)
	7224	+ return status;
6818	7225
6819		- /* Initialize the queues in use */
6820		- qla25xx_init_queues(ha);
	7226	+ clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
	7227	+ ha->flags.chip_reset_done = 1;
6821	7228
6822		- status = qla2x00_fw_ready(vha);
6823		- if (!status) {
6824		- /* Issue a marker after FW becomes ready. */
6825		- qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6826		- set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6827		- }
	7229	+ /* Initialize the queues in use */
	7230	+ qla25xx_init_queues(ha);
6828	7231
	7232	+ status = qla2x00_fw_ready(vha);
	7233	+ if (status) {
6829	7234	/* if no cable then assume it's good */
6830		- if ((vha->device_flags & DFLG_NO_CABLE))
6831		- status = 0;
	7235	+ return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
6832	7236	}
6833		- return (status);
	7237	+
	7238	+ /* Issue a marker after FW becomes ready. */
	7239	+ qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
	7240	+ set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	7241	+
	7242	+ return 0;
6834	7243	}
6835	7244
6836	7245	static int
..	..	@@ -6883,7 +7292,7 @@
6883	7292	* Input:
6884	7293	* ha = adapter block pointer.
6885	7294	*/
6886		-void
	7295	+int
6887	7296	qla2x00_reset_adapter(scsi_qla_host_t *vha)
6888	7297	{
6889	7298	unsigned long flags = 0;
..	..	@@ -6894,14 +7303,16 @@
6894	7303	ha->isp_ops->disable_intrs(ha);
6895	7304
6896	7305	spin_lock_irqsave(&ha->hardware_lock, flags);
6897		- WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6898		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6899		- WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6900		- RD_REG_WORD(&reg->hccr); /* PCI Posting. */
	7306	+ wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
	7307	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
	7308	+ wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
	7309	+ rd_reg_word(&reg->hccr); /* PCI Posting. */
6901	7310	spin_unlock_irqrestore(&ha->hardware_lock, flags);
	7311	+
	7312	+ return QLA_SUCCESS;
6902	7313	}
6903	7314
6904		-void
	7315	+int
6905	7316	qla24xx_reset_adapter(scsi_qla_host_t *vha)
6906	7317	{
6907	7318	unsigned long flags = 0;
..	..	@@ -6909,20 +7320,22 @@
6909	7320	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6910	7321
6911	7322	if (IS_P3P_TYPE(ha))
6912		- return;
	7323	+ return QLA_SUCCESS;
6913	7324
6914	7325	vha->flags.online = 0;
6915	7326	ha->isp_ops->disable_intrs(ha);
6916	7327
6917	7328	spin_lock_irqsave(&ha->hardware_lock, flags);
6918		- WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6919		- RD_REG_DWORD(&reg->hccr);
6920		- WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6921		- RD_REG_DWORD(&reg->hccr);
	7329	+ wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);
	7330	+ rd_reg_dword(&reg->hccr);
	7331	+ wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);
	7332	+ rd_reg_dword(&reg->hccr);
6922	7333	spin_unlock_irqrestore(&ha->hardware_lock, flags);
6923	7334
6924	7335	if (IS_NOPOLLING_TYPE(ha))
6925	7336	ha->isp_ops->enable_intrs(ha);
	7337	+
	7338	+ return QLA_SUCCESS;
6926	7339	}
6927	7340
6928	7341	/* On sparc systems, obtain port and node WWN from firmware
..	..	@@ -6954,7 +7367,7 @@
6954	7367	int rval;
6955	7368	struct init_cb_24xx *icb;
6956	7369	struct nvram_24xx *nv;
6957		- uint32_t *dptr;
	7370	+ __le32 *dptr;
6958	7371	uint8_t dptr1, dptr2;
6959	7372	uint32_t chksum;
6960	7373	uint16_t cnt;
..	..	@@ -6973,34 +7386,33 @@
6973	7386	ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6974	7387	}
6975	7388
6976		- ha->nvram_size = sizeof(struct nvram_24xx);
	7389	+ ha->nvram_size = sizeof(*nv);
6977	7390	ha->vpd_size = FA_NVRAM_VPD_SIZE;
6978	7391
6979	7392	/* Get VPD data into cache */
6980	7393	ha->vpd = ha->nvram + VPD_OFFSET;
6981		- ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
	7394	+ ha->isp_ops->read_nvram(vha, ha->vpd,
6982	7395	ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6983	7396
6984	7397	/* Get NVRAM data into cache and calculate checksum. */
6985		- dptr = (uint32_t *)nv;
6986		- ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
6987		- ha->nvram_size);
	7398	+ dptr = (__force __le32 *)nv;
	7399	+ ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
6988	7400	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6989	7401	chksum += le32_to_cpu(*dptr);
6990	7402
6991	7403	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6992	7404	"Contents of NVRAM\n");
6993	7405	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6994		- (uint8_t *)nv, ha->nvram_size);
	7406	+ nv, ha->nvram_size);
6995	7407
6996	7408	/* Bad NVRAM data, set defaults parameters. */
6997		- if (chksum \|\| nv->id[0] != 'I' \|\| nv->id[1] != 'S' \|\| nv->id[2] != 'P'
6998		- \|\| nv->id[3] != ' ' \|\|
6999		- nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
	7409	+ if (chksum \|\| memcmp("ISP ", nv->id, sizeof(nv->id)) \|\|
	7410	+ le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7000	7411	/* Reset NVRAM data. */
7001	7412	ql_log(ql_log_warn, vha, 0x006b,
7002		- "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7003		- "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
	7413	+ "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
	7414	+ chksum, nv->id, nv->nvram_version);
	7415	+ ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7004	7416	ql_log(ql_log_warn, vha, 0x006c,
7005	7417	"Falling back to functioning (yet invalid -- WWPN) "
7006	7418	"defaults.\n");
..	..	@@ -7011,7 +7423,7 @@
7011	7423	memset(nv, 0, ha->nvram_size);
7012	7424	nv->nvram_version = cpu_to_le16(ICB_VERSION);
7013	7425	nv->version = cpu_to_le16(ICB_VERSION);
7014		- nv->frame_payload_size = 2048;
	7426	+ nv->frame_payload_size = cpu_to_le16(2048);
7015	7427	nv->execution_throttle = cpu_to_le16(0xFFFF);
7016	7428	nv->exchange_count = cpu_to_le16(0);
7017	7429	nv->hard_address = cpu_to_le16(124);
..	..	@@ -7108,11 +7520,11 @@
7108	7520	ha->flags.disable_risc_code_load = 0;
7109	7521	ha->flags.enable_lip_reset = 0;
7110	7522	ha->flags.enable_lip_full_login =
7111		- le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
	7523	+ le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7112	7524	ha->flags.enable_target_reset =
7113		- le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
	7525	+ le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7114	7526	ha->flags.enable_led_scheme = 0;
7115		- ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
	7527	+ ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7116	7528
7117	7529	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7118	7530	(BIT_6 \| BIT_5 \| BIT_4)) >> 4;
..	..	@@ -7179,14 +7591,14 @@
7179	7591	ha->login_retry_count = ql2xloginretrycount;
7180	7592
7181	7593	/* N2N: driver will initiate Login instead of FW */
7182		- icb->firmware_options_3 \|= BIT_8;
	7594	+ icb->firmware_options_3 \|= cpu_to_le32(BIT_8);
7183	7595
7184	7596	/* Enable ZIO. */
7185	7597	if (!vha->flags.init_done) {
7186	7598	ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7187	7599	(BIT_3 \| BIT_2 \| BIT_1 \| BIT_0);
7188	7600	ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7189		- le16_to_cpu(icb->interrupt_delay_timer): 2;
	7601	+ le16_to_cpu(icb->interrupt_delay_timer) : 2;
7190	7602	}
7191	7603	icb->firmware_options_2 &= cpu_to_le32(
7192	7604	~(BIT_3 \| BIT_2 \| BIT_1 \| BIT_0));
..	..	@@ -7209,128 +7621,315 @@
7209	7621	return (rval);
7210	7622	}
7211	7623
7212		-uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
	7624	+static void
	7625	+qla27xx_print_image(struct scsi_qla_host vha, char name,
	7626	+ struct qla27xx_image_status *image_status)
7213	7627	{
7214		- struct qla27xx_image_status pri_image_status, sec_image_status;
7215		- uint8_t valid_pri_image, valid_sec_image;
7216		- uint32_t *wptr;
7217		- uint32_t cnt, chksum, size;
7218		- struct qla_hw_data *ha = vha->hw;
	7628	+ ql_dbg(ql_dbg_init, vha, 0x018b,
	7629	+ "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
	7630	+ name, "status",
	7631	+ image_status->image_status_mask,
	7632	+ le16_to_cpu(image_status->generation),
	7633	+ image_status->ver_major,
	7634	+ image_status->ver_minor,
	7635	+ image_status->bitmap,
	7636	+ le32_to_cpu(image_status->checksum),
	7637	+ le32_to_cpu(image_status->signature));
	7638	+}
7219	7639
7220		- valid_pri_image = valid_sec_image = 1;
7221		- ha->active_image = 0;
7222		- size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
	7640	+static bool
	7641	+qla28xx_check_aux_image_status_signature(
	7642	+ struct qla27xx_image_status *image_status)
	7643	+{
	7644	+ ulong signature = le32_to_cpu(image_status->signature);
	7645	+
	7646	+ return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
	7647	+}
	7648	+
	7649	+static bool
	7650	+qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
	7651	+{
	7652	+ ulong signature = le32_to_cpu(image_status->signature);
	7653	+
	7654	+ return
	7655	+ signature != QLA27XX_IMG_STATUS_SIGN &&
	7656	+ signature != QLA28XX_IMG_STATUS_SIGN;
	7657	+}
	7658	+
	7659	+static ulong
	7660	+qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
	7661	+{
	7662	+ __le32 p = (__force __le32 )image_status;
	7663	+ uint n = sizeof(image_status) / sizeof(p);
	7664	+ uint32_t sum = 0;
	7665	+
	7666	+ for ( ; n--; p++)
	7667	+ sum += le32_to_cpup(p);
	7668	+
	7669	+ return sum;
	7670	+}
	7671	+
	7672	+static inline uint
	7673	+qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
	7674	+{
	7675	+ return aux->bitmap & bitmask ?
	7676	+ QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
	7677	+}
	7678	+
	7679	+static void
	7680	+qla28xx_component_status(
	7681	+ struct active_regions active_regions, struct qla27xx_image_status aux)
	7682	+{
	7683	+ active_regions->aux.board_config =
	7684	+ qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
	7685	+
	7686	+ active_regions->aux.vpd_nvram =
	7687	+ qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
	7688	+
	7689	+ active_regions->aux.npiv_config_0_1 =
	7690	+ qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
	7691	+
	7692	+ active_regions->aux.npiv_config_2_3 =
	7693	+ qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
	7694	+}
	7695	+
	7696	+static int
	7697	+qla27xx_compare_image_generation(
	7698	+ struct qla27xx_image_status *pri_image_status,
	7699	+ struct qla27xx_image_status *sec_image_status)
	7700	+{
	7701	+ /* calculate generation delta as uint16 (this accounts for wrap) */
	7702	+ int16_t delta =
	7703	+ le16_to_cpu(pri_image_status->generation) -
	7704	+ le16_to_cpu(sec_image_status->generation);
	7705	+
	7706	+ ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
	7707	+
	7708	+ return delta;
	7709	+}
	7710	+
	7711	+void
	7712	+qla28xx_get_aux_images(
	7713	+ struct scsi_qla_host vha, struct active_regions active_regions)
	7714	+{
	7715	+ struct qla_hw_data *ha = vha->hw;
	7716	+ struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
	7717	+ bool valid_pri_image = false, valid_sec_image = false;
	7718	+ bool active_pri_image = false, active_sec_image = false;
	7719	+
	7720	+ if (!ha->flt_region_aux_img_status_pri) {
	7721	+ ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
	7722	+ goto check_sec_image;
	7723	+ }
	7724	+
	7725	+ qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
	7726	+ ha->flt_region_aux_img_status_pri,
	7727	+ sizeof(pri_aux_image_status) >> 2);
	7728	+ qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
	7729	+
	7730	+ if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
	7731	+ ql_dbg(ql_dbg_init, vha, 0x018b,
	7732	+ "Primary aux image signature (%#x) not valid\n",
	7733	+ le32_to_cpu(pri_aux_image_status.signature));
	7734	+ goto check_sec_image;
	7735	+ }
	7736	+
	7737	+ if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
	7738	+ ql_dbg(ql_dbg_init, vha, 0x018c,
	7739	+ "Primary aux image checksum failed\n");
	7740	+ goto check_sec_image;
	7741	+ }
	7742	+
	7743	+ valid_pri_image = true;
	7744	+
	7745	+ if (pri_aux_image_status.image_status_mask & 1) {
	7746	+ ql_dbg(ql_dbg_init, vha, 0x018d,
	7747	+ "Primary aux image is active\n");
	7748	+ active_pri_image = true;
	7749	+ }
	7750	+
	7751	+check_sec_image:
	7752	+ if (!ha->flt_region_aux_img_status_sec) {
	7753	+ ql_dbg(ql_dbg_init, vha, 0x018a,
	7754	+ "Secondary aux image not addressed\n");
	7755	+ goto check_valid_image;
	7756	+ }
	7757	+
	7758	+ qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
	7759	+ ha->flt_region_aux_img_status_sec,
	7760	+ sizeof(sec_aux_image_status) >> 2);
	7761	+ qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
	7762	+
	7763	+ if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
	7764	+ ql_dbg(ql_dbg_init, vha, 0x018b,
	7765	+ "Secondary aux image signature (%#x) not valid\n",
	7766	+ le32_to_cpu(sec_aux_image_status.signature));
	7767	+ goto check_valid_image;
	7768	+ }
	7769	+
	7770	+ if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
	7771	+ ql_dbg(ql_dbg_init, vha, 0x018c,
	7772	+ "Secondary aux image checksum failed\n");
	7773	+ goto check_valid_image;
	7774	+ }
	7775	+
	7776	+ valid_sec_image = true;
	7777	+
	7778	+ if (sec_aux_image_status.image_status_mask & 1) {
	7779	+ ql_dbg(ql_dbg_init, vha, 0x018d,
	7780	+ "Secondary aux image is active\n");
	7781	+ active_sec_image = true;
	7782	+ }
	7783	+
	7784	+check_valid_image:
	7785	+ if (valid_pri_image && active_pri_image &&
	7786	+ valid_sec_image && active_sec_image) {
	7787	+ if (qla27xx_compare_image_generation(&pri_aux_image_status,
	7788	+ &sec_aux_image_status) >= 0) {
	7789	+ qla28xx_component_status(active_regions,
	7790	+ &pri_aux_image_status);
	7791	+ } else {
	7792	+ qla28xx_component_status(active_regions,
	7793	+ &sec_aux_image_status);
	7794	+ }
	7795	+ } else if (valid_pri_image && active_pri_image) {
	7796	+ qla28xx_component_status(active_regions, &pri_aux_image_status);
	7797	+ } else if (valid_sec_image && active_sec_image) {
	7798	+ qla28xx_component_status(active_regions, &sec_aux_image_status);
	7799	+ }
	7800	+
	7801	+ ql_dbg(ql_dbg_init, vha, 0x018f,
	7802	+ "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
	7803	+ active_regions->aux.board_config,
	7804	+ active_regions->aux.vpd_nvram,
	7805	+ active_regions->aux.npiv_config_0_1,
	7806	+ active_regions->aux.npiv_config_2_3);
	7807	+}
	7808	+
	7809	+void
	7810	+qla27xx_get_active_image(struct scsi_qla_host *vha,
	7811	+ struct active_regions *active_regions)
	7812	+{
	7813	+ struct qla_hw_data *ha = vha->hw;
	7814	+ struct qla27xx_image_status pri_image_status, sec_image_status;
	7815	+ bool valid_pri_image = false, valid_sec_image = false;
	7816	+ bool active_pri_image = false, active_sec_image = false;
7223	7817
7224	7818	if (!ha->flt_region_img_status_pri) {
7225		- valid_pri_image = 0;
	7819	+ ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7226	7820	goto check_sec_image;
7227	7821	}
7228	7822
7229		- qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
7230		- ha->flt_region_img_status_pri, size);
	7823	+ if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
	7824	+ ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
	7825	+ QLA_SUCCESS) {
	7826	+ WARN_ON_ONCE(true);
	7827	+ goto check_sec_image;
	7828	+ }
	7829	+ qla27xx_print_image(vha, "Primary image", &pri_image_status);
7231	7830
7232		- if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
	7831	+ if (qla27xx_check_image_status_signature(&pri_image_status)) {
7233	7832	ql_dbg(ql_dbg_init, vha, 0x018b,
7234		- "Primary image signature (0x%x) not valid\n",
7235		- pri_image_status.signature);
7236		- valid_pri_image = 0;
	7833	+ "Primary image signature (%#x) not valid\n",
	7834	+ le32_to_cpu(pri_image_status.signature));
7237	7835	goto check_sec_image;
7238	7836	}
7239	7837
7240		- wptr = (uint32_t *)(&pri_image_status);
7241		- cnt = size;
7242		-
7243		- for (chksum = 0; cnt--; wptr++)
7244		- chksum += le32_to_cpu(*wptr);
7245		-
7246		- if (chksum) {
	7838	+ if (qla27xx_image_status_checksum(&pri_image_status)) {
7247	7839	ql_dbg(ql_dbg_init, vha, 0x018c,
7248		- "Checksum validation failed for primary image (0x%x)\n",
7249		- chksum);
7250		- valid_pri_image = 0;
	7840	+ "Primary image checksum failed\n");
	7841	+ goto check_sec_image;
	7842	+ }
	7843	+
	7844	+ valid_pri_image = true;
	7845	+
	7846	+ if (pri_image_status.image_status_mask & 1) {
	7847	+ ql_dbg(ql_dbg_init, vha, 0x018d,
	7848	+ "Primary image is active\n");
	7849	+ active_pri_image = true;
7251	7850	}
7252	7851
7253	7852	check_sec_image:
7254	7853	if (!ha->flt_region_img_status_sec) {
7255		- valid_sec_image = 0;
	7854	+ ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7256	7855	goto check_valid_image;
7257	7856	}
7258	7857
7259	7858	qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7260		- ha->flt_region_img_status_sec, size);
	7859	+ ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
	7860	+ qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7261	7861
7262		- if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7263		- ql_dbg(ql_dbg_init, vha, 0x018d,
7264		- "Secondary image signature(0x%x) not valid\n",
7265		- sec_image_status.signature);
7266		- valid_sec_image = 0;
	7862	+ if (qla27xx_check_image_status_signature(&sec_image_status)) {
	7863	+ ql_dbg(ql_dbg_init, vha, 0x018b,
	7864	+ "Secondary image signature (%#x) not valid\n",
	7865	+ le32_to_cpu(sec_image_status.signature));
7267	7866	goto check_valid_image;
7268	7867	}
7269	7868
7270		- wptr = (uint32_t *)(&sec_image_status);
7271		- cnt = size;
7272		- for (chksum = 0; cnt--; wptr++)
7273		- chksum += le32_to_cpu(*wptr);
7274		- if (chksum) {
7275		- ql_dbg(ql_dbg_init, vha, 0x018e,
7276		- "Checksum validation failed for secondary image (0x%x)\n",
7277		- chksum);
7278		- valid_sec_image = 0;
	7869	+ if (qla27xx_image_status_checksum(&sec_image_status)) {
	7870	+ ql_dbg(ql_dbg_init, vha, 0x018c,
	7871	+ "Secondary image checksum failed\n");
	7872	+ goto check_valid_image;
	7873	+ }
	7874	+
	7875	+ valid_sec_image = true;
	7876	+
	7877	+ if (sec_image_status.image_status_mask & 1) {
	7878	+ ql_dbg(ql_dbg_init, vha, 0x018d,
	7879	+ "Secondary image is active\n");
	7880	+ active_sec_image = true;
7279	7881	}
7280	7882
7281	7883	check_valid_image:
7282		- if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7283		- ha->active_image = QLA27XX_PRIMARY_IMAGE;
7284		- if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7285		- if (!ha->active_image \|\|
7286		- pri_image_status.generation_number <
7287		- sec_image_status.generation_number)
7288		- ha->active_image = QLA27XX_SECONDARY_IMAGE;
	7884	+ if (valid_pri_image && active_pri_image)
	7885	+ active_regions->global = QLA27XX_PRIMARY_IMAGE;
	7886	+
	7887	+ if (valid_sec_image && active_sec_image) {
	7888	+ if (!active_regions->global \|\|
	7889	+ qla27xx_compare_image_generation(
	7890	+ &pri_image_status, &sec_image_status) < 0) {
	7891	+ active_regions->global = QLA27XX_SECONDARY_IMAGE;
	7892	+ }
7289	7893	}
7290	7894
7291		- ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n",
7292		- ha->active_image == 0 ? "default bootld and fw" :
7293		- ha->active_image == 1 ? "primary" :
7294		- ha->active_image == 2 ? "secondary" :
7295		- "Invalid");
	7895	+ ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
	7896	+ active_regions->global == QLA27XX_DEFAULT_IMAGE ?
	7897	+ "default (boot/fw)" :
	7898	+ active_regions->global == QLA27XX_PRIMARY_IMAGE ?
	7899	+ "primary" :
	7900	+ active_regions->global == QLA27XX_SECONDARY_IMAGE ?
	7901	+ "secondary" : "invalid",
	7902	+ active_regions->global);
	7903	+}
7296	7904
7297		- return ha->active_image;
	7905	+bool qla24xx_risc_firmware_invalid(uint32_t *dword)
	7906	+{
	7907	+ return
	7908	+ !(dword[4] \| dword[5] \| dword[6] \| dword[7]) \|\|
	7909	+ !(~dword[4] \| ~dword[5] \| ~dword[6] \| ~dword[7]);
7298	7910	}
7299	7911
7300	7912	static int
7301	7913	qla24xx_load_risc_flash(scsi_qla_host_t vha, uint32_t srisc_addr,
7302	7914	uint32_t faddr)
7303	7915	{
7304		- int rval = QLA_SUCCESS;
7305		- int segments, fragment;
7306		- uint32_t *dcode, dlen;
7307		- uint32_t risc_addr;
7308		- uint32_t risc_size;
7309		- uint32_t i;
	7916	+ int rval;
	7917	+ uint templates, segments, fragment;
	7918	+ ulong i;
	7919	+ uint j;
	7920	+ ulong dlen;
	7921	+ uint32_t *dcode;
	7922	+ uint32_t risc_addr, risc_size, risc_attr = 0;
7310	7923	struct qla_hw_data *ha = vha->hw;
7311	7924	struct req_que *req = ha->req_q_map[0];
	7925	+ struct fwdt *fwdt = ha->fwdt;
7312	7926
7313	7927	ql_dbg(ql_dbg_init, vha, 0x008b,
7314	7928	"FW: Loading firmware from flash (%x).\n", faddr);
7315	7929
7316		- rval = QLA_SUCCESS;
7317		-
7318		- segments = FA_RISC_CODE_SEGMENTS;
7319	7930	dcode = (uint32_t *)req->ring;
7320		- *srisc_addr = 0;
7321		-
7322		- if (IS_QLA27XX(ha) &&
7323		- qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7324		- faddr = ha->flt_region_fw_sec;
7325		-
7326		- /* Validate firmware image by checking version. */
7327		- qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
7328		- for (i = 0; i < 4; i++)
7329		- dcode[i] = be32_to_cpu(dcode[i]);
7330		- if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7331		- dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) \|\|
7332		- (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7333		- dcode[3] == 0)) {
	7931	+ qla24xx_read_flash_data(vha, dcode, faddr, 8);
	7932	+ if (qla24xx_risc_firmware_invalid(dcode)) {
7334	7933	ql_log(ql_log_fatal, vha, 0x008c,
7335	7934	"Unable to verify the integrity of flash firmware "
7336	7935	"image.\n");
..	..	@@ -7341,34 +7940,36 @@
7341	7940	return QLA_FUNCTION_FAILED;
7342	7941	}
7343	7942
7344		- while (segments && rval == QLA_SUCCESS) {
7345		- /* Read segment's load information. */
7346		- qla24xx_read_flash_data(vha, dcode, faddr, 4);
	7943	+ dcode = (uint32_t *)req->ring;
	7944	+ *srisc_addr = 0;
	7945	+ segments = FA_RISC_CODE_SEGMENTS;
	7946	+ for (j = 0; j < segments; j++) {
	7947	+ ql_dbg(ql_dbg_init, vha, 0x008d,
	7948	+ "-> Loading segment %u...\n", j);
	7949	+ qla24xx_read_flash_data(vha, dcode, faddr, 10);
	7950	+ risc_addr = be32_to_cpu((__force __be32)dcode[2]);
	7951	+ risc_size = be32_to_cpu((__force __be32)dcode[3]);
	7952	+ if (!*srisc_addr) {
	7953	+ *srisc_addr = risc_addr;
	7954	+ risc_attr = be32_to_cpu((__force __be32)dcode[9]);
	7955	+ }
7347	7956
7348		- risc_addr = be32_to_cpu(dcode[2]);
7349		- srisc_addr = srisc_addr == 0 ? risc_addr : *srisc_addr;
7350		- risc_size = be32_to_cpu(dcode[3]);
7351		-
7352		- fragment = 0;
7353		- while (risc_size > 0 && rval == QLA_SUCCESS) {
7354		- dlen = (uint32_t)(ha->fw_transfer_size >> 2);
	7957	+ dlen = ha->fw_transfer_size >> 2;
	7958	+ for (fragment = 0; risc_size; fragment++) {
7355	7959	if (dlen > risc_size)
7356	7960	dlen = risc_size;
7357	7961
7358	7962	ql_dbg(ql_dbg_init, vha, 0x008e,
7359		- "Loading risc segment@ risc addr %x "
7360		- "number of dwords 0x%x offset 0x%x.\n",
7361		- risc_addr, dlen, faddr);
7362		-
	7963	+ "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
	7964	+ fragment, risc_addr, faddr, dlen);
7363	7965	qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7364	7966	for (i = 0; i < dlen; i++)
7365	7967	dcode[i] = swab32(dcode[i]);
7366	7968
7367		- rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7368		- dlen);
	7969	+ rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7369	7970	if (rval) {
7370	7971	ql_log(ql_log_fatal, vha, 0x008f,
7371		- "Failed to load segment %d of firmware.\n",
	7972	+ "-> Failed load firmware fragment %u.\n",
7372	7973	fragment);
7373	7974	return QLA_FUNCTION_FAILED;
7374	7975	}
..	..	@@ -7376,107 +7977,82 @@
7376	7977	faddr += dlen;
7377	7978	risc_addr += dlen;
7378	7979	risc_size -= dlen;
7379		- fragment++;
	7980	+ }
	7981	+ }
	7982	+
	7983	+ if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
	7984	+ return QLA_SUCCESS;
	7985	+
	7986	+ templates = (risc_attr & BIT_9) ? 2 : 1;
	7987	+ ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
	7988	+ for (j = 0; j < templates; j++, fwdt++) {
	7989	+ if (fwdt->template)
	7990	+ vfree(fwdt->template);
	7991	+ fwdt->template = NULL;
	7992	+ fwdt->length = 0;
	7993	+
	7994	+ dcode = (uint32_t *)req->ring;
	7995	+ qla24xx_read_flash_data(vha, dcode, faddr, 7);
	7996	+ risc_size = be32_to_cpu((__force __be32)dcode[2]);
	7997	+ ql_dbg(ql_dbg_init, vha, 0x0161,
	7998	+ "-> fwdt%u template array at %#x (%#x dwords)\n",
	7999	+ j, faddr, risc_size);
	8000	+ if (!risc_size \|\| !~risc_size) {
	8001	+ ql_dbg(ql_dbg_init, vha, 0x0162,
	8002	+ "-> fwdt%u failed to read array\n", j);
	8003	+ goto failed;
7380	8004	}
7381	8005
7382		- /* Next segment. */
7383		- segments--;
	8006	+ /* skip header and ignore checksum */
	8007	+ faddr += 7;
	8008	+ risc_size -= 8;
	8009	+
	8010	+ ql_dbg(ql_dbg_init, vha, 0x0163,
	8011	+ "-> fwdt%u template allocate template %#x words...\n",
	8012	+ j, risc_size);
	8013	+ fwdt->template = vmalloc(risc_size * sizeof(*dcode));
	8014	+ if (!fwdt->template) {
	8015	+ ql_log(ql_log_warn, vha, 0x0164,
	8016	+ "-> fwdt%u failed allocate template.\n", j);
	8017	+ goto failed;
	8018	+ }
	8019	+
	8020	+ dcode = fwdt->template;
	8021	+ qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
	8022	+
	8023	+ if (!qla27xx_fwdt_template_valid(dcode)) {
	8024	+ ql_log(ql_log_warn, vha, 0x0165,
	8025	+ "-> fwdt%u failed template validate\n", j);
	8026	+ goto failed;
	8027	+ }
	8028	+
	8029	+ dlen = qla27xx_fwdt_template_size(dcode);
	8030	+ ql_dbg(ql_dbg_init, vha, 0x0166,
	8031	+ "-> fwdt%u template size %#lx bytes (%#lx words)\n",
	8032	+ j, dlen, dlen / sizeof(*dcode));
	8033	+ if (dlen > risc_size * sizeof(*dcode)) {
	8034	+ ql_log(ql_log_warn, vha, 0x0167,
	8035	+ "-> fwdt%u template exceeds array (%-lu bytes)\n",
	8036	+ j, dlen - risc_size * sizeof(*dcode));
	8037	+ goto failed;
	8038	+ }
	8039	+
	8040	+ fwdt->length = dlen;
	8041	+ ql_dbg(ql_dbg_init, vha, 0x0168,
	8042	+ "-> fwdt%u loaded template ok\n", j);
	8043	+
	8044	+ faddr += risc_size + 1;
7384	8045	}
7385	8046
7386		- if (!IS_QLA27XX(ha))
7387		- return rval;
	8047	+ return QLA_SUCCESS;
7388	8048
7389		- if (ha->fw_dump_template)
7390		- vfree(ha->fw_dump_template);
7391		- ha->fw_dump_template = NULL;
7392		- ha->fw_dump_template_len = 0;
	8049	+failed:
	8050	+ if (fwdt->template)
	8051	+ vfree(fwdt->template);
	8052	+ fwdt->template = NULL;
	8053	+ fwdt->length = 0;
7393	8054
7394		- ql_dbg(ql_dbg_init, vha, 0x0161,
7395		- "Loading fwdump template from %x\n", faddr);
7396		- qla24xx_read_flash_data(vha, dcode, faddr, 7);
7397		- risc_size = be32_to_cpu(dcode[2]);
7398		- ql_dbg(ql_dbg_init, vha, 0x0162,
7399		- "-> array size %x dwords\n", risc_size);
7400		- if (risc_size == 0 \|\| risc_size == ~0)
7401		- goto default_template;
7402		-
7403		- dlen = (risc_size - 8) * sizeof(*dcode);
7404		- ql_dbg(ql_dbg_init, vha, 0x0163,
7405		- "-> template allocating %x bytes...\n", dlen);
7406		- ha->fw_dump_template = vmalloc(dlen);
7407		- if (!ha->fw_dump_template) {
7408		- ql_log(ql_log_warn, vha, 0x0164,
7409		- "Failed fwdump template allocate %x bytes.\n", risc_size);
7410		- goto default_template;
7411		- }
7412		-
7413		- faddr += 7;
7414		- risc_size -= 8;
7415		- dcode = ha->fw_dump_template;
7416		- qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7417		- for (i = 0; i < risc_size; i++)
7418		- dcode[i] = le32_to_cpu(dcode[i]);
7419		-
7420		- if (!qla27xx_fwdt_template_valid(dcode)) {
7421		- ql_log(ql_log_warn, vha, 0x0165,
7422		- "Failed fwdump template validate\n");
7423		- goto default_template;
7424		- }
7425		-
7426		- dlen = qla27xx_fwdt_template_size(dcode);
7427		- ql_dbg(ql_dbg_init, vha, 0x0166,
7428		- "-> template size %x bytes\n", dlen);
7429		- if (dlen > risc_size * sizeof(*dcode)) {
7430		- ql_log(ql_log_warn, vha, 0x0167,
7431		- "Failed fwdump template exceeds array by %zx bytes\n",
7432		- (size_t)(dlen - risc_size * sizeof(*dcode)));
7433		- goto default_template;
7434		- }
7435		- ha->fw_dump_template_len = dlen;
7436		- return rval;
7437		-
7438		-default_template:
7439		- ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7440		- if (ha->fw_dump_template)
7441		- vfree(ha->fw_dump_template);
7442		- ha->fw_dump_template = NULL;
7443		- ha->fw_dump_template_len = 0;
7444		-
7445		- dlen = qla27xx_fwdt_template_default_size();
7446		- ql_dbg(ql_dbg_init, vha, 0x0169,
7447		- "-> template allocating %x bytes...\n", dlen);
7448		- ha->fw_dump_template = vmalloc(dlen);
7449		- if (!ha->fw_dump_template) {
7450		- ql_log(ql_log_warn, vha, 0x016a,
7451		- "Failed fwdump template allocate %x bytes.\n", risc_size);
7452		- goto failed_template;
7453		- }
7454		-
7455		- dcode = ha->fw_dump_template;
7456		- risc_size = dlen / sizeof(*dcode);
7457		- memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7458		- for (i = 0; i < risc_size; i++)
7459		- dcode[i] = be32_to_cpu(dcode[i]);
7460		-
7461		- if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7462		- ql_log(ql_log_warn, vha, 0x016b,
7463		- "Failed fwdump template validate\n");
7464		- goto failed_template;
7465		- }
7466		-
7467		- dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7468		- ql_dbg(ql_dbg_init, vha, 0x016c,
7469		- "-> template size %x bytes\n", dlen);
7470		- ha->fw_dump_template_len = dlen;
7471		- return rval;
7472		-
7473		-failed_template:
7474		- ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7475		- if (ha->fw_dump_template)
7476		- vfree(ha->fw_dump_template);
7477		- ha->fw_dump_template = NULL;
7478		- ha->fw_dump_template_len = 0;
7479		- return rval;
	8055	+ return QLA_SUCCESS;
7480	8056	}
7481	8057
7482	8058	#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
..	..	@@ -7486,7 +8062,8 @@
7486	8062	{
7487	8063	int rval;
7488	8064	int i, fragment;
7489		- uint16_t wcode, fwcode;
	8065	+ uint16_t *wcode;
	8066	+ __be16 *fwcode;
7490	8067	uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7491	8068	struct fw_blob *blob;
7492	8069	struct qla_hw_data *ha = vha->hw;
..	..	@@ -7506,7 +8083,7 @@
7506	8083
7507	8084	wcode = (uint16_t *)req->ring;
7508	8085	*srisc_addr = 0;
7509		- fwcode = (uint16_t *)blob->fw->data;
	8086	+ fwcode = (__force __be16 *)blob->fw->data;
7510	8087	fwclen = 0;
7511	8088
7512	8089	/* Validate firmware image by checking version. */
..	..	@@ -7554,7 +8131,7 @@
7554	8131	"words 0x%x.\n", risc_addr, wlen);
7555	8132
7556	8133	for (i = 0; i < wlen; i++)
7557		- wcode[i] = swab16(fwcode[i]);
	8134	+ wcode[i] = swab16((__force u32)fwcode[i]);
7558	8135
7559	8136	rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7560	8137	wlen);
..	..	@@ -7584,54 +8161,33 @@
7584	8161	qla24xx_load_risc_blob(scsi_qla_host_t vha, uint32_t srisc_addr)
7585	8162	{
7586	8163	int rval;
7587		- int segments, fragment;
7588		- uint32_t *dcode, dlen;
7589		- uint32_t risc_addr;
7590		- uint32_t risc_size;
7591		- uint32_t i;
	8164	+ uint templates, segments, fragment;
	8165	+ uint32_t *dcode;
	8166	+ ulong dlen;
	8167	+ uint32_t risc_addr, risc_size, risc_attr = 0;
	8168	+ ulong i;
	8169	+ uint j;
7592	8170	struct fw_blob *blob;
7593		- const uint32_t *fwcode;
7594		- uint32_t fwclen;
	8171	+ __be32 *fwcode;
7595	8172	struct qla_hw_data *ha = vha->hw;
7596	8173	struct req_que *req = ha->req_q_map[0];
	8174	+ struct fwdt *fwdt = ha->fwdt;
7597	8175
7598		- /* Load firmware blob. */
	8176	+ ql_dbg(ql_dbg_init, vha, 0x0090,
	8177	+ "-> FW: Loading via request-firmware.\n");
	8178	+
7599	8179	blob = qla2x00_request_firmware(vha);
7600	8180	if (!blob) {
7601		- ql_log(ql_log_warn, vha, 0x0090,
7602		- "Firmware image unavailable.\n");
7603		- ql_log(ql_log_warn, vha, 0x0091,
7604		- "Firmware images can be retrieved from: "
7605		- QLA_FW_URL ".\n");
	8181	+ ql_log(ql_log_warn, vha, 0x0092,
	8182	+ "-> Firmware file not found.\n");
7606	8183
7607	8184	return QLA_FUNCTION_FAILED;
7608	8185	}
7609	8186
7610		- ql_dbg(ql_dbg_init, vha, 0x0092,
7611		- "FW: Loading via request-firmware.\n");
7612		-
7613		- rval = QLA_SUCCESS;
7614		-
7615		- segments = FA_RISC_CODE_SEGMENTS;
7616		- dcode = (uint32_t *)req->ring;
7617		- *srisc_addr = 0;
7618		- fwcode = (uint32_t *)blob->fw->data;
7619		- fwclen = 0;
7620		-
7621		- /* Validate firmware image by checking version. */
7622		- if (blob->fw->size < 8 * sizeof(uint32_t)) {
	8187	+ fwcode = (__force __be32 *)blob->fw->data;
	8188	+ dcode = (__force uint32_t *)fwcode;
	8189	+ if (qla24xx_risc_firmware_invalid(dcode)) {
7623	8190	ql_log(ql_log_fatal, vha, 0x0093,
7624		- "Unable to verify integrity of firmware image (%zd).\n",
7625		- blob->fw->size);
7626		- return QLA_FUNCTION_FAILED;
7627		- }
7628		- for (i = 0; i < 4; i++)
7629		- dcode[i] = be32_to_cpu(fwcode[i + 4]);
7630		- if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7631		- dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) \|\|
7632		- (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7633		- dcode[3] == 0)) {
7634		- ql_log(ql_log_fatal, vha, 0x0094,
7635	8191	"Unable to verify integrity of firmware image (%zd).\n",
7636	8192	blob->fw->size);
7637	8193	ql_log(ql_log_fatal, vha, 0x0095,
..	..	@@ -7640,38 +8196,38 @@
7640	8196	return QLA_FUNCTION_FAILED;
7641	8197	}
7642	8198
7643		- while (segments && rval == QLA_SUCCESS) {
	8199	+ dcode = (uint32_t *)req->ring;
	8200	+ *srisc_addr = 0;
	8201	+ segments = FA_RISC_CODE_SEGMENTS;
	8202	+ for (j = 0; j < segments; j++) {
	8203	+ ql_dbg(ql_dbg_init, vha, 0x0096,
	8204	+ "-> Loading segment %u...\n", j);
7644	8205	risc_addr = be32_to_cpu(fwcode[2]);
7645		- srisc_addr = srisc_addr == 0 ? risc_addr : *srisc_addr;
7646	8206	risc_size = be32_to_cpu(fwcode[3]);
7647	8207
7648		- /* Validate firmware image size. */
7649		- fwclen += risc_size * sizeof(uint32_t);
7650		- if (blob->fw->size < fwclen) {
7651		- ql_log(ql_log_fatal, vha, 0x0096,
7652		- "Unable to verify integrity of firmware image "
7653		- "(%zd).\n", blob->fw->size);
7654		- return QLA_FUNCTION_FAILED;
	8208	+ if (!*srisc_addr) {
	8209	+ *srisc_addr = risc_addr;
	8210	+ risc_attr = be32_to_cpu(fwcode[9]);
7655	8211	}
7656	8212
7657		- fragment = 0;
7658		- while (risc_size > 0 && rval == QLA_SUCCESS) {
7659		- dlen = (uint32_t)(ha->fw_transfer_size >> 2);
	8213	+ dlen = ha->fw_transfer_size >> 2;
	8214	+ for (fragment = 0; risc_size; fragment++) {
7660	8215	if (dlen > risc_size)
7661	8216	dlen = risc_size;
7662	8217
7663	8218	ql_dbg(ql_dbg_init, vha, 0x0097,
7664		- "Loading risc segment@ risc addr %x "
7665		- "number of dwords 0x%x.\n", risc_addr, dlen);
	8219	+ "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
	8220	+ fragment, risc_addr,
	8221	+ (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
	8222	+ dlen);
7666	8223
7667	8224	for (i = 0; i < dlen; i++)
7668		- dcode[i] = swab32(fwcode[i]);
	8225	+ dcode[i] = swab32((__force u32)fwcode[i]);
7669	8226
7670		- rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7671		- dlen);
	8227	+ rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7672	8228	if (rval) {
7673	8229	ql_log(ql_log_fatal, vha, 0x0098,
7674		- "Failed to load segment %d of firmware.\n",
	8230	+ "-> Failed load firmware fragment %u.\n",
7675	8231	fragment);
7676	8232	return QLA_FUNCTION_FAILED;
7677	8233	}
..	..	@@ -7679,106 +8235,82 @@
7679	8235	fwcode += dlen;
7680	8236	risc_addr += dlen;
7681	8237	risc_size -= dlen;
7682		- fragment++;
	8238	+ }
	8239	+ }
	8240	+
	8241	+ if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
	8242	+ return QLA_SUCCESS;
	8243	+
	8244	+ templates = (risc_attr & BIT_9) ? 2 : 1;
	8245	+ ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
	8246	+ for (j = 0; j < templates; j++, fwdt++) {
	8247	+ if (fwdt->template)
	8248	+ vfree(fwdt->template);
	8249	+ fwdt->template = NULL;
	8250	+ fwdt->length = 0;
	8251	+
	8252	+ risc_size = be32_to_cpu(fwcode[2]);
	8253	+ ql_dbg(ql_dbg_init, vha, 0x0171,
	8254	+ "-> fwdt%u template array at %#x (%#x dwords)\n",
	8255	+ j, (uint32_t)((void )fwcode - (void )blob->fw->data),
	8256	+ risc_size);
	8257	+ if (!risc_size \|\| !~risc_size) {
	8258	+ ql_dbg(ql_dbg_init, vha, 0x0172,
	8259	+ "-> fwdt%u failed to read array\n", j);
	8260	+ goto failed;
7683	8261	}
7684	8262
7685		- /* Next segment. */
7686		- segments--;
	8263	+ /* skip header and ignore checksum */
	8264	+ fwcode += 7;
	8265	+ risc_size -= 8;
	8266	+
	8267	+ ql_dbg(ql_dbg_init, vha, 0x0173,
	8268	+ "-> fwdt%u template allocate template %#x words...\n",
	8269	+ j, risc_size);
	8270	+ fwdt->template = vmalloc(risc_size * sizeof(*dcode));
	8271	+ if (!fwdt->template) {
	8272	+ ql_log(ql_log_warn, vha, 0x0174,
	8273	+ "-> fwdt%u failed allocate template.\n", j);
	8274	+ goto failed;
	8275	+ }
	8276	+
	8277	+ dcode = fwdt->template;
	8278	+ for (i = 0; i < risc_size; i++)
	8279	+ dcode[i] = (__force u32)fwcode[i];
	8280	+
	8281	+ if (!qla27xx_fwdt_template_valid(dcode)) {
	8282	+ ql_log(ql_log_warn, vha, 0x0175,
	8283	+ "-> fwdt%u failed template validate\n", j);
	8284	+ goto failed;
	8285	+ }
	8286	+
	8287	+ dlen = qla27xx_fwdt_template_size(dcode);
	8288	+ ql_dbg(ql_dbg_init, vha, 0x0176,
	8289	+ "-> fwdt%u template size %#lx bytes (%#lx words)\n",
	8290	+ j, dlen, dlen / sizeof(*dcode));
	8291	+ if (dlen > risc_size * sizeof(*dcode)) {
	8292	+ ql_log(ql_log_warn, vha, 0x0177,
	8293	+ "-> fwdt%u template exceeds array (%-lu bytes)\n",
	8294	+ j, dlen - risc_size * sizeof(*dcode));
	8295	+ goto failed;
	8296	+ }
	8297	+
	8298	+ fwdt->length = dlen;
	8299	+ ql_dbg(ql_dbg_init, vha, 0x0178,
	8300	+ "-> fwdt%u loaded template ok\n", j);
	8301	+
	8302	+ fwcode += risc_size + 1;
7687	8303	}
7688	8304
7689		- if (!IS_QLA27XX(ha))
7690		- return rval;
	8305	+ return QLA_SUCCESS;
7691	8306
7692		- if (ha->fw_dump_template)
7693		- vfree(ha->fw_dump_template);
7694		- ha->fw_dump_template = NULL;
7695		- ha->fw_dump_template_len = 0;
	8307	+failed:
	8308	+ if (fwdt->template)
	8309	+ vfree(fwdt->template);
	8310	+ fwdt->template = NULL;
	8311	+ fwdt->length = 0;
7696	8312
7697		- ql_dbg(ql_dbg_init, vha, 0x171,
7698		- "Loading fwdump template from %x\n",
7699		- (uint32_t)((void )fwcode - (void )blob->fw->data));
7700		- risc_size = be32_to_cpu(fwcode[2]);
7701		- ql_dbg(ql_dbg_init, vha, 0x172,
7702		- "-> array size %x dwords\n", risc_size);
7703		- if (risc_size == 0 \|\| risc_size == ~0)
7704		- goto default_template;
7705		-
7706		- dlen = (risc_size - 8) * sizeof(*fwcode);
7707		- ql_dbg(ql_dbg_init, vha, 0x0173,
7708		- "-> template allocating %x bytes...\n", dlen);
7709		- ha->fw_dump_template = vmalloc(dlen);
7710		- if (!ha->fw_dump_template) {
7711		- ql_log(ql_log_warn, vha, 0x0174,
7712		- "Failed fwdump template allocate %x bytes.\n", risc_size);
7713		- goto default_template;
7714		- }
7715		-
7716		- fwcode += 7;
7717		- risc_size -= 8;
7718		- dcode = ha->fw_dump_template;
7719		- for (i = 0; i < risc_size; i++)
7720		- dcode[i] = le32_to_cpu(fwcode[i]);
7721		-
7722		- if (!qla27xx_fwdt_template_valid(dcode)) {
7723		- ql_log(ql_log_warn, vha, 0x0175,
7724		- "Failed fwdump template validate\n");
7725		- goto default_template;
7726		- }
7727		-
7728		- dlen = qla27xx_fwdt_template_size(dcode);
7729		- ql_dbg(ql_dbg_init, vha, 0x0176,
7730		- "-> template size %x bytes\n", dlen);
7731		- if (dlen > risc_size * sizeof(*fwcode)) {
7732		- ql_log(ql_log_warn, vha, 0x0177,
7733		- "Failed fwdump template exceeds array by %zx bytes\n",
7734		- (size_t)(dlen - risc_size * sizeof(*fwcode)));
7735		- goto default_template;
7736		- }
7737		- ha->fw_dump_template_len = dlen;
7738		- return rval;
7739		-
7740		-default_template:
7741		- ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7742		- if (ha->fw_dump_template)
7743		- vfree(ha->fw_dump_template);
7744		- ha->fw_dump_template = NULL;
7745		- ha->fw_dump_template_len = 0;
7746		-
7747		- dlen = qla27xx_fwdt_template_default_size();
7748		- ql_dbg(ql_dbg_init, vha, 0x0179,
7749		- "-> template allocating %x bytes...\n", dlen);
7750		- ha->fw_dump_template = vmalloc(dlen);
7751		- if (!ha->fw_dump_template) {
7752		- ql_log(ql_log_warn, vha, 0x017a,
7753		- "Failed fwdump template allocate %x bytes.\n", risc_size);
7754		- goto failed_template;
7755		- }
7756		-
7757		- dcode = ha->fw_dump_template;
7758		- risc_size = dlen / sizeof(*fwcode);
7759		- fwcode = qla27xx_fwdt_template_default();
7760		- for (i = 0; i < risc_size; i++)
7761		- dcode[i] = be32_to_cpu(fwcode[i]);
7762		-
7763		- if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7764		- ql_log(ql_log_warn, vha, 0x017b,
7765		- "Failed fwdump template validate\n");
7766		- goto failed_template;
7767		- }
7768		-
7769		- dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7770		- ql_dbg(ql_dbg_init, vha, 0x017c,
7771		- "-> template size %x bytes\n", dlen);
7772		- ha->fw_dump_template_len = dlen;
7773		- return rval;
7774		-
7775		-failed_template:
7776		- ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7777		- if (ha->fw_dump_template)
7778		- vfree(ha->fw_dump_template);
7779		- ha->fw_dump_template = NULL;
7780		- ha->fw_dump_template_len = 0;
7781		- return rval;
	8313	+ return QLA_SUCCESS;
7782	8314	}
7783	8315
7784	8316	int
..	..	@@ -7807,32 +8339,50 @@
7807	8339	{
7808	8340	int rval;
7809	8341	struct qla_hw_data *ha = vha->hw;
	8342	+ struct active_regions active_regions = { };
7810	8343
7811	8344	if (ql2xfwloadbin == 2)
7812	8345	goto try_blob_fw;
7813	8346
7814		- /*
7815		- * FW Load priority:
	8347	+ /* FW Load priority:
7816	8348	* 1) Firmware residing in flash.
7817	8349	* 2) Firmware via request-firmware interface (.bin file).
7818		- * 3) Golden-Firmware residing in flash -- limited operation.
	8350	+ * 3) Golden-Firmware residing in flash -- (limited operation).
7819	8351	*/
	8352	+
	8353	+ if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
	8354	+ goto try_primary_fw;
	8355	+
	8356	+ qla27xx_get_active_image(vha, &active_regions);
	8357	+
	8358	+ if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
	8359	+ goto try_primary_fw;
	8360	+
	8361	+ ql_dbg(ql_dbg_init, vha, 0x008b,
	8362	+ "Loading secondary firmware image.\n");
	8363	+ rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
	8364	+ if (!rval)
	8365	+ return rval;
	8366	+
	8367	+try_primary_fw:
	8368	+ ql_dbg(ql_dbg_init, vha, 0x008b,
	8369	+ "Loading primary firmware image.\n");
7820	8370	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
7821		- if (rval == QLA_SUCCESS)
	8371	+ if (!rval)
7822	8372	return rval;
7823	8373
7824	8374	try_blob_fw:
7825	8375	rval = qla24xx_load_risc_blob(vha, srisc_addr);
7826		- if (rval == QLA_SUCCESS \|\| !ha->flt_region_gold_fw)
	8376	+ if (!rval \|\| !ha->flt_region_gold_fw)
7827	8377	return rval;
7828	8378
7829	8379	ql_log(ql_log_info, vha, 0x0099,
7830	8380	"Attempting to fallback to golden firmware.\n");
7831	8381	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7832		- if (rval != QLA_SUCCESS)
	8382	+ if (rval)
7833	8383	return rval;
7834	8384
7835		- ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
	8385	+ ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
7836	8386	ha->flags.running_gold_fw = 1;
7837	8387	return rval;
7838	8388	}
..	..	@@ -7877,22 +8427,15 @@
7877	8427	uint16_t mb[MAILBOX_REGISTER_COUNT];
7878	8428	struct qla_hw_data *ha = vha->hw;
7879	8429	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7880		- struct req_que *req;
7881		- struct rsp_que *rsp;
7882	8430
7883	8431	if (!vha->vp_idx)
7884	8432	return -EINVAL;
7885	8433
7886	8434	rval = qla2x00_fw_ready(base_vha);
7887		- if (vha->qpair)
7888		- req = vha->qpair->req;
7889		- else
7890		- req = ha->req_q_map[0];
7891		- rsp = req->rsp;
7892	8435
7893	8436	if (rval == QLA_SUCCESS) {
7894	8437	clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7895		- qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
	8438	+ qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7896	8439	}
7897	8440
7898	8441	vha->flags.management_server_logged_in = 0;
..	..	@@ -7974,6 +8517,7 @@
7974	8517	qla84xx_put_chip(struct scsi_qla_host *vha)
7975	8518	{
7976	8519	struct qla_hw_data *ha = vha->hw;
	8520	+
7977	8521	if (ha->cs84xx)
7978	8522	kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7979	8523	}
..	..	@@ -7991,7 +8535,7 @@
7991	8535
7992	8536	mutex_unlock(&ha->cs84xx->fw_update_mutex);
7993	8537
7994		- return rval != QLA_SUCCESS \|\| status[0] ? QLA_FUNCTION_FAILED:
	8538	+ return rval != QLA_SUCCESS \|\| status[0] ? QLA_FUNCTION_FAILED :
7995	8539	QLA_SUCCESS;
7996	8540	}
7997	8541
..	..	@@ -8003,48 +8547,70 @@
8003	8547	int rval;
8004	8548	struct init_cb_81xx *icb;
8005	8549	struct nvram_81xx *nv;
8006		- uint32_t *dptr;
	8550	+ __le32 *dptr;
8007	8551	uint8_t dptr1, dptr2;
8008	8552	uint32_t chksum;
8009	8553	uint16_t cnt;
8010	8554	struct qla_hw_data *ha = vha->hw;
	8555	+ uint32_t faddr;
	8556	+ struct active_regions active_regions = { };
8011	8557
8012	8558	rval = QLA_SUCCESS;
8013	8559	icb = (struct init_cb_81xx *)ha->init_cb;
8014	8560	nv = ha->nvram;
8015	8561
8016	8562	/* Determine NVRAM starting address. */
8017		- ha->nvram_size = sizeof(struct nvram_81xx);
	8563	+ ha->nvram_size = sizeof(*nv);
8018	8564	ha->vpd_size = FA_NVRAM_VPD_SIZE;
8019	8565	if (IS_P3P_TYPE(ha) \|\| IS_QLA8031(ha))
8020	8566	ha->vpd_size = FA_VPD_SIZE_82XX;
8021	8567
	8568	+ if (IS_QLA28XX(ha) \|\| IS_QLA27XX(ha))
	8569	+ qla28xx_get_aux_images(vha, &active_regions);
	8570	+
8022	8571	/* Get VPD data into cache */
8023	8572	ha->vpd = ha->nvram + VPD_OFFSET;
8024		- ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
8025		- ha->vpd_size);
	8573	+
	8574	+ faddr = ha->flt_region_vpd;
	8575	+ if (IS_QLA28XX(ha)) {
	8576	+ if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
	8577	+ faddr = ha->flt_region_vpd_sec;
	8578	+ ql_dbg(ql_dbg_init, vha, 0x0110,
	8579	+ "Loading %s nvram image.\n",
	8580	+ active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
	8581	+ "primary" : "secondary");
	8582	+ }
	8583	+ ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8026	8584
8027	8585	/* Get NVRAM data into cache and calculate checksum. */
8028		- ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
8029		- ha->nvram_size);
8030		- dptr = (uint32_t *)nv;
	8586	+ faddr = ha->flt_region_nvram;
	8587	+ if (IS_QLA28XX(ha)) {
	8588	+ if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
	8589	+ faddr = ha->flt_region_nvram_sec;
	8590	+ }
	8591	+ ql_dbg(ql_dbg_init, vha, 0x0110,
	8592	+ "Loading %s nvram image.\n",
	8593	+ active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
	8594	+ "primary" : "secondary");
	8595	+ ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
	8596	+
	8597	+ dptr = (__force __le32 *)nv;
8031	8598	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8032	8599	chksum += le32_to_cpu(*dptr);
8033	8600
8034	8601	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8035	8602	"Contents of NVRAM:\n");
8036	8603	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8037		- (uint8_t *)nv, ha->nvram_size);
	8604	+ nv, ha->nvram_size);
8038	8605
8039	8606	/* Bad NVRAM data, set defaults parameters. */
8040		- if (chksum \|\| nv->id[0] != 'I' \|\| nv->id[1] != 'S' \|\| nv->id[2] != 'P'
8041		- \|\| nv->id[3] != ' ' \|\|
8042		- nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
	8607	+ if (chksum \|\| memcmp("ISP ", nv->id, sizeof(nv->id)) \|\|
	8608	+ le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8043	8609	/* Reset NVRAM data. */
8044	8610	ql_log(ql_log_info, vha, 0x0073,
8045		- "Inconsistent NVRAM detected: checksum=0x%x id=%c "
8046		- "version=0x%x.\n", chksum, nv->id[0],
8047		- le16_to_cpu(nv->nvram_version));
	8611	+ "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
	8612	+ chksum, nv->id, le16_to_cpu(nv->nvram_version));
	8613	+ ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8048	8614	ql_log(ql_log_info, vha, 0x0074,
8049	8615	"Falling back to functioning (yet invalid -- WWPN) "
8050	8616	"defaults.\n");
..	..	@@ -8055,7 +8621,7 @@
8055	8621	memset(nv, 0, ha->nvram_size);
8056	8622	nv->nvram_version = cpu_to_le16(ICB_VERSION);
8057	8623	nv->version = cpu_to_le16(ICB_VERSION);
8058		- nv->frame_payload_size = 2048;
	8624	+ nv->frame_payload_size = cpu_to_le16(2048);
8059	8625	nv->execution_throttle = cpu_to_le16(0xFFFF);
8060	8626	nv->exchange_count = cpu_to_le16(0);
8061	8627	nv->port_name[0] = 0x21;
..	..	@@ -8099,7 +8665,7 @@
8099	8665	}
8100	8666
8101	8667	if (IS_T10_PI_CAPABLE(ha))
8102		- nv->frame_payload_size &= ~7;
	8668	+ nv->frame_payload_size &= cpu_to_le16(~7);
8103	8669
8104	8670	qlt_81xx_config_nvram_stage1(vha, nv);
8105	8671
..	..	@@ -8161,15 +8727,20 @@
8161	8727	icb->node_name[0] &= 0xF0;
8162	8728	}
8163	8729
	8730	+ if (IS_QLA28XX(ha) \|\| IS_QLA27XX(ha)) {
	8731	+ if ((nv->enhanced_features & BIT_7) == 0)
	8732	+ ha->flags.scm_supported_a = 1;
	8733	+ }
	8734	+
8164	8735	/* Set host adapter parameters. */
8165	8736	ha->flags.disable_risc_code_load = 0;
8166	8737	ha->flags.enable_lip_reset = 0;
8167	8738	ha->flags.enable_lip_full_login =
8168		- le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
	8739	+ le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8169	8740	ha->flags.enable_target_reset =
8170		- le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
	8741	+ le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8171	8742	ha->flags.enable_led_scheme = 0;
8172		- ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
	8743	+ ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8173	8744
8174	8745	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8175	8746	(BIT_6 \| BIT_5 \| BIT_4)) >> 4;
..	..	@@ -8233,7 +8804,8 @@
8233	8804	ha->login_retry_count = ql2xloginretrycount;
8234	8805
8235	8806	/* if not running MSI-X we need handshaking on interrupts */
8236		- if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)))
	8807	+ if (!vha->hw->flags.msix_enabled &&
	8808	+ (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha) \|\| IS_QLA28XX(ha)))
8237	8809	icb->firmware_options_2 \|= cpu_to_le32(BIT_22);
8238	8810
8239	8811	/* Enable ZIO. */
..	..	@@ -8241,7 +8813,7 @@
8241	8813	ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8242	8814	(BIT_3 \| BIT_2 \| BIT_1 \| BIT_0);
8243	8815	ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8244		- le16_to_cpu(icb->interrupt_delay_timer): 2;
	8816	+ le16_to_cpu(icb->interrupt_delay_timer) : 2;
8245	8817	}
8246	8818	icb->firmware_options_2 &= cpu_to_le32(
8247	8819	~(BIT_3 \| BIT_2 \| BIT_1 \| BIT_0));
..	..	@@ -8261,16 +8833,13 @@
8261	8833	}
8262	8834
8263	8835	/* enable RIDA Format2 */
8264		- icb->firmware_options_3 \|= BIT_0;
	8836	+ icb->firmware_options_3 \|= cpu_to_le32(BIT_0);
8265	8837
8266	8838	/* N2N: driver will initiate Login instead of FW */
8267		- icb->firmware_options_3 \|= BIT_8;
	8839	+ icb->firmware_options_3 \|= cpu_to_le32(BIT_8);
8268	8840
8269		- if (IS_QLA27XX(ha)) {
8270		- icb->firmware_options_3 \|= BIT_8;
8271		- ql_dbg(ql_log_info, vha, 0x0075,
8272		- "Enabling direct connection.\n");
8273		- }
	8841	+ /* Determine NVMe/FCP priority for target ports */
	8842	+ ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8274	8843
8275	8844	if (rval) {
8276	8845	ql_log(ql_log_warn, vha, 0x0076,
..	..	@@ -8284,8 +8853,6 @@
8284	8853	{
8285	8854	int status, rval;
8286	8855	struct qla_hw_data *ha = vha->hw;
8287		- struct req_que *req = ha->req_q_map[0];
8288		- struct rsp_que *rsp = ha->rsp_q_map[0];
8289	8856	struct scsi_qla_host *vp;
8290	8857	unsigned long flags;
8291	8858
..	..	@@ -8297,7 +8864,7 @@
8297	8864	status = qla2x00_fw_ready(vha);
8298	8865	if (!status) {
8299	8866	/* Issue a marker after FW becomes ready. */
8300		- qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
	8867	+ qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8301	8868	vha->flags.online = 1;
8302	8869	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8303	8870	}
..	..	@@ -8377,61 +8944,6 @@
8377	8944	}
8378	8945
8379	8946	return status;
8380		-}
8381		-
8382		-void
8383		-qla81xx_update_fw_options(scsi_qla_host_t *vha)
8384		-{
8385		- struct qla_hw_data *ha = vha->hw;
8386		-
8387		- /* Hold status IOCBs until ABTS response received. */
8388		- if (ql2xfwholdabts)
8389		- ha->fw_options[3] \|= BIT_12;
8390		-
8391		- /* Set Retry FLOGI in case of P2P connection */
8392		- if (ha->operating_mode == P2P) {
8393		- ha->fw_options[2] \|= BIT_3;
8394		- ql_dbg(ql_dbg_disc, vha, 0x2103,
8395		- "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8396		- __func__, ha->fw_options[2]);
8397		- }
8398		-
8399		- /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8400		- if (ql2xmvasynctoatio) {
8401		- if (qla_tgt_mode_enabled(vha) \|\|
8402		- qla_dual_mode_enabled(vha))
8403		- ha->fw_options[2] \|= BIT_11;
8404		- else
8405		- ha->fw_options[2] &= ~BIT_11;
8406		- }
8407		-
8408		- if (qla_tgt_mode_enabled(vha) \|\|
8409		- qla_dual_mode_enabled(vha)) {
8410		- /* FW auto send SCSI status during */
8411		- ha->fw_options[1] \|= BIT_8;
8412		- ha->fw_options[10] \|= (u16)SAM_STAT_BUSY << 8;
8413		-
8414		- /* FW perform Exchange validation */
8415		- ha->fw_options[2] \|= BIT_4;
8416		- } else {
8417		- ha->fw_options[1] &= ~BIT_8;
8418		- ha->fw_options[10] &= 0x00ff;
8419		-
8420		- ha->fw_options[2] &= ~BIT_4;
8421		- }
8422		-
8423		- if (ql2xetsenable) {
8424		- /* Enable ETS Burst. */
8425		- memset(ha->fw_options, 0, sizeof(ha->fw_options));
8426		- ha->fw_options[2] \|= BIT_9;
8427		- }
8428		-
8429		- ql_dbg(ql_dbg_init, vha, 0x00e9,
8430		- "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8431		- __func__, ha->fw_options[1], ha->fw_options[2],
8432		- ha->fw_options[3], vha->host->active_mode);
8433		-
8434		- qla2x00_set_fw_options(vha, ha->fw_options);
8435	8947	}
8436	8948
8437	8949	/*
..	..	@@ -8634,7 +9146,6 @@
8634	9146	"Failed to allocate memory for queue pair.\n");
8635	9147	return NULL;
8636	9148	}
8637		- memset(qpair, 0, sizeof(struct qla_qpair));
8638	9149
8639	9150	qpair->hw = vha->hw;
8640	9151	qpair->vha = vha;
..	..	@@ -8681,7 +9192,7 @@
8681	9192	qpair->msix->in_use = 1;
8682	9193	list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8683	9194	qpair->pdev = ha->pdev;
8684		- if (IS_QLA27XX(ha) \|\| IS_QLA83XX(ha))
	9195	+ if (IS_QLA27XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA28XX(ha))
8685	9196	qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8686	9197
8687	9198	mutex_unlock(&ha->mq_lock);
..	..	@@ -8709,7 +9220,7 @@
8709	9220	qpair->rsp->req = qpair->req;
8710	9221	qpair->rsp->qpair = qpair;
8711	9222	/* init qpair to this cpu. Will adjust at run time. */
8712		- qla_cpu_update(qpair, smp_processor_id());
	9223	+ qla_cpu_update(qpair, raw_smp_processor_id());
8713	9224
8714	9225	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8715	9226	if (ha->fw_attributes & BIT_4)