| .. | .. |
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| 67 | 67 | |
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| 68 | 68 | /* STANDARD MODE frequency */ |
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| 69 | 69 | #define SYNQUACER_I2C_CLK_MASTER_STD(rate) \ |
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| 70 | | - DIV_ROUND_UP(DIV_ROUND_UP((rate), 100000) - 2, 2) |
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| 70 | + DIV_ROUND_UP(DIV_ROUND_UP((rate), I2C_MAX_STANDARD_MODE_FREQ) - 2, 2) |
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| 71 | 71 | /* FAST MODE frequency */ |
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| 72 | 72 | #define SYNQUACER_I2C_CLK_MASTER_FAST(rate) \ |
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| 73 | | - DIV_ROUND_UP((DIV_ROUND_UP((rate), 400000) - 2) * 2, 3) |
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| 73 | + DIV_ROUND_UP((DIV_ROUND_UP((rate), I2C_MAX_FAST_MODE_FREQ) - 2) * 2, 3) |
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| 74 | 74 | |
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| 75 | 75 | /* (clkrate <= 18000000) */ |
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| 76 | 76 | /* calculate the value of CS bits in CCR register on standard mode */ |
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| .. | .. |
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| 144 | 144 | u32 timeout_ms; |
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| 145 | 145 | enum i2c_state state; |
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| 146 | 146 | struct i2c_adapter adapter; |
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| 147 | | - |
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| 148 | | - bool is_suspended; |
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| 149 | 147 | }; |
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| 150 | 148 | |
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| 151 | 149 | static inline int is_lastmsg(struct synquacer_i2c *i2c) |
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| .. | .. |
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| 316 | 314 | unsigned long timeout; |
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| 317 | 315 | int ret; |
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| 318 | 316 | |
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| 319 | | - if (i2c->is_suspended) |
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| 320 | | - return -EBUSY; |
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| 321 | | - |
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| 322 | 317 | synquacer_i2c_hw_init(i2c); |
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| 323 | 318 | bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR); |
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| 324 | 319 | if (bsr & SYNQUACER_I2C_BSR_BB) { |
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| .. | .. |
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| 403 | 398 | |
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| 404 | 399 | if (i2c->state == STATE_READ) |
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| 405 | 400 | goto prepare_read; |
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| 406 | | - |
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| 407 | | - /* fallthru */ |
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| 401 | + fallthrough; |
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| 408 | 402 | |
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| 409 | 403 | case STATE_WRITE: |
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| 410 | 404 | if (bsr & SYNQUACER_I2C_BSR_LRB) { |
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| .. | .. |
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| 531 | 525 | .functionality = synquacer_i2c_functionality, |
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| 532 | 526 | }; |
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| 533 | 527 | |
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| 534 | | -static struct i2c_adapter synquacer_i2c_ops = { |
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| 528 | +static const struct i2c_adapter synquacer_i2c_ops = { |
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| 535 | 529 | .owner = THIS_MODULE, |
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| 536 | 530 | .name = "synquacer_i2c-adapter", |
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| 537 | 531 | .algo = &synquacer_i2c_algo, |
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| .. | .. |
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| 541 | 535 | static int synquacer_i2c_probe(struct platform_device *pdev) |
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| 542 | 536 | { |
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| 543 | 537 | struct synquacer_i2c *i2c; |
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| 544 | | - struct resource *r; |
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| 545 | 538 | u32 bus_speed; |
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| 546 | 539 | int ret; |
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| 547 | 540 | |
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| .. | .. |
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| 558 | 551 | &i2c->pclkrate); |
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| 559 | 552 | |
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| 560 | 553 | i2c->pclk = devm_clk_get(&pdev->dev, "pclk"); |
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| 561 | | - if (IS_ERR(i2c->pclk) && PTR_ERR(i2c->pclk) == -EPROBE_DEFER) |
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| 554 | + if (PTR_ERR(i2c->pclk) == -EPROBE_DEFER) |
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| 562 | 555 | return -EPROBE_DEFER; |
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| 563 | 556 | if (!IS_ERR_OR_NULL(i2c->pclk)) { |
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| 564 | 557 | dev_dbg(&pdev->dev, "clock source %p\n", i2c->pclk); |
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| .. | .. |
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| 579 | 572 | return -EINVAL; |
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| 580 | 573 | } |
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| 581 | 574 | |
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| 582 | | - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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| 583 | | - i2c->base = devm_ioremap_resource(&pdev->dev, r); |
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| 575 | + i2c->base = devm_platform_ioremap_resource(pdev, 0); |
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| 584 | 576 | if (IS_ERR(i2c->base)) |
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| 585 | 577 | return PTR_ERR(i2c->base); |
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| 586 | 578 | |
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| 587 | 579 | i2c->irq = platform_get_irq(pdev, 0); |
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| 588 | | - if (i2c->irq < 0) { |
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| 589 | | - dev_err(&pdev->dev, "no IRQ resource found\n"); |
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| 590 | | - return -ENODEV; |
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| 591 | | - } |
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| 580 | + if (i2c->irq < 0) |
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| 581 | + return i2c->irq; |
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| 592 | 582 | |
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| 593 | 583 | ret = devm_request_irq(&pdev->dev, i2c->irq, synquacer_i2c_isr, |
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| 594 | 584 | 0, dev_name(&pdev->dev), i2c); |
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| .. | .. |
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| 607 | 597 | i2c->adapter.nr = pdev->id; |
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| 608 | 598 | init_completion(&i2c->completion); |
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| 609 | 599 | |
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| 610 | | - if (bus_speed < 400000) |
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| 600 | + if (bus_speed < I2C_MAX_FAST_MODE_FREQ) |
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| 611 | 601 | i2c->speed_khz = SYNQUACER_I2C_SPEED_SM; |
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| 612 | 602 | else |
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| 613 | 603 | i2c->speed_khz = SYNQUACER_I2C_SPEED_FM; |
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