| .. | .. |
|---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
|---|
| 1 | 2 | /* |
|---|
| 2 | 3 | * Copyright (C) 2011 NXP Semiconductors |
|---|
| 3 | 4 | * |
|---|
| .. | .. |
|---|
| 9 | 10 | * Anton Protopopov, Emcraft Systems, antonp@emcraft.com |
|---|
| 10 | 11 | * |
|---|
| 11 | 12 | * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com> |
|---|
| 12 | | - * |
|---|
| 13 | | - * This program is free software; you can redistribute it and/or modify |
|---|
| 14 | | - * it under the terms of the GNU General Public License as published by |
|---|
| 15 | | - * the Free Software Foundation; either version 2 of the License, or |
|---|
| 16 | | - * (at your option) any later version. |
|---|
| 17 | | - * |
|---|
| 18 | 13 | */ |
|---|
| 19 | 14 | |
|---|
| 20 | 15 | #include <linux/clk.h> |
|---|
| .. | .. |
|---|
| 351 | 346 | static int i2c_lpc2k_probe(struct platform_device *pdev) |
|---|
| 352 | 347 | { |
|---|
| 353 | 348 | struct lpc2k_i2c *i2c; |
|---|
| 354 | | - struct resource *res; |
|---|
| 355 | 349 | u32 bus_clk_rate; |
|---|
| 356 | 350 | u32 scl_high; |
|---|
| 357 | 351 | u32 clkrate; |
|---|
| .. | .. |
|---|
| 361 | 355 | if (!i2c) |
|---|
| 362 | 356 | return -ENOMEM; |
|---|
| 363 | 357 | |
|---|
| 364 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|---|
| 365 | | - i2c->base = devm_ioremap_resource(&pdev->dev, res); |
|---|
| 358 | + i2c->base = devm_platform_ioremap_resource(pdev, 0); |
|---|
| 366 | 359 | if (IS_ERR(i2c->base)) |
|---|
| 367 | 360 | return PTR_ERR(i2c->base); |
|---|
| 368 | 361 | |
|---|
| 369 | 362 | i2c->irq = platform_get_irq(pdev, 0); |
|---|
| 370 | | - if (i2c->irq < 0) { |
|---|
| 371 | | - dev_err(&pdev->dev, "can't get interrupt resource\n"); |
|---|
| 363 | + if (i2c->irq < 0) |
|---|
| 372 | 364 | return i2c->irq; |
|---|
| 373 | | - } |
|---|
| 374 | 365 | |
|---|
| 375 | 366 | init_waitqueue_head(&i2c->wait); |
|---|
| 376 | 367 | |
|---|
| .. | .. |
|---|
| 401 | 392 | ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", |
|---|
| 402 | 393 | &bus_clk_rate); |
|---|
| 403 | 394 | if (ret) |
|---|
| 404 | | - bus_clk_rate = 100000; /* 100 kHz default clock rate */ |
|---|
| 395 | + bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; |
|---|
| 405 | 396 | |
|---|
| 406 | 397 | clkrate = clk_get_rate(i2c->clk); |
|---|
| 407 | 398 | if (clkrate == 0) { |
|---|
| .. | .. |
|---|
| 412 | 403 | |
|---|
| 413 | 404 | /* Setup I2C dividers to generate clock with proper duty cycle */ |
|---|
| 414 | 405 | clkrate = clkrate / bus_clk_rate; |
|---|
| 415 | | - if (bus_clk_rate <= 100000) |
|---|
| 406 | + if (bus_clk_rate <= I2C_MAX_STANDARD_MODE_FREQ) |
|---|
| 416 | 407 | scl_high = (clkrate * I2C_STD_MODE_DUTY) / 100; |
|---|
| 417 | | - else if (bus_clk_rate <= 400000) |
|---|
| 408 | + else if (bus_clk_rate <= I2C_MAX_FAST_MODE_FREQ) |
|---|
| 418 | 409 | scl_high = (clkrate * I2C_FAST_MODE_DUTY) / 100; |
|---|
| 419 | 410 | else |
|---|
| 420 | 411 | scl_high = (clkrate * I2C_FAST_MODE_PLUS_DUTY) / 100; |
|---|